Search results for: pendulum clock

Authors: Yongping Ren, Zongli Li, Fan Zhang

Abstract:

A new nonlinear PID controller and its stability analysis are presented in this paper. A nonlinear function is deduced from the similarities between the control effort and the electric-field effect of a capacitor. The conventional linear PID controller can be modified into a nonlinear one by this function. To analyze the stability of the nonlinear PID controlled system, an idea of energy equivalence is adapted to avoid the conservativeness which is usually arisen from some traditional theorems and Criterions. The energy equivalence is naturally related with the conceptions of Passivity and T-Passivity. As a result, an engineering guideline for the parameter design of the nonlinear PID controller is obtained. An inverted pendulum system is tested to verify the nonlinear PID control scheme.

Keywords: Nonlinear PID controller, stability, gain equivalence, dissipative, T-Passivity.

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Authors: M. Almeshal, M. O. Tokhi, K. M. Goher

Abstract:

A novel design of two-wheeled robotic vehicle with moving payload is presented in this paper. A mathematical model describing the vehicle dynamics is derived and simulated in Matlab Simulink environment. Two control strategies were developed to stabilise the vehicle in the upright position. A robust Proportional- Integral-Derivative (PID) control strategy has been implemented and initially tested to measure the system performance, while the second control strategy is to use a hybrid fuzzy logic controller (FLC). The results are given on a comparative basis for the system performance in terms of disturbance rejection, control algorithms robustness as well as the control effort in terms of input torque.

Keywords: double inverted pendulum, modelling, robust control, simulation,

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Authors: Chih-Hui Chiu, Chun-Hsien Lin

Abstract:

In this study, a robust intelligent backstepping tracking control (RIBTC) system combined with adaptive output recurrent cerebellar model articulation control (AORCMAC) and H∞ control technique is proposed for wheeled inverted pendulums (WIPs) real-time control with exact system dynamics unknown. Moreover, a robust H∞ controller is designed to attenuate the effect of the residual approximation errors and external disturbances with desired attenuation level. The experimental results indicate that the WIPs can stand upright stably when using the proposed RIBTC.

Keywords: Wheeled inverted pendulum, backsteppingtracking control, H∞ control, adaptive output recurrentcerebellar model articulation control.

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Authors: Aarthi Chandramohan, M. V. C. Rao

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This paper presents three new methodologies for the basic operations, which aim at finding new ways of computing union (maximum) and intersection (minimum) membership values by taking into effect the entire membership values in a fuzzy set. The new methodologies are conceptually simple and easy from the application point of view and are illustrated with a variety of problems such as Cartesian product of two fuzzy sets, max –min composition of two fuzzy sets in different product spaces and an application of an inverted pendulum to determine the impact of the new methodologies. The results clearly indicate a difference based on the nature of the fuzzy sets under consideration and hence will be highly useful in quite a few applications where different values have significant impact on the behavior of the system.

Keywords: Centroid, fuzzy set operations, intersection, triangular norms , triangular S-norms, union.

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Authors: Jorge Estudillo Ramirez, Saul E. Pomares Hernandez

Abstract:

Multimedia distributed systems deal with heterogeneous data, such as texts, images, graphics, video and audio. The specification of temporal relations among different data types and distributed sources is an open research area. This paper proposes a fully distributed synchronization model to be used in multimedia systems. One original aspect of the model is that it avoids the use of a common reference (e.g. wall clock and shared memory). To achieve this, all possible multimedia temporal relations are specified according to their causal dependencies.

Keywords: Multimedia, Distributed Systems, Partial Ordering, Temporal Synchronization

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Authors: Satish BM, Girish BM , Mahesh K

Abstract:

The aim of the present work is to study the effect of annealing on the vibration damping capacity of high-chromium (16%) ferromagnetic steel. The alloys were prepared from raw materials of 99.9% purity melted in a high frequency induction furnace under high vacuum. The samples were heat-treated in vacuum at various temperatures (800 to 1200ºC) for 1 hour followed by slow cooling (120ºC/h). The inverted torsional pendulum method was used to evaluate the vibration damping capacity. The results indicated that the vibration damping capacity of the alloys is influenced by annealing and there exists a critical annealing temperature after 1000ºC. The damping capacity increases quickly below the critical temperature since the magnetic domains move more easily.

Keywords: Vibration, Damping, Ferromagnetic, Steel.

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Authors: Jaouadi Ikram, Machhout Mohsen

Abstract:

The development of a quantum key distribution (QKD) system on a field-programmable gate array (FPGA) platform is the subject of this paper. A quantum cryptographic protocol is designed based on the properties of quantum information and the characteristics of FPGAs. The proposed protocol performs key extraction, reconciliation, error correction, and privacy amplification tasks to generate a perfectly secret final key. We modeled the presence of the spy in our system with a strategy to reveal some of the exchanged information without being noticed. Using an FPGA card with a 100 MHz clock frequency, we have demonstrated the evolution of the error rate as well as the amounts of mutual information (between the two interlocutors and that of the spy) passing from one step to another in the key generation process.

Keywords: QKD, BB84, protocol, cryptography, FPGA, key, security, communication.

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Authors: I. Zamani, M. H. Zarif

Abstract:

In this paper a method for designing of nonlinear controller for a fuzzy model of Double Inverted Pendulum is proposed. This system can be considered as a fuzzy large-scale system that includes offset terms and disturbance in each subsystem. Offset terms are deterministic and disturbances are satisfied a matching condition that is mentioned in the paper. Based on Lyapunov theorem, a nonlinear controller is designed for this fuzzy system (as a model reference base) which is simple in computation and guarantees stability. This idea can be used for other fuzzy large- scale systems that include more subsystems Finally, the results are shown.

Keywords: Controller, Fuzzy Double Inverted Pendulums, Fuzzy Large-Scale Systems, Lyapunov Stability.

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Authors: Nasir Mehmood, Jens Ogniewski, Vinodh Ravinath

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This paper describes the design of a real-time audiorange digital oscilloscope and its implementation in 90nm CMOS FPGA platform. The design consists of sample and hold circuits, A/D conversion, audio and video processing, on-chip RAM, clock generation and control logic. The design of internal blocks and modules in 90nm devices in an FPGA is elaborated. Also the key features and their implementation algorithms are presented. Finally, the timing waveforms and simulation results are put forward.

Keywords: CMOS, VLSI, Oscilloscope, Field Programmable Gate Array (FPGA), VHDL, Video Graphics Array (VGA)

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Authors: Shipra Upadhyay , R. K. Nagaria, R. A. Mishra

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In this paper, we present the design and experimental evaluation of complementary energy path adiabatic logic (CEPAL) based 1 bit full adder circuit. A simulative investigation on the proposed full adder has been done using VIRTUOSO SPECTRE simulator of cadence in 0.18μm UMC technology and its performance has been compared with the conventional CMOS full adder circuit. The CEPAL based full adder circuit exhibits the energy saving of 70% to the conventional CMOS full adder circuit, at 100 MHz frequency and 1.8V operating voltage.

Keywords: Adiabatic, CEPAL, full adder, power clock

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Authors: Omid Mirmotahari, Yngvar Berg, Ahmad Habibizad Navin

Abstract:

Reversible logic is becoming more and more prominent as the technology sets higher demands on heat, power, scaling and stability. Reversible gates are able at any time to "undo" the current step or function. Multiple-valued logic has the advantage of transporting and evaluating higher bits each clock cycle than binary. Moreover, we demonstrate in this paper, combining these disciplines we can construct powerful multiple-valued reversible logic structures. In this paper a reversible block implemented by pseudo floatinggate can perform AD-function and a DA-function as its reverse application.

Keywords: Reversible logic, bi-directional, Pseudo floating-gate(PFG), multiple-valued logic (MVL).

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Authors: Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Moon-Kyu Song, Woo-Geun Lee Min-Koo Han

Abstract:

We have fabricated a-IGZO TFT and investigated the stability under positive DC and AC bias stress. The threshold voltage of a-IGZO TFT shifts positively under those biases, and that reduces on-current. For this reason, conventional shift-register circuit employing TFTs which stressed by positive bias will be unstable, may do not work properly. We have designed a new 6-transistor shift-register, which has less transistors than prior circuits. The TFTs of the proposed shift-register are not suffering from positive DC or AC stress, mainly kept unbiased. Despite the compact design, the stable output signal was verified through the SPICE simulation even under RC delay of clock signal.

Keywords: Indium Gallium Zinc Oxide (IGZO), Thin FilmTransistor (TFT), shift-register

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Authors: Seong Woo Kwak, Jung-Min Yang

Abstract:

A strategy of fault diagnosis and tolerance for asynchronous sequential machines is discussed in this paper. With no synchronizing clock, it is difficult to diagnose an occurrence of permanent or stuck-in faults in the operation of asynchronous machines. In this paper, we present a fault detector comprised of a timer and a set of static functions to determine the occurrence of faults. In order to realize immediate fault tolerance, corrective control theory is applied to designing a dynamic feedback controller. Existence conditions for an appropriate controller and its construction algorithm are presented in terms of reachability of the machine and the feature of fault occurrences.

Keywords: Asynchronous sequential machines, corrective control, fault diagnosis and tolerance, fault detector.

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Authors: Apinan Aurasopon, Worawat Sa-ngiavibool

Abstract:

This paper proposes a synchronized random switching frequency pulse width modulation (SRSFPWM). In this technique, the clock signal is used to control the random noise frequency which is produced by the feedback voltage of a hysteresis circuit. These make the triangular carrier frequency equaling to the random noise frequency in each switching period with the symmetrical positive and negative slopes of triangular carrier. Therefore, there is no error voltage in PWM signal. The PSpice simulated results shown the proposed technique improved the performance in case of low frequency harmonics of PWM signal comparing with conventional random switching frequency PWM.

Keywords: Random switching frequency pulse - width modulation.

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Authors: H.S. Kim

Abstract:

In this study, control performance of a smart base isolation system consisting of a friction pendulum system (FPS) and a magnetorheological (MR) damper has been investigated. A fuzzy logic controller (FLC) is used to modulate the MR damper so as to minimize structural acceleration while maintaining acceptable base displacement levels. To this end, a multi-objective optimization scheme is used to optimize parameters of membership functions and find appropriate fuzzy rules. To demonstrate effectiveness of the proposed multi-objective genetic algorithm for FLC, a numerical study of a smart base isolation system is conducted using several historical earthquakes. It is shown that the proposed method can find optimal fuzzy rules and that the optimized FLC outperforms not only a passive control strategy but also a human-designed FLC and a conventional semi-active control algorithm.

Keywords: Fuzzy logic controller, genetic algorithm, MR damper, smart base isolation system

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Authors: Mahmoud M. Mhashi

Abstract:

A new algorithm called Character-Comparison to Character-Access (CCCA) is developed to test the effect of both: 1) converting character-comparison and number-comparison into character-access and 2) the starting point of checking on the performance of the checking operation in string searching. An experiment is performed; the results are compared with five algorithms, namely, Naive, BM, Inf_Suf_Pref, Raita, and Circle. With the CCCA algorithm, the results suggest that the evaluation criteria of the average number of comparisons are improved up to 74.0%. Furthermore, the results suggest that the clock time required by the other algorithms is improved in range from 28% to 68% by the new CCCA algorithm

Keywords: Pattern matching, string searching, charactercomparison, character-access, and checking.

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Authors: D. Elleuch, T. Damak

Abstract:

Performance control law is studied for an interconnected fractional nonlinear system. Applying a backstepping algorithm, a backstepping sliding mode controller (BSMC) is developed for fractional nonlinear system. To improve control law performance, BSMC is coupled to an adaptive sliding mode observer have a filtered error as a sliding surface. The both architecture performance is studied throughout the inverted pendulum mounted on a cart. Simulation result show that the BSMC coupled to an adaptive sliding mode observer have stable control law and eligible control amplitude than the BSMC.

Keywords: Backstepping sliding mode controller, interconnected fractional nonlinear system, adaptive sliding mode observer.

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Authors: A.R. Aswatha, T. Basavaraju, S. Sandeep Kumar

Abstract:

Timing driven physical design, synthesis, and optimization tools need efficient closed-form delay models for estimating the delay associated with each net in an integrated circuit (IC) design. The total number of nets in a modern IC design has increased dramatically and exceeded millions. Therefore efficient modeling of interconnection is needed for high speed IC-s. This paper presents closed–form expressions for RC and RLC interconnection trees in current mode signaling, which can be implemented in VLSI design tool. These analytical model expressions can be used for accurate calculation of delay after the design clock tree has been laid out and the design is fully routed. Evaluation of these analytical models is several orders of magnitude faster than simulation using SPICE.

Keywords: IC design, RC/RLC Interconnection, VLSI Systems.

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Authors: M. Azadbakht, N. Tajari, R. Alimoradzade

Abstract:

Knowing pea pods mechanical resistance against dynamic forces are important for design of combine harvester. In pea combine harvesters, threshing is accomplished by two mechanical actions of impact and friction forces. In this research, the effects of initial moisture content and needed impact and friction energy on threshing of pea pods were studied. An impact device was built based on pendulum mechanism. The experiments were done at three initial moisture content levels of 12.1, 23.5 and 39.5 (%w.b.) for both impact and friction methods. Three energy levels of 0.088, 0.126 and 0.202 J were used for impact method and for friction method three energy levels of 0.784, 0.930 and 1.351 J. The threshing percentage was measured in each method. By using a frictional device, kinetic friction coefficients at above moisture contents were measured 0.257, 0.303 and 0.336, respectively. The results of variance analysis of the two methods showed that moisture content and energy have significant effects on the threshing percentage.

Keywords: Pea pod, Energy, Friction, Impact, Initial moisture content, Threshing.

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Authors: Mahmoud Moh'd Mhashi

Abstract:

A new algorithm called Character-Comparison to Character-Access (CCCA) is developed to test the effect of both: 1) converting character-comparison and number-comparison into character-access and 2) the starting point of checking on the performance of the checking operation in string searching. An experiment is performed using both English text and DNA text with different sizes. The results are compared with five algorithms, namely, Naive, BM, Inf_Suf_Pref, Raita, and Cycle. With the CCCA algorithm, the results suggest that the evaluation criteria of the average number of total comparisons are improved up to 35%. Furthermore, the results suggest that the clock time required by the other algorithms is improved in range from 22.13% to 42.33% by the new CCCA algorithm.

Keywords: Pattern matching, string searching, charactercomparison, character-access, text type, and checking

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Authors: C. Blatier, M. El Methni, F. Carpentier, S. Abdellaoui, C. Kock, M. Maillard

Abstract:

International literature emphasizes on the concern regarding the phenomenon of aggression in hospital. This paper focuses on the reality of aggressive interactions reigning within an emergency triage involving three chaps of protagonists: the professionals, the patients and their carers. The data collection was made from a grid of observation, in which the various variables exposed in the literature were integrated. They observations took place around the clock, for three weeks, at the rate of one week a month. In this research 331 aggressive interactions have been listed and analyzed by means of the software SPSS. This research is one of the very few continuous observation surveys in the literature. It shows the various human factors at play in the emergence of aggressive interaction. The data may be used both for taking steps in primary prevention, thanks to the analysis of interaction modes, and in secondary prevention by integrating the useful results in situational prevention.

Keywords: Aggressive interaction, emergency unit, observational study.

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Authors: Ali Beydoun, Van-Tam Nguyen, Patrick Loumeau

Abstract:

Time interleaved sigma-delta (TIΣΔ) architecture is a potential candidate for high bandwidth analog to digital converters (ADC) which remains a bottleneck for software and cognitive radio receivers. However, the performance of the TIΣΔ architecture is limited by the unavoidable gain and offset mismatches resulting from the manufacturing process. This paper presents a novel digital calibration method to compensate the gain and offset mismatch effect. The proposed method takes advantage of the reconstruction digital signal processing on each channel and requires only few logic components for implementation. The run time calibration is estimated to 10 and 15 clock cycles for offset cancellation and gain mismatch calibration respectively.

Keywords: sigma-delta, calibration, gain and offset mismatches, analog-to-digital conversion, time-interleaving.

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Authors: Jun Yu, Yat-Hei Lam, Boris Grinberg, Kevin Chai Tshun Chuan

Abstract:

This paper presents a 5-V to 30-V current-mode boost converter for powering the drive circuit of a micro-electro-mechanical sensor. The design of a transconductance amplifier and an integrated current sensing circuit are presented. In addition, essential building blocks for power-on protection such as a soft-start and clamp block and supply and clock ready block are discussed in details. The chip is fabricated in a 0.18-μm CMOS process. Measurement results show that the soft-start and clamp block can effectively limit the inrush current during startup and protect the boost converter from startup failure.

Keywords: Boost Converter, Current Sensing, Power-on protection, Step-up Converter, Soft-start.

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Authors: H. Loukil, A. Ben Atitallah, F. Ghozzi, M. A. Ben Ayed, N. Masmoudi

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In MPEG and H.26x standards, to eliminate the temporal redundancy we use motion estimation. Given that the motion estimation stage is very complex in terms of computational effort, a hardware implementation on a re-configurable circuit is crucial for the requirements of different real time multimedia applications. In this paper, we present hardware architecture for motion estimation based on "Full Search Block Matching" (FSBM) algorithm. This architecture presents minimum latency, maximum throughput, full utilization of hardware resources such as embedded memory blocks, and combining both pipelining and parallel processing techniques. Our design is described in VHDL language, verified by simulation and implemented in a Stratix II EP2S130F1020C4 FPGA circuit. The experiment result show that the optimum operating clock frequency of the proposed design is 89MHz which achieves 160M pixels/sec.

Keywords: SAD, FSBM, Hardware Implementation, FPGA.

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Authors: M. Polanský

Abstract:

This paper introduces a new method called ARPDC (Advanced Robust Parallel Distributed Compensation) for automatic control of nonlinear systems. This method improves a quality of robust control by interpolating of robust and optimal controller. The weight of each controller is determined by an original criteria function for model validity and disturbance appreciation. ARPDC method is based on nonlinear Takagi-Sugeno (T-S) fuzzy systems and Parallel Distributed Compensation (PDC) control scheme. The relaxed stability conditions of ARPDC control of nominal system have been derived. The advantages of presented method are demonstrated on the inverse pendulum benchmark problem. From comparison between three different controllers (robust, optimal and ARPDC) follows, that ARPDC control is almost optimal with the robustness close to the robust controller. The results indicate that ARPDC algorithm can be a good alternative not only for a robust control, but in some cases also to an adaptive control of nonlinear systems.

Keywords: Robust control, optimal control, Takagi–Sugeno (TS) fuzzy models, linear matrix inequality (LMI), observer, Advanced Robust Parallel Distributed Compensation (ARPDC).

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Authors: Muhammad I. Ibrahimy, Mamun B.I. Reaz, Khandaker Asaduzzaman, Sazzad Hussain

Abstract:

An approach to develop the FPGA of a flexible key RSA encryption engine that can be used as a standard device in the secured communication system is presented. The VHDL modeling of this RSA encryption engine has the unique characteristics of supporting multiple key sizes, thus can easily be fit into the systems that require different levels of security. A simple nested loop addition and subtraction have been used in order to implement the RSA operation. This has made the processing time faster and used comparatively smaller amount of space in the FPGA. The hardware design is targeted on Altera STRATIX II device and determined that the flexible key RSA encryption engine can be best suited in the device named EP2S30F484C3. The RSA encryption implementation has made use of 13,779 units of logic elements and achieved a clock frequency of 17.77MHz. It has been verified that this RSA encryption engine can perform 32-bit, 256-bit and 1024-bit encryption operation in less than 41.585us, 531.515us and 790.61us respectively.

Keywords: RSA, FPGA, Communication, Security, VHDL.

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Authors: Y. A. Chan, H. J. Liu, K. C. Tseng, T. C. Kuo

Abstract:

Green propellants used for satellite-level propulsion system become attractive in recent years because the non-toxicity and lower requirements of safety protection. One of the green propellants, high-concentration hydrogen peroxide H2O2 solution (≥70% w/w, weight concentration percentage), often known as high-test peroxide (HTP), is considered because it is ITAR-free, easy to manufacture and the operating temperature is lower than traditional monopropellant propulsion. To establish satellite propulsion technology, the National Space Organization (NSPO) in Taiwan has initialized a long-term cooperation project with the National Cheng Kung University to develop compatible tank and thruster. An experimental propulsion payload has been allocated for the future self-reliant satellite to perform orbit transfer and maintenance operations. In the present research, an 1-Newton thruster prototype is designed and the thrusting force is measured by a pendulum-type platform. The preliminary hot-firing test at ambient environment showed the generated thrust and the specific impulse are about 0.7 Newton and 102 seconds, respectively.

Keywords: Hydrogen peroxide, propulsion, RCS, satellite.

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Authors: Kamaraju.M, Lal Kishore.K, Tilak.A.V.N

Abstract:

The general purpose processors that are used in embedded systems must support constraints like execution time, power consumption, code size and so on. On the other hand an Application Specific Instruction-set Processor (ASIP) has advantages in terms of power consumption, performance and flexibility. In this paper, a 16-bit Application Specific Instruction-set processor for the sensor data transfer is proposed. The designed processor architecture consists of on-chip transmitter and receiver modules along with the processing and controlling units to enable the data transmission and reception on a single die. The data transfer is accomplished with less number of instructions as compared with the general purpose processor. The ASIP core operates at a maximum clock frequency of 1.132GHz with a delay of 0.883ns and consumes 569.63mW power at an operating voltage of 1.2V. The ASIP is implemented in Verilog HDL using the Xilinx platform on Virtex4.

Keywords: ASIP, Data transfer, Instruction set, Processor

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Authors: Nicoletta Adamo-Villani

Abstract:

The object of this research is the design and evaluation of an immersive Virtual Learning Environment (VLE) for deaf children. Recently we have developed a prototype immersive VR game to teach sign language mathematics to deaf students age K- 4 [1] [2]. In this paper we describe a significant extension of the prototype application. The extension includes: (1) user-centered design and implementation of two additional interactive environments (a clock store and a bakery), and (2) user-centered evaluation including development of user tasks, expert panel-based evaluation, and formative evaluation. This paper is one of the few to focus on the importance of user-centered, iterative design in VR application development, and to describe a structured evaluation method.

Keywords: 3D Animation, Virtual Reality, Virtual Learning Environments, User-Centered Design, User-centered Evaluation.

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Authors: Ankit Mitra

Abstract:

An adder is one of the most integral component of a digital system like a digital signal processor or a microprocessor. Being an extremely computationally intensive part of a system, the optimization for speed and power consumption of the adder is of prime importance. In this paper we have designed a 1 bit full adder cell based on dynamic TSPC logic to achieve high speed operation. A high threshold voltage sleep transistor is used to reduce the static power dissipation in standby mode. The circuit is designed and simulated in TSPICE using TSMC 180nm CMOS process. Average power consumption, delay and power-delay product is measured which showed considerable improvement in performance over the existing full adder designs.

Keywords: CMOS, TSPC, MTCMOS, ALU, Clock gating, power gating, pipelining.

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