Search results for: high impulse voltage

Authors: Aziza Benaboud, Alfred Rufer

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In this paper the authors propose a flexible electronic solution, to improve the energetic efficiency of a thermo plant. This is achieved by replacing the mechanical gear box, placed traditionally between a gas turbine and a synchronous generator; by a power electronic converter. After reminding problematic of gear boxes and interest of a proposed electronic solution in high power plants, the authors describe a new control strategy for an indirect frequency converter, which is characterized by its high efficiency due to the use of SWM: Square Wave Modulation. The main advantage of this mode is the quasi absence of switching losses. A control method is also proposed to resolve some problems incurred by using square wave modulation, in particular to reduce the harmonics distortion of the output inverter voltage and current. Simulation examples as well as experimental results are included.

Keywords: Angle shift, high efficiency, indirect converter, gas turbine, NPC three level converter, square wave modulation SWM, switching angle.

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Authors: M. Fadlallah, G. Ghibaudo, C. G. Theodorou

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The dynamic variation in memory devices such as the Static Random Access Memory can give errors in read or write operations. In this paper, the effect of low-frequency and random telegraph noise on the dynamic variation of one SRAM cell is detailed. The effect on circuit noise, speed, and length of time of processing is examined, using the Supply Read Retention Voltage and the Read Static Noise Margin. New test run methods are also developed. The obtained results simulation shows the importance of noise caused by dynamic variation, and the impact of Random Telegraph noise on SRAM variability is examined by evaluating the statistical distributions of Random Telegraph noise amplitude in the pull-up, pull-down. The threshold voltage mismatch between neighboring cell transistors due to intrinsic fluctuations typically contributes to larger reductions in static noise margin. Also the contribution of each of the SRAM transistor to total dynamic variation has been identified.

Keywords: Low-frequency noise, Random Telegraph Noise, Dynamic Variation, SRRV.

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Authors: Wei Yi Lim, M. Annamalai Arasu, M. Kumarasamy Raja, Minkyu Je

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In this paper, the design of wide-swing constant transconductance (g_m) bias circuit that generates bias voltage for low-noise amplifier (LNA) circuit design by using an off-chip resistor is demonstrated. The overall transconductance (G_m) generated by the constant g_m bias circuit is important to maintain the overall gain and noise figure of the LNA circuit. Therefore, investigation is performed to study the variation in G_m with process, temperature and supply voltage (PVT).  Temperature and supply voltage are swept from -10 °C to 85 °C and 1.425 V to 1.575 V respectively, while the process conditions are also varied to the extreme and the g_m variation is eventually concluded at between -3 % to 7 %. With the slight variation in the g_m value, through simulation, at worst condition of state SS, we are able to attain a conversion gain (S₂₁) variation of -3.10 % and a noise figure (NF) variation of 18.71 %. The whole constant g_m circuit draws approximately 100 µA from a 1.5V supply and is designed based on 0.13 µm CMOS process. 

Keywords: Transconductance, LNA, temperature, process.

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Authors: Yashar Haghighatfar, Shahrzad Mirhosseini

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Pull-in instability is a nonlinear and crucial effect that is important for the design of microelectromechanical system devices. In this paper, the appropriate electrostatic voltage range is determined by measuring fluid flow pressure via micro pressure sensor based microbeam. The microbeam deflection contains two parts, the static and perturbation deflection of static. The second order equation regarding the equivalent stiffness, mass and damping matrices based on Galerkin method is introduced to predict pull-in instability due to the external voltage. Also the reduced order method is used for solving the second order nonlinear equation of motion. Furthermore, in the present study, the micro capacitive pressure sensor is designed for measuring special fluid flow pressure range. The results show that the measurable pressure range can be optimized, regarding damping field and external voltage.

Keywords: MEMS, pull-in instability, electrostatically actuated microbeam, reduced order method.

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Authors: Shiv Shankar Mishra, S. Wairya, R. K. Nagaria, S. Tiwari

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New methodologies for XOR-XNOR circuits are proposed to improve the speed and power as these circuits are basic building blocks of many arithmetic circuits. This paper evaluates and compares the performance of various XOR-XNOR circuits. The performance of the XOR-XNOR circuits based on TSMC 0.18μm process models at all range of the supply voltage starting from 0.6V to 3.3V is evaluated by the comparison of the simulation results obtained from HSPICE. Simulation results reveal that the proposed circuit exhibit lower PDP and EDP, more power efficient and faster when compared with best available XOR-XNOR circuits in the literature.

Keywords: Exclusive-OR (XOR), Exclusive-NOR (XNOR), High speed, Low power, Arithmetic Circuits.

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Authors: M. Almutairi, S. Hadjiloucas

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The harmonic distortion of voltage is important in relation to power quality due to the interaction between the large diffusion of non-linear and time-varying single-phase and three-phase loads with power supply systems. However, harmonic distortion levels can be reduced by improving the design of polluting loads or by applying arrangements and adding filters. The application of passive filters is an effective solution that can be used to achieve harmonic mitigation mainly because filters offer high efficiency, simplicity, and are economical. Additionally, possible different frequency response characteristics can work to achieve certain required harmonic filtering targets. With these ideas in mind, the objective of this paper is to determine what size single tuned passive filters work in distribution networks best, in order to economically limit violations caused at a given point of common coupling (PCC). This article suggests that a single tuned passive filter could be employed in typical industrial power systems. Furthermore, constrained optimization can be used to find the optimal sizing of the passive filter in order to reduce both harmonic voltage and harmonic currents in the power system to an acceptable level, and, thus, improve the load power factor. The optimization technique works to minimize voltage total harmonic distortions (VTHD) and current total harmonic distortions (ITHD), where maintaining a given power factor at a specified range is desired. According to the IEEE Standard 519, both indices are viewed as constraints for the optimal passive filter design problem. The performance of this technique will be discussed using numerical examples taken from previous publications.

Keywords: Harmonics, passive filter, power factor, power quality.

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Authors: Mohamed Al Mahdi Eshtawie, Masuri Bin Othman

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Finite impulse response (FIR) filters have the advantage of linear phase, guaranteed stability, fewer finite precision errors, and efficient implementation. In contrast, they have a major disadvantage of high order need (more coefficients) than IIR counterpart with comparable performance. The high order demand imposes more hardware requirements, arithmetic operations, area usage, and power consumption when designing and fabricating the filter. Therefore, minimizing or reducing these parameters, is a major goal or target in digital filter design task. This paper presents an algorithm proposed for modifying values and the number of non-zero coefficients used to represent the FIR digital pulse shaping filter response. With this algorithm, the FIR filter frequency and phase response can be represented with a minimum number of non-zero coefficients. Therefore, reducing the arithmetic complexity needed to get the filter output. Consequently, the system characteristic i.e. power consumption, area usage, and processing time are also reduced. The proposed algorithm is more powerful when integrated with multiplierless algorithms such as distributed arithmetic (DA) in designing high order digital FIR filters. Here the DA usage eliminates the need for multipliers when implementing the multiply and accumulate unit (MAC) and the proposed algorithm will reduce the number of adders and addition operations needed through the minimization of the non-zero values coefficients to get the filter output.

Keywords: Pulse shaping Filter, Distributed Arithmetic, Optimization algorithm.

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

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According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: Yash Pal, A.Swarup, Bhim Singh

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A new topology of unified power quality conditioner (UPQC) is proposed for different power quality (PQ) improvement in a three-phase four-wire (3P-4W) distribution system. For neutral current mitigation, a star-hexagon transformer is connected in shunt near the load along with three-leg voltage source inverters (VSIs) based UPQC. For the mitigation of source neutral current, the uses of passive elements are advantageous over the active compensation due to ruggedness and less complexity of control. In addition to this, by connecting a star-hexagon transformer for neutral current mitigation the over all rating of the UPQC is reduced. The performance of the proposed topology of 3P-4W UPQC is evaluated for power-factor correction, load balancing, neutral current mitigation and mitigation of voltage and currents harmonics. A simple control algorithm based on Unit Vector Template (UVT) technique is used as a control strategy of UPQC for mitigation of different PQ problems. In this control scheme, the current/voltage control is applied over the fundamental supply currents/voltages instead of fast changing APFs currents/voltages, thereby reducing the computational delay. Moreover, no extra control is required for neutral source current compensation; hence the numbers of current sensors are reduced. The performance of the proposed topology of UPQC is analyzed through simulations results using MATLAB software with its Simulink and Power System Block set toolboxes.

Keywords: Power-factor correction, Load balancing, UPQC, Voltage and Current harmonics, Neutral current mitigation, Starhexagon transformer.

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Authors: A.M. Vural, K.C. Bayindir

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Back-to-back static synchronous compensator (BtBSTATCOM) consists of two back-to-back voltage-source converters (VSC) with a common DC link in a substation. This configuration extends the capabilities of conventional STATCOM that bidirectional active power transfer from one bus to another is possible. In this paper, VSCs are designed in quasi multi-pulse form in which GTOs are triggered only once per cycle in PSCAD/EMTDC. The design details of VSCs as well as gate switching circuits and controllers are fully represented. Regulation modes of BtBSTATCOM are verified and tested on a multi-machine power system through different simulation cases. The results presented in the form of typical time responses show that practical PI controllers are almost robust and stable in case of start-up, set-point change, and line faults.

Keywords: Flexible AC Transmission Systems (FACTS), Backto-Back Static Synchronous Compensator (BtB-STATCOM), quasi multi-pulse voltage source converter, active power transfer; voltage control.

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Authors: Ankit Mitra

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An adder is one of the most integral component of a digital system like a digital signal processor or a microprocessor. Being an extremely computationally intensive part of a system, the optimization for speed and power consumption of the adder is of prime importance. In this paper we have designed a 1 bit full adder cell based on dynamic TSPC logic to achieve high speed operation. A high threshold voltage sleep transistor is used to reduce the static power dissipation in standby mode. The circuit is designed and simulated in TSPICE using TSMC 180nm CMOS process. Average power consumption, delay and power-delay product is measured which showed considerable improvement in performance over the existing full adder designs.

Keywords: CMOS, TSPC, MTCMOS, ALU, Clock gating, power gating, pipelining.

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Authors: Barenten Suciu, Yuya Nakamoto

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Power generation effect, obtained by inserting a piezo- electric sheet in the backlash clearance of a circular arc helical gear, is evaluated. Such type of screw gear is preferred since, in comparison with the involute tooth profile, the circular arc profile leads to reduced stress-concentration effects, and improved life of the piezoelectric film. Firstly, geometry of the circular arc helical gear, and properties of the piezoelectric sheet are presented. Then, description of the test-rig, consisted of a right-hand thread gear meshing with a left-hand thread gear, and the voltage measurement procedure are given. After creating the tridimensional (3D) model of the meshing gears in SolidWorks, they are 3D-printed in acrylonitrile butadiene styrene (ABS) resin. Variation of the generated voltage versus time, during a meshing cycle of the circular arc helical gear, is measured for various values of the center distance. Then, the change of the maximal, minimal, and peak-to-peak voltage versus the center distance is illustrated. Optimal center distance of the gear, to achieve voltage maximization, is found and its significance is discussed. Such results prove that the contact pressure of the meshing gears can be measured, and also, the electrical power can be generated by employing the proposed technique.

Keywords: Power generation, circular arc helical gear, piezo- electric sheet, contact problem, optimal center distance.

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Authors: Gianluca Cornetta, Abdellah Touhafi, David J. Santos, Jose Manuel Vazquez

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A direct downconversion receiver implemented in 0.13 μm 1P8M process is presented. The circuit is formed by a single-end LNA, an active balun for conversion into balanced mode, a quadrature double-balanced passive switch mixer and a quadrature voltage-controlled oscillator. The receiver operates in the 2.4 GHz ISM band and complies with IEEE 802.15.4 (ZigBee) specifications. The circuit exhibits a very low noise figure of only 2.27 dB and dissipates only 14.6 mW with a 1.2 V supply voltage and is hence suitable for low-power applications.

Keywords: LNA, Active Balun, Passive Mixer, VCO, IEEE 802.15.4(ZigBee).

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Authors: K. Ramash Kumar, S. Jeevananthan

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The Object of this paper is to design and analyze a Hysteresis modulation based sliding mode control (HMSMC) for positive output elementary super lift Luo converter (POESLLC), which is the start-of-the-art DC-DC converter. The positive output elementary super lift Luo converter performs the voltage conversion from positive source voltage to positive load voltage. This paper proposes a HMSMC capable of providing the good steady state and dynamic performance compared to conventional controllers. Dynamic equations describing the positive output elementary super lift luo converter are derived by using state space average method. The simulation model of the positive output elementary super lift Luo converter with its control circuit is implemented in Matlab/Simulink. The HMSMC for positive output elementary super lift Luo converter is tested for line changes, load changes and also for components variations.

Keywords: DC-DC converter, Positive output elementarysuper lift Luo converter (POESLLC), Hysteresis modulation basedsliding mode control (HMSMC).

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Authors: A. Ahadpour Shal, A. Ghadimi, A. Azadbar

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In this paper a new method for increasing the speed of SAGCM-APD is proposed. Utilizing carrier rate equations in different regions of the structure, a circuit model for the structure is obtained. In this research, in addition to frequency response, the effect of added new charge layer on some transient parameters like slew-rate, rising and falling times have been considered. Finally, by trading-off among some physical parameters such as different layers widths and droppings, a noticeable decrease in breakdown voltage has been achieved. The results of simulation, illustrate some features of proposed structure improvement in comparison with conventional SAGCM-APD structures.

Keywords: Optical communication systems (OCS), Circuit modeling, breakdown voltage, SAGCM APD

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Authors: Patience Muchini, Electdom Matandiroya, Emmanuel Mashonjowa

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A ground-end manifestation of space weather phenomena is known as geomagnetically induced currents (GICs). GICs flow along the electric power transmission cables connecting the transformers and between the grounding points of power transformers during significant geomagnetic storms. Zimbabwe has no study that notes if grid failures have been caused by GICs. Research and monitoring are needed to investigate this possible relationship purpose of this paper is to characterize GICs with a power grid network. This paper analyses data collected, which are geomagnetic data, which include the Kp index, Disturbance storm time (DST) index, and the G-Scale from geomagnetic storms and also analyses power grid data, which includes reactive power, relay tripping, and alarms from high voltage substations and then correlates the data. This research analysis was first theoretically analyzed by studying geomagnetic parameters and then experimented upon. To correlate, MATLAB was used as the basic software to analyze the data. Latitudes of the substations were also brought into scrutiny to note if they were an impact due to the location as low latitudes areas like most parts of Zimbabwe, there are less severe geomagnetic variations. Based on theoretical and graphical analysis, it has been proven that there is a slight relationship between power system failures and GICs. Further analyses can be done by implementing measuring instruments to measure any currents in the grounding of high-voltage transformers when geomagnetic storms occur. Mitigation measures can then be developed to minimize the susceptibility of the power network to GICs.

Keywords: Adverse space weather, DST index, geomagnetically induced currents, Kp index, reactive power.

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Authors: Rachid.Dehini, Abdesselam.Bassou, Brahim.Ferdi

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Active Power Filters (APFs) are today the most widely used systems to eliminate harmonics compensate power factor and correct unbalanced problems in industrial power plants. We propose to improve the performances of conventional APFs by using artificial neural networks (ANNs) for harmonics estimation. This new method combines both the strategies for extracting the three-phase reference currents for active power filters and DC link voltage control method. The ANNs learning capabilities to adaptively choose the power system parameters for both to compute the reference currents and to recharge the capacitor value requested by VDC voltage in order to ensure suitable transit of powers to supply the inverter. To investigate the performance of this identification method, the study has been accomplished using simulation with the MATLAB Simulink Power System Toolbox. The simulation study results of the new (SAPF) identification technique compared to other similar methods are found quite satisfactory by assuring good filtering characteristics and high system stability.

Keywords: Artificial Neural Networks (ANN), p-q theory, (SAPF), Harmonics, Total Harmonic Distortion.

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Authors: B.Gholami, S.Gholami, A.Forouzantabar, Sh.Bazyari

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A new design approach for three-stage operational amplifiers (op-amps) is proposed. It allows to actually implement a symmetrical push-pull class-AB amplifier output stage for wellestablished three-stage amplifiers using a feedforward transconductance stage. Compared with the conventional design practice, the proposed approach leads to a significant improvement of the symmetry between the positive and the negative op-amp step response, resulting in similar values of the positive/negative settling time. The new approach proves to be very useful in order to fully exploit the potentiality allowed by the op-amp in terms of speed performances. Design examples in a commercial 0.35-μm CMOS prove the effectiveness of theproposed strategy.

Keywords: Low-voltage op amp, design , optimum design

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Authors: M. Hari Prabhu

Abstract:

This paper is based on the performance of the Switched Reluctance Motor (SRM) drives using Z-Source Inverter with the simplified rule base of Fuzzy Logic Controller (FLC) with the output scaling factor (SF) self-tuning mechanism are proposed. The aim of this paper is to simplify the program complexity of the controller by reducing the number of fuzzy sets of the membership functions (MFs) without losing the system performance and stability via the adjustable controller gain. ZSI exhibits both voltage-buck and voltage-boost capability. It reduces line harmonics, improves reliability, and extends output voltage range. The output SF of the controller can be tuned continuously by a gain updating factor, whose value is derived from fuzzy logic, with the plant error and error change ratio as input variables. Then the results, carried out on a four-phase 6/8 pole SRM based on the dSPACEDS1104 platform, to show the feasibility and effectiveness of the devised methods and also performance of the proposed controllers will be compared with conventional counterpart.

Keywords: Fuzzy logic controller, scaling factor (SF), switched reluctance motor (SRM), variable-speed drives.

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Authors: Hani Baek, Gwang Min Sun, Chansun Shin, Sung Ho Ahn

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Fast neutron irradiation using nuclear reactors is an effective method to improve switching loss and short circuit durability of power semiconductor (insulated gate bipolar transistors (IGBT) and insulated gate transistors (IGT), etc.). However, not only fast neutrons but also thermal neutrons, epithermal neutrons and gamma exist in the nuclear reactor. And the electrical properties of the IGBT may be deteriorated by the irradiation of gamma. Gamma irradiation damages are known to be caused by Total Ionizing Dose (TID) effect and Single Event Effect (SEE), Displacement Damage. Especially, the TID effect deteriorated the electrical properties such as leakage current and threshold voltage of a power semiconductor. This work can confirm the effect of the gamma irradiation on the electrical properties of 600 V NPT-IGBT. Irradiation of gamma forms lattice defects in the gate oxide and Si-SiO₂ interface of the IGBT. It was confirmed that this lattice defect acts on the center of the trap and affects the threshold voltage, thereby negatively shifted the threshold voltage according to TID. In addition to the change in the carrier mobility, the conductivity modulation decreases in the n-drift region, indicating a negative influence that the forward voltage drop decreases. The turn-off delay time of the device before irradiation was 212 ns. Those of 2.5, 10, 30, 70 and 100 kRad(Si) were 225, 258, 311, 328, and 350 ns, respectively. The gamma irradiation increased the turn-off delay time of the IGBT by approximately 65%, and the switching characteristics deteriorated.

Keywords: NPT-IGBT, gamma irradiation, switching, turn-off delay time, recombination, trap center.

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Authors: Aradhna Pandarum

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South Africa is experiencing an exponential growth of distributed solar PV installations. This is due to various factors with the predominant one being increasing electricity tariffs along with decreasing installation costs, resulting in attractive business cases to some end-users. Despite there being a variety of economic and environmental advantages associated with the installation of PV, their potential impact on distribution grids has yet to be thoroughly investigated. This is especially true since the locations of these units cannot be controlled by Network Service Providers (NSPs) and their output power is stochastic and non-dispatchable. This report details two case studies that were completed to determine the possible voltage and technical losses impact of increasing PV penetration in the Northern Cape of South Africa. Some major impacts considered for the simulations were ramping of PV generation due to intermittency caused by moving clouds, the size and overall hosting capacity and the location of the systems. The main finding is that the technical impact is different on a constrained feeder vs a non-constrained feeder. The acceptable PV penetration level is much lower for a constrained feeder than a non-constrained feeder, depending on where the systems are located.

Keywords: Medium voltage networks, power system losses, power system voltage, solar photovoltaic, PV.

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Authors: R. Bures, M. Streckova, M. Faberova, P. Kurek

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Composite material based on Fe3Si micro-particles and Mn-Zn nano-ferrite was prepared using powder metallurgy technology. The sol-gel followed by autocombustion process was used for synthesis of Mn0.8Zn0.2Fe2O4 ferrite. 3 wt.% of mechanically milled ferrite was mixed with Fe3Si powder alloy. Mixed micro-nano powder system was homogenized by the Resonant Acoustic Mixing using ResodynLabRAM Mixer. This non-invasive homogenization technique was used to preserve spherical morphology of Fe3Si powder particles. Uniaxial cold pressing in the closed die at pressure 600 MPa was applied to obtain a compact sample. Microwave sintering of green compact was realized at 800°C, 20 minutes, in air. Density of the powders and composite was measured by Hepycnometry. Impulse excitation method was used to measure elastic properties of sintered composite. Mechanical properties were evaluated by measurement of transverse rupture strength (TRS) and Vickers hardness (HV). Resistivity was measured by 4 point probe method. Ferrite phase distribution in volume of the composite was documented by metallographic analysis. It has been found that nano-ferrite particle distributed among micro- particles of Fe3Si powder alloy led to high relative density (~93%) and suitable mechanical properties (TRS >100 MPa, HV ~1GPa, E-modulus ~140 GPa) of the composite. High electric resistivity (R~6.7 ohm.cm) of prepared composite indicate their potential application as soft magnetic material at medium and high frequencies.

Keywords: Micro- and nano-composite, soft magnetic materials, microwave sintering, mechanical and electric properties.

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Authors: Hanifah Jambari, Naziha A. Azli, M. Afendi M. Piah

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This paper presents the generation of bipolar square wave pulses with characteristics that are suitable for liquid food sterilization using a Cascaded H-bridge Multilevel Inverter (CHMI). Bipolar square waves pulses have been reported as stable for a longer time during the sterilization process with minimum heat emission and increased efficiency. The CHMI allows the system to produce bipolar square wave pulses and yielding high output voltage without using a transformer while fulfilling the pulse requirements for effective liquid food sterilization. This in turn can reduce power consumption and cost of the overall liquid food sterilization system. The simulation results have shown that pulses with peak output voltage of 2.4 kV, pulse width of between 1 2s and 1 ms at frequencies of 50 Hz and 100 Hz can be generated by a 7-level CHMI. Results from the experimental set-up based on a 5-level CHMI has indicated the potential of the proposed circuit in producing bipolar square wave output pulses with peak values that depends on the DC source level supplied to the CHMI modules, pulse width of between 12.5 2s and 1 ms at frequencies of 50 Hz and 100 Hz.

Keywords: pulsed electric field, multilevel inverter, bipolarsquare wave, food sterilization

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Authors: T. Costa, D. Narvaez, K. Melo, M. Villalva

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Installation of micro-generators based on renewable energy in power distribution system has increased in recent years, with the main renewable sources being solar and wind. Due to the intermittent nature of renewable energy sources, such micro-generators produce time-varying energy which does not correspond at certain times of the day to the peak energy consumption of end users. For this reason, the use of energy storage units next to the grid contributes to the proper leveling of the buses’ voltage level according to Brazilian energy quality standards. In this work, the effect of the addition of a photovoltaic solar generator and a store of energy in the busbar voltages of an electric system is analyzed. The consumption profile is defined as the average hourly use of appliances in a common residence, and the generation profile is defined as a function of the solar irradiation available in a locality. The power summation method is validated with analytical calculation and is used to calculate the modules and angles of the voltages in the buses of an electrical system based on the IEEE standard, at each hour of the day and with defined load and generation profiles. The results show that bus 5 presents the worst voltage level at the power consumption peaks and stabilizes at the appropriate range with the inclusion of the energy storage during the night time period. Solar generator maintains improvement of the voltage level during the period when it receives solar irradiation, having peaks of production during the 12 pm (without exceeding the appropriate maximum levels of tension).

Keywords: Energy storage, power distribution system, solar generator, voltage level.

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Authors: Saba Zare Zardareh, Farhad Akbari Boroumand

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The objective is to fabricate organic light emitting diode and to study its degradation process in atmosphere condition in which PFO as an emitting material and PEDOT:PSS as a hole injecting material were used on ITO substrate. Thus degradation process of the OLED was studied upon its current-voltage characteristic. By fabricating this OLED and obtaining blue light and analysis of current-voltage characteristic during the time after fabrication, it was observed that the current of the OLED was exponentially decreased. Current reduction during the initial hours of fabrication was outstanding and after few days its reduction rate was dropped significantly, while the diode was dying.

Keywords: OLED, Degradation, Dark spot.

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Authors: Jayesh M. Sonawane, Prakash C. Ghosh

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Landfill leachate emerges as a promising feedstock for microbial fuel cells (MFCs). In the present investigation, direct air-breathing cathode-based MFCs are fabricated to investigate the potential of landfill leachate. Three MFCs that have different cathode areas are fabricated and investigated for 17 days under open circuit conditions. The maximum open circuit voltage (OCV) is observed to be as high as 1.29 V. The maximum cathode area specific power density achieved in the reactor is 1513 mW m^-2. Further studies are under progress to understand the origin of high OCV obtained from landfill leachate-based MFCs.

Keywords: Microbial fuel cells, landfill leachate, air-breathing cathode, performance study.

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Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

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The distribution of a single global clock across a chip has become the major design bottleneck for high performance VLSI systems owing to the power dissipation, process variability and multicycle cross-chip signaling. A Network-on-Chip (NoC) architecture partitioned into several synchronous blocks has become a promising approach for attaining fine-grain power management at the system level. In a NoC architecture the communication between the blocks is handled asynchronously. To interface these blocks on a chip operating at different frequencies, an asynchronous FIFO interface is inevitable. However, these asynchronous FIFOs are not required if adjacent blocks belong to the same clock domain. In this paper, we have designed and analyzed a 16-bit asynchronous micropipelined FIFO of depth four, with the awareness of place and route on an FPGA device. We have used a commercially available Spartan 3 device and designed a high speed implementation of the asynchronous 4-phase micropipeline. The asynchronous FIFO implemented on the FPGA device shows 76 Mb/s throughput and a handshake cycle of 109 ns for write and 101.3 ns for read at the simulation under the worst case operating conditions (voltage = 0.95V) on a working chip at the room temperature.

Keywords: Asynchronous, FIFO, FPGA, GALS, Network-on- Chip (NoC), VHDL.

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Authors: Ashwani K. Rana, Narottam Chand, Vinod Kapoor

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This paper presents a new compact analytical model of the gate leakage current in high-k based nano scale MOSFET by assuming a two-step inelastic trap-assisted tunneling (ITAT) process as the conduction mechanism. This model is based on an inelastic trap-assisted tunneling (ITAT) mechanism combined with a semiempirical gate leakage current formulation in the BSIM 4 model. The gate tunneling currents have been calculated as a function of gate voltage for different gate dielectrics structures such as HfO2, Al2O3 and Si3N4 with EOT (equivalent oxide thickness) of 1.0 nm. The proposed model is compared and contrasted with santaurus simulation results to verify the accuracy of the model and excellent agreement is found between the analytical and simulated data. It is observed that proposed analytical model is suitable for different highk gate dielectrics simply by adjusting two fitting parameters. It was also shown that gate leakages reduced with the introduction of high-k gate dielectric in place of SiO2.

Keywords: Analytical model, High-k gate dielectrics, inelastic trap assisted tunneling, metal–oxide–semiconductor (MOS) devices.

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Authors: Z. X. Chen, N. Singh, D.-L. Kwong

Abstract:

This paper presents a vertical silicon nanowire n- MOSFET integrated with a CMOS-compatible fully-silicided (FUSI) NiSi2 gate. Devices with nanowire diameter of 50nm show good electrical performance (SS < 70mV/dec, DIBL < 30mV/V, Ion/Ioff > 107). Most significantly, threshold voltage tunability of about 0.2V is shown. Although threshold voltage remains low for the 50nm diameter device, it is expected to become more positive as nanowire diameter reduces.

Keywords: NiSi , fully-silicided (FUSI) gate, vertical siliconnanowire (SiNW), CMOS compatible.

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Authors: Amit Kumar Gautam, Sudipta Majumdar

Abstract:

This paper presents parameter estimation of a single-phase rectifier using extended Kalman filter (EKF). The state space model has been obtained using Kirchhoff’s current law (KCL) and Kirchhoff’s voltage law (KVL). The capacitor voltage and diode current of the circuit have been estimated using EKF. Simulation results validate the better accuracy of the proposed method as compared to the least mean square method (LMS). Further, EKF has the advantage that it can be used for nonlinear systems.

Keywords: Extended Kalman filter, parameter estimation, single phase rectifier, state space modelling.

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