Search results for: deep submicronCMOS circuits

Authors: G. Ait Abdelmalek, R. Ziani

Abstract:

In this document, we have proposed a robust conceptual strategy, in order to improve the robustness against the manufacturing defects and thus the reliability of logic CMOS circuits. However, in order to enable the use of future CMOS technology nodes this strategy combines various types of design: DFR (Design for Reliability), techniques of tolerance: hardware redundancy TMR (Triple Modular Redundancy) for hard error tolerance, the DFT (Design for Testability. The Results on largest ISCAS and ITC benchmark circuits show that our approach improves considerably the reliability, by reducing the key factors, the area costs and fault tolerance probability.

Keywords: Design for reliability, design for testability, fault tolerance, manufacturing yield.

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Authors: Ákos Pintér, István Dénes

Abstract:

The so-called all-pass filter circuits are commonly used in the field of signal processing, control and measurement. Being connected to capacitive loads, these circuits tend to loose their stability; therefore the elaborate analysis of their dynamic behavior is necessary. The compensation methods intending to increase the stability of such circuits are discussed in this paper, including the socalled lead-lag compensation technique being treated in detail. For the dynamic modeling, a two-port network model of the all-pass filter is being derived. The results of the model analysis show, that effective lead-lag compensation can be achieved, alone by the optimization of the circuit parameters; therefore the application of additional electric components are not needed to fulfill the stability requirement.

Keywords: all-pass filter, frequency compensation, stability, linear modeling

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Authors: Nuntaporn Aukkanit

Abstract:

The aim of this study was to determine the effect of oils on chemical, physical, and sensory properties of deep-fried dough stick. Five kinds of vegetable oil which were used for addition and frying consist of: palm oil, soybean oil, sunflower oil, rice bran oil, and canola oil. The results of this study showed that using different kinds of oil made significant difference in the quality of deep-fried dough stick. Deep-fried dough stick fried with the rice bran oil had the lowest moisture loss and oil absorption (p≤0.05), but it had some unsatisfactory physical properties (color, specific volume, density, and texture) and sensory characteristics. Nonetheless, deep-fried dough stick fried with the sunflower oil had moisture loss and oil absorption slightly more than the rice bran oil, but it had almost higher physical and sensory properties. Deep-fried dough sticks together with the sunflower oil did not have different sensory score from the palm oil, commonly used for production of deep-fried dough stick. These results indicated that addition and frying with the sunflower oil are appropriate for the production of deep-fried dough stick.

Keywords: Deep-fried dough stick, palm oil, sunflower oil, rice bran oil.

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Authors: M.Hosseinghadiry, H. Mohammadi, M.Nadisenejani

Abstract:

with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Keywords: Full adder, XNOR, Low power, High performance, Very Large Scale Integrated Circuit.

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Authors: Haider M. Alsaeq

Abstract:

This research investigates the effects of the opening shape and location on the structural behavior of reinforced concrete deep beam with openings, while keeping the opening size unchanged. The software ANSYS 12.1 is used to handle the nonlinear finite element analysis. The ultimate strength of reinforced concrete deep beam with opening obtained by ANSYS 12.1 shows fair agreement with the experimental results, with a difference of no more than 20%. The present work concludes that the opening location has much more effect on the structural strength than the opening shape. It was concluded that placing the openings near the upper corners of the deep beam may double the strength, and the use of a rectangular narrow opening, with the long sides in the horizontal direction, can save up to 40% of structural strength of the deep beam.

Keywords: Deep Beams, Finite Element, Opening, Reinforced Concrete.

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Authors: M. Abdallah

Abstract:

Urban development requires deep excavations near buildings and other structures. Deep excavation has become more a necessity for better utilization of space as the population of the world has dramatically increased. In Lebanon, some urban areas are very crowded and lack spaces for new buildings and underground projects, which makes the usage of underground space indispensable. In this paper, a numerical modeling is performed using the finite element method to study the deep excavation-diaphragm wall soil-structure interaction in the case of nonlinear soil behavior. The study is focused on a comparison of the results obtained using different support systems. Furthermore, a parametric study is performed according to the remoteness of the structure.

Keywords: Deep excavation, ground anchors, interaction, struts.

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Authors: Shuen-Tai Wang, Fang-An Kuo, Chau-Yi Chou, Yu-Bin Fang

Abstract:

2016 has become the year of the Artificial Intelligence explosion. AI technologies are getting more and more matured that most world well-known tech giants are making large investment to increase the capabilities in AI. Machine learning is the science of getting computers to act without being explicitly programmed, and deep learning is a subset of machine learning that uses deep neural network to train a machine to learn  features directly from data. Deep learning realizes many machine learning applications which expand the field of AI. At the present time, deep learning frameworks have been widely deployed on servers for deep learning applications in both academia and industry. In training deep neural networks, there are many standard processes or algorithms, but the performance of different frameworks might be different. In this paper we evaluate the running performance of two state-of-the-art distributed deep learning frameworks that are running training calculation in parallel over multi GPU and multi nodes in our cloud environment. We evaluate the training performance of the frameworks with ResNet-50 convolutional neural network, and we analyze what factors that result in the performance among both distributed frameworks as well. Through the experimental analysis, we identify the overheads which could be further optimized. The main contribution is that the evaluation results provide further optimization directions in both performance tuning and algorithmic design.

Keywords: Artificial Intelligence, machine learning, deep learning, convolutional neural networks.

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Authors: Maziar Ramezani, Thomas Neitzert

Abstract:

This paper gives an overview of a deep drawing process by pressurized liquid medium separated from the sheet by a rubber diaphragm. Hydroforming deep drawing processing of sheet metal parts provides a number of advantages over conventional techniques. It generally increases the depth to diameter ratio possible in cup drawing and minimizes the thickness variation of the drawn cup. To explore the deformation mechanism, analytical and numerical simulations are used for analyzing the drawing process of an AA6061-T4 blank. The effects of key process parameters such as coefficient of friction, initial thickness of the blank and radius between cup wall and flange are investigated analytically and numerically. The simulated results were in good agreement with the results of the analytical model. According to finite element simulations, the hydroforming deep drawing method provides a more uniform thickness distribution compared to conventional deep drawing and decreases the risk of tearing during the process.

Keywords: Deep drawing, Hydroforming, Rubber diaphragm

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Authors: A.Khaja Kamaluddin, B.Muhammed Yousoof

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Routing places an important role in determining the quality of service in wireless networks. The routing methods adopted in wireless networks have many drawbacks. This paper aims to review the current routing methods used in wireless networks. This paper proposes an innovative solution to overcome the problems in routing. This solution is aimed at improving the Quality of Service. This solution is different from others as it involves the resuage of the part of the virtual circuits. This improvement in quality of service is important especially in propagation of multimedia applications like video, animations etc. So it is the dire need to propose a new solution to improve the quality of service in ATM wireless networks for multimedia applications especially during this era of multimedia based applications.

Keywords: Packet buffering, Routing Table, Virtual Circuits (VC)

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Authors: Vishal Naranje, S. Kumar

Abstract:

In this paper a low cost knowledge base system (KBS) framework is proposed for design of deep drawing die and procedure for developing system modules. The task of building the system is structured into different modules for major activities of design of deep drawing die. A manufacturability assessment module of the proposed framework is developed to check the manufacturability of deep drawn parts. The technological knowledge is represented by using IF- THEN rules and it is coded in AutoLISP language. The module is designed to be loaded into the prompt area of AutoCAD. The cost of implementation of proposed system makes it affordable for small and medium scale sheet metal industries.

Keywords: Knowledge base system, Deep drawing die, Manufacturability, Sheet metal.

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Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Sallehand Tan Kong Yew

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This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: Readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), and ion sensor electronics.

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Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Sallehand, Tan Kong Yew

Abstract:

This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 Rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: Readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), ion sensor electronics.

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Authors: Mannal Tariq

Abstract:

Construction industry is making progress at a high pace. The trend of the world is getting more biased towards the high rise buildings. Deep beams are one of the most common elements in modern construction having small span to depth ratio. Deep beams are mostly used as transfer girders. This experimental study consists of 16 reinforced concrete (RC) deep beams. These beams were divided into two groups; A and B. Groups A and B consist of eight beams each, having 381 mm (15 in) and 457 mm (18 in) depth respectively. Each group was further subdivided into four sub groups each consisting of two identical beams. Each subgroup was comprised of solid/control beam (without opening), opening above neutral axis (NA), at NA and below NA. Except for control beams, all beams with openings were strengthened with carbon fibre reinforced polymer (CFRP) vertical strips. These eight groups differ from each other based on depth and location of openings. For testing sake, all beams have been loaded with two symmetrical point loads. All beams have been designed based on strut and tie model concept. The outcome of experimental investigation elaborates the difference in the shear behaviour of deep beams based on depth and location of circular openings variation. 457 mm (18 in) deep beam with openings above NA show the highest strength and 381 mm (15 in) deep beam with openings below NA show the least strength. CFRP sheets played a vital role in increasing the shear capacity of beams.

Keywords: CFRP, deep beams, openings in deep beams, strut and tie model, shear behaviour.

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Authors: Pingping Lin, Xudong Luo, Yifan Fan

Abstract:

Sentiment analysis is a very active research topic. Every day, Facebook, Twitter, Weibo, and other social media, as well as significant e-commerce websites, generate a massive amount of comments, which can be used to analyse peoples opinions or emotions. The existing methods for sentiment analysis are based mainly on sentiment dictionaries, machine learning, and deep learning. The first two kinds of methods rely on heavily sentiment dictionaries or large amounts of labelled data. The third one overcomes these two problems. So, in this paper, we focus on the third one. Specifically, we survey various sentiment analysis methods based on convolutional neural network, recurrent neural network, long short-term memory, deep neural network, deep belief network, and memory network. We compare their futures, advantages, and disadvantages. Also, we point out the main problems of these methods, which may be worthy of careful studies in the future. Finally, we also examine the application of deep learning in multimodal sentiment analysis and aspect-level sentiment analysis.

Keywords: Natural language processing, sentiment analysis, document analysis, multimodal sentiment analysis, deep learning.

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Authors: Yngvar Berg, Mehdi Azadmehr

Abstract:

In this paper we present a linear autozeroing ultra lowvoltage amplifier. The autozeroing performed by all ULV circuits is important to reduce the impact of noise and especially avoid power supply noise in mixed signal low-voltage CMOS circuits. The simulated data presented is relevant for a 90nm TSMC CMOS process.

Keywords: Low-voltage, trans conductance amplifier, linearity, floating-gate.

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Authors: E. Farshidi

Abstract:

This paper presents a new general technique for analysis of noise in static log-domain translinear circuits. It is demonstrated that employing this technique, leads to a general, simple and routine method of the noise analysis. The circuit has been simulated by HSPICE. The simulation results are seen to conform to the theoretical analysis and shows benefits of the proposed circuit.

Keywords: Noise analysis, log-domain, static, dynamic, translinear loop, companding.

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Authors: Shashank Gautam, Pramod Sharma

Abstract:

In present era, development of digital circuits, signal processors and other integrated circuits, magnitude comparators are challenged by large area and more power consumption. Comparator is most basic circuit that performs comparison. This paper presents a technique to design a two bit comparator which consumes less area and power. DSCH and MICROWIND version 3 are used to design the schematic and design the layout of the schematic, observe the performance parameters at different nanometer technologies respectively.

Keywords: Chip design, consumed power, layout area, two bit comparator.

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Authors: G.Ramana Murthy, C.Senthilpari, P.Velrajkumar, Lim Tien Sze

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The proposed multiplexer-based novel 1-bit full adder cell is schematized by using DSCH2 and its layout is generated by using microwind VLSI CAD tool. The adder cell layout interconnect analysis is performed by using BSIM4 layout analyzer. The adder circuit is compared with other six existing adder circuits for parametric analysis. The proposed adder cell gives better performance than the other existing six adder circuits in terms of power, propagation delay and PDP. The proposed adder circuit is further analyzed for interconnect analysis, which gives better performance than other adder circuits in terms of layout thickness, width and height.

Keywords: Full Adder, Interconnect Analysis, Low-Power, Multiplexer, Propagation Delay, Parametric Analysis.

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Authors: Wentian Shi, Daming Shi, Maysam Orouskhani, Feng Tian

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Currently the most prevalent deep learning methods require a large amount of data for training, whereas few-shot learning tries to learn a model from limited data without extensive retraining. In this paper, we present a loss function based on triplet loss for solving few-shot problem using metric based learning. Instead of setting the margin distance in triplet loss as a constant number empirically, we propose an adaptive margin distance strategy to obtain the appropriate margin distance automatically. We implement the strategy in the deep siamese network for deep metric embedding, by utilizing an optimization approach by penalizing the worst case and rewarding the best. Our experiments on image recognition and co-segmentation model demonstrate that using our proposed triplet loss with adaptive margin distance can significantly improve the performance.

Keywords: Few-shot learning, triplet network, adaptive margin, deep learning.

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Authors: S.H. Suseno, T.A.Yang, W.N. Abdullah , N.A. Febrianto, W.N. Asti, B. Bahtiar, Hamidah, A. Suman, Desniar, A. Hartoyo

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Sixteen selected deep-sea fish obtained from Southern Java Ocean and Western Sumatra Ocean was analyzed to determine its proximate, fatty acid and mineral composition. The moisture content was ranged from 64.38 to 86.04 %, ash from 0.17 to 0.69 %, the fat content was 1.54 – 13.30 % while the protein content varied from 15.84 to 23.60%. Among the fatty acids, oleic acid and palmitic acid was the dominant MUFA and SFA. Linoleic acid was the highest PUFA found at the selected deep-sea fish. Phospor was the highest macroelement concentration on selected deep-sea fish, followed by K, Ca, Mg and Iod, Fe and Zn among microelement. The trace concentration was found at Se microelement.

Keywords: deep-sea fish, fatty acid, microelement, macroelement, monounsaturated fatty acid, proximate, polyunsaturated fatty acids.

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Authors: Yang Luo, Beibei Wang

Abstract:

In this paper, we present a design methodology of lightweight register transfer level (RTL) hardware threat implemented based on a MAX II FPGA platform. The dynamic power consumed by the toggling of the various bit of registers as well as the dynamic power consumed per unit of logic circuits were analyzed. The hardware threat was designed taking advantage of the differences in dynamic power consumed per unit of logic circuits to hide the transfer information. The experiment result shows that the register hardware threat was successfully implemented by using different dynamic power consumed per unit of logic circuits to hide the key information of DES encryption module. It needs more than 100000 sample curves to reduce the background noise by comparing the sample space when it completely meets the time alignment requirement. In additional, an external trigger signal is playing a very important role to detect the hardware threat in this experiment.

Keywords: Side-channel analysis, hardware threat, register transfer level, dynamic power.

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Authors: Majid Reza Naseh, Mohammad Haeri

Abstract:

This paper introduces an adaptive control scheme to synchronize two identical Chua's systems. Introductory part of the paper is presented in the first part of the paper and then in the second part, a new theorem is proposed based on which an adaptive control scheme is developed to synchronize two identical modified Chua's circuit. Finally, numerical simulations are included to verify the effectiveness of the proposed control method.

Keywords: Chaos synchronization, adaptive control, Chua's circuits.

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Authors: Wenji Zhu, Yigang He

Abstract:

This paper presents a new method of analog fault diagnosis based on back-propagation neural networks (BPNNs) using wavelet decomposition and fractal dimension as preprocessors. The proposed method has the capability to detect and identify faulty components in an analog electronic circuit with tolerance by analyzing its impulse response. Using wavelet decomposition to preprocess the impulse response drastically de-noises the inputs to the neural network. The second preprocessing by fractal dimension can extract unique features, which are the fed to a neural network as inputs for further classification. A comparison of our work with [1] and [6], which also employs back-propagation (BP) neural networks, reveals that our system requires a much smaller network and performs significantly better in fault diagnosis of analog circuits due to our proposed preprocessing techniques.

Keywords: Analog circuits, fault diagnosis, tolerance, wavelettransform, fractal dimension, box dimension.

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Authors: Alexandr A. Penin

Abstract:

Application of projective geometry to the theory of two-ports and cascade circuits with a load change is considered. The equations linking the input and output of a two-port are interpreted as projective transformations which have the invariant as a cross-ratio of four points. This invariant has place for all regime parameters in all parts of a cascade circuit. This approach allows justifying the definition of a regime and its change, to calculate a circuit without explicitly finding the aparameters, to transmit accurately an analogue signal through the unstable two-port.

Keywords: Circuit regime, geometric circuit theory, projective geometry, two-port.

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Authors: Delowar Hossain, Genci Capi

Abstract:

This paper concerns with the problem of deep learning parameters tuning using a genetic algorithm (GA) in order to improve the performance of deep learning (DL) method. We present a GA based DL method for robot object recognition and grasping. GA is used to optimize the DL parameters in learning procedure in term of the fitness function that is good enough. After finishing the evolution process, we receive the optimal number of DL parameters. To evaluate the performance of our method, we consider the object recognition and robot grasping tasks. Experimental results show that our method is efficient for robot object recognition and grasping.

Keywords: Deep learning, genetic algorithm, object recognition, robot grasping.

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Authors: Yifan Fan, Xudong Luo, Pingping Lin

Abstract:

Nowadays, dialogue systems increasingly become the way for humans to access many computer systems. So, humans can interact with computers in natural language. A dialogue system consists of three parts: understanding what humans say in natural language, managing dialogue, and generating responses in natural language. In this paper, we survey deep learning based methods for dialogue management, response generation and dialogue evaluation. Specifically, these methods are based on neural network, long short-term memory network, deep reinforcement learning, pre-training and generative adversarial network. We compare these methods and point out the further research directions.

Keywords: Dialogue management, response generation, reinforcement learning, deep learning, evaluation.

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Authors: D. I. Ekine, C. C. Akpanibah

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This paper analyses the productivity of median scale battery cage and deep litter chicken egg producers in Rivers State, Nigeria. 90 battery cage and 90 deep litter farmers giving a total of 180 farmers were sampled through a multistage sampling procedure. Mean productivity was higher for the battery cage than the deep litter farmers at 2.65 and 2.33 respectively. Productivity of battery cage farmers were positively influenced by age, extension contacts, experience and feed quantity while the productivity of deep litter farmers was positively influenced by age, extension contacts, household size, experience and labour. The major constraints identified by both categories are high cost of feed, high price of day-old chick, inadequate finance, lack of credit and high cost of drug/vaccination. Furthermore, the work recommends that government should assist chicken egg farmers through subsidies of input resources and put policies to make financial institutions give out loans at low interest rate to the farmers. The farmers should abide by the recommended number of birds per unit area while stocking.

Keywords: Productivity, battery cage, deep litter, median scale, egg production.

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Authors: M. A. Sanda, B. Johansson, J. Johansson

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The purpose of this paper is to conceptualize a futureoriented human work environment and organizational activity in deep mines that entails a vision of good and safe workplace. Futureoriented technological challenges and mental images required for modern work organization design were appraised. It is argued that an intelligent-deep-mine covering the entire value chain, including environmental issues and with work organization that supports good working and social conditions towards increased human productivity could be designed. With such intelligent system and work organization in place, the mining industry could be seen as a place where cooperation, skills development and gender equality are key components. By this perspective, both the youth and women might view mining activity as an attractive job and the work environment as a safe, and this could go a long way in breaking the unequal gender balance that exists in most mines today.

Keywords: Mining activity; deep mining; human operators; intelligent deep mine; work environment; organizational activity.

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Authors: Paulo S. Caparelli, Eduardo Costa, Alexsandro S. Soares, Hipolito Barbosa

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This paper presents an evolutionary method for designing electronic circuits and numerical methods associated with monitoring systems. The instruments described here have been used in studies of weather and climate changes due to global warming, and also in medical patient supervision. Genetic Programming systems have been used both for designing circuits and sensors, and also for determining sensor parameters. The authors advance the thesis that the software side of such a system should be written in computer languages with a strong mathematical and logic background in order to prevent software obsolescence, and achieve program correctness.

Keywords: Pattern recognition, evolutionary computation, biological signal, functional programming.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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Evolvable hardware (EHW) refers to a selfreconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). A lot of research has been done in this area several different EA have been introduced. Every time a specific EA is chosen for solving a particular problem, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade a lot of research has been carried out in order to identify the best parameters for the EA-s components for different “test-problems". However different researchers propose different solutions. In this paper the behaviour of mutation rate on (1+λ) evolution strategy (ES) for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies values of the logic cell inputs, the cell type (for example from AND to NOR) and the circuit output. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates used for the evolved circuits. The experimental results found provide the behaviour of the mutation rate to be used during evolution for the design and optimization of logic circuits. The researches on the best mutation rate during the last 40 years are also summarized.

Keywords: Evolvable hardware, mutation rate, evolutionarycomputation, design of logic circuit.

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