Search results for: consumed power

Authors: Yang Luo, Beibei Wang

Abstract:

In this paper, we present a design methodology of lightweight register transfer level (RTL) hardware threat implemented based on a MAX II FPGA platform. The dynamic power consumed by the toggling of the various bit of registers as well as the dynamic power consumed per unit of logic circuits were analyzed. The hardware threat was designed taking advantage of the differences in dynamic power consumed per unit of logic circuits to hide the transfer information. The experiment result shows that the register hardware threat was successfully implemented by using different dynamic power consumed per unit of logic circuits to hide the key information of DES encryption module. It needs more than 100000 sample curves to reduce the background noise by comparing the sample space when it completely meets the time alignment requirement. In additional, an external trigger signal is playing a very important role to detect the hardware threat in this experiment.

Keywords: Side-channel analysis, hardware threat, register transfer level, dynamic power.

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Authors: Joon-young Jung, Dong-oh Kang, Chang-seok Bae

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Power consumption is rapidly increased in data centers because the number of data center is increased and more the scale of data center become larger. Therefore, it is one of key research items to reduce power consumption in data center. The peak power of a typical server is around 250 watts. When a server is idle, it continues to use around 60% of the power consumed when in use, though vendors are putting effort into reducing this “idle" power load. Servers tend to work at only around a 5% to 20% utilization rate, partly because of response time concerns. An average of 10% of servers in their data centers was unused. In those reason, we propose dynamic power management system to reduce power consumption in green data center. Experiment result shows that about 55% power consumption is reduced at idle time.

Keywords: Data Center, Green IT, Management Server, Power Saving.

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Authors: Jingjing Lan, Jun Zhou, Xin Liu

Abstract:

In this paper, a low-power digital controller for DC-DC power conversion was presented. The controller generates the pulse-width modulated (PWM) signal from digital inputs provided by analog-to-digital converter (ADC). An efficient and simple design scheme to develop the control unit was discussed. This method allows minimization of the consumed resources of the chip and it is based on direct digital design approach. In this application, with the proposed scheme, nearly half area and two-third of the power consumption was saved compared to the conventional schemes. This work illustrates the possibility of implementing low-power and area-efficient power management circuit using direct digital design based approach. 

Keywords: Buck converter, DC-DC power conversion, digital control, proportional-integral (PI) controller.

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Authors: Shashank Gautam, Pramod Sharma

Abstract:

In present era, development of digital circuits, signal processors and other integrated circuits, magnitude comparators are challenged by large area and more power consumption. Comparator is most basic circuit that performs comparison. This paper presents a technique to design a two bit comparator which consumes less area and power. DSCH and MICROWIND version 3 are used to design the schematic and design the layout of the schematic, observe the performance parameters at different nanometer technologies respectively.

Keywords: Chip design, consumed power, layout area, two bit comparator.

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Authors: S. Nazhan, Hassan K. Al-Musawi, Khalid A. Humood

Abstract:

This paper reports on an experimental investigation into the influence of current modulation on the properties of a vertical-cavity surface-emitting laser (VCSEL) with a direct square wave modulation. The optical output power response, as a function of the pumping current, modulation frequency, and amplitude, is measured for an 850 nm VCSEL. We demonstrate that modulation frequency and amplitude play important roles in reducing the VCSEL’s power consumption for optical generation. Indeed, even when the biasing current is below the static threshold, the VCSEL emits optical power under the square wave modulation. The power consumed by the device to generate light is significantly reduced to > 50%, which is below the threshold current, in response to both the modulation frequency and amplitude. An operating VCSEL device at low power is very desirable for less thermal effects, which are essential for a high-speed modulation bandwidth.

Keywords: VCSELs, optical power generation, power consumption, square wave modulation.

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Authors: Tao Shun, Xiao Xiangning, HadjSaid, N.

Abstract:

In a liberalized electricity market, it is not surprising that different customers require different power quality (PQ) levels at different price. Power quality related to several power disturbances is described by many parameters, so how to define a comprehensive hierarchy evaluation system of power quality (PQCHES) has become a concerned issue. In this paper, based on four electromagnetic compatibility (EMC) levels, the numerical range of each power disturbance is divided into five grades (Grade I –Grade V), and the “barrel principle" of power quality is used for the assessment of overall PQ performance with only one grade indicator. A case study based on actual monitored data of PQ shows that the site PQ grade indicates the electromagnetic environment level and also expresses the characteristics of loads served by the site. The shortest plank principle of PQ barrel is an incentive mechanism, which can combine with the rewards/penalty mechanism (RPM) of consumed energy “on quality demand", to stimulate utilities to improve the overall PQ level and also stimulate end-user more “smart" under the infrastructure of future SmartGrid..

Keywords: Power quality, electromagnetic compatibility, SmartGrid, comprehensive evaluation, barrel principle, electricitymarket

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Authors: Kayun Chantarasathaporn, Chonawat Srisa-an

Abstract:

Low power consumption is a major constraint for battery-powered system like computer notebook or PDA. In the past, specialists usually designed both specific optimized equipments and codes to relief this concern. Doing like this could work for quite a long time, however, in this era, there is another significant restraint, the time to market. To be able to serve along the power constraint while can launch products in shorter production period, objectoriented programming (OOP) has stepped in to this field. Though everyone knows that OOP has quite much more overhead than assembly and procedural languages, development trend still heads to this new world, which contradicts with the target of low power consumption. Most of the prior power related software researches reported that OOP consumed much resource, however, as industry had to accept it due to business reasons, up to now, no papers yet had mentioned about how to choose the best OOP practice in this power limited boundary. This article is the pioneer that tries to specify and propose the optimized strategy in writing OOP software under energy concerned environment, based on quantitative real results. The language chosen for studying is C# based on .NET Framework 2.0 which is one of the trendy OOP development environments. The recommendation gotten from this research would be a good roadmap that can help developers in coding that well balances between time to market and time of battery.

Keywords: Low power consumption, object oriented programming, power conscious system, software.

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Authors: Vinod Kumar Khera, R. K. Sharma, A. K. Gupta

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Power dissipation increases exponentially during test mode as compared to normal operation of the circuit. In extreme cases, test power is more than twice the power consumed during normal operation mode. Test vector generation scheme is key component in deciding the power hungriness of a circuit during testing. Test vector count and consequent leakage current are functions of test vector generation scheme. Fault based test vector count optimization has been presented in this work. It helps in reducing test vector count and the leakage current. In the presented scheme, test vectors have been reduced by extracting essential child vectors. The scheme has been tested experimentally using stuck at fault models and results ensure the reduction in test vector count.

Keywords: Low power VLSI testing, independent fault, essential faults, test vector reduction.

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Authors: F. O. Aron, T. O. Olwal, A. Kurien, M. O. Odhiambo

Abstract:

A considerable amount of energy is consumed during transmission and reception of messages in a wireless mesh network (WMN). Reducing per-node transmission power would greatly increase the network lifetime via power conservation in addition to increasing the network capacity via better spatial bandwidth reuse. In this work, the problem of topology control in a hybrid WMN of heterogeneous wireless devices with varying maximum transmission ranges is considered. A localized distributed topology control algorithm is presented which calculates the optimal transmission power so that (1) network connectivity is maintained (2) node transmission power is reduced to cover only the nearest neighbours (3) networks lifetime is extended. Simulations and analysis of results are carried out in the NS-2 environment to demonstrate the correctness and effectiveness of the proposed algorithm.

Keywords: Topology Control, Wireless Mesh Networks, Backbone, Energy Efficiency, Localized Algorithm.

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Authors: H. Rezzouk, M. Hatti, H. Rahmani, S. Atoui

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This paper discusses the design and analysis of a hybrid PV-Fuel cell energy system destined to power a DC load. The system is composed of a photovoltaic array, a fuel cell, an electrolyzer and a hydrogen tank. HOMER software is used in this study to calculate the optimum capacities of the power system components that their combination allows an efficient use of solar resource to cover the hourly load needs. The optimal system sizing allows establishing the right balance between the daily electrical energy produced by the power system and the daily electrical energy consumed by the DC load using a 28 KW PV array, a 7.5 KW fuel cell, a 40KW electrolyzer and a 270 Kg hydrogen tank. The variation of powers involved into the DC bus of the hybrid PV-fuel cell system has been computed and analyzed for each hour over one year: the output powers of the PV array and the fuel cell, the input power of the elctrolyzer system and the DC primary load. Equally, the annual variation of stored hydrogen produced by the electrolyzer has been assessed. The PV array contributes in the power system with 82% whereas the fuel cell produces 18%. 38% of the total energy consumption belongs to the DC primary load while the rest goes to the electrolyzer.

Keywords: Electrolyzer, Hydrogen, Hydrogen Fueled Cell, Photovoltaic.

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Authors: Mohamed Idris S. Abozaed, Suliman Mohamed Elrajoubi

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Researches and concerns in power quality gained significant momentum in the field of power electronics systems over the last two decades globally. This sudden increase in the number of concerns over power quality problems is a result of the huge increase in the use of non-linear loads. In this paper, power quality evaluation of some distribution networks at Misurata - Libya has been done using a power quality and energy analyzer (Fluke 437 Series II). The results of this evaluation are used to minimize the problems of power quality. The analysis shows the main power quality problems that exist and the level of awareness of power quality issues with the aim of generating a start point which can be used as guidelines for researchers and end users in the field of power systems.

Keywords: Power Quality Disturbances, Power Quality Evaluation, Statistical Analysis.

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Authors: Ademuyiwa, M. O., Sanni, S. A.

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The importance of maternal nutritional practices during pregnancy cannot be overemphasized. This paper assessed the consumption pattern and dietary practices of 50 pregnant women selected using purposive sampling technique from three health care centres (Primary Health Care Centre, Obantoko; Primary Health Care Centre Alabata; and the General Hospital, Odeda) in Odeda Local Government Area of Ogun State, Nigeria. Structured questionnaire was used to elicit information on socioeconomic status, consumption pattern and dietary practices. Data were analyzed using the Statistical Package for Social Sciences (SPSS, 17). The results indicated that about 58% of the pregnant women were below the age of 30 while 42% were ages 28-40 years. Only 16% had tertiary education while (38%) had secondary education, 52% earn income through petty trading. On food intake, 52% got their energy source from rice on a daily basis, followed by pap (38%) and eko (34%). For protein intake, 36% consumed bean cake on a daily basis while 66% consumed moinmoin 2-3 times a week. Orange (48%) and Green Leafy vegetable (40%) accounted for the mostly consumed fruit and vegetable on daily basis. In terms of animal origin, fish (76%), meat (58%) and eggs (30%) were consumed daily, while chicken and snail were consumed occasionally by 54% and 42%, respectively. Forty-six percent (46%) of the pregnant women eat more than three times daily; while 60% of the women eat outside their homes with 42% respondents eat out lunch and only two percent least eaten out dinner. It is important to increase in awareness campaign to sensitize the pregnant women on the importance of good nutrition especially fruits, vegetables and dairy products. 

Keywords: Consumption Pattern, Dietary Practices, Pregnant, Women, Nigeria.

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Authors: T. Mohammed Chikouche, K. Hartani

Abstract:

In order to solve the instantaneous power ripple and achieve better performance of direct power control (DPC) for a three-phase PWM rectifier, a control method is proposed in this paper. This control method is applied to overcome the instantaneous power ripple, to eliminate line current harmonics and therefore reduce the total harmonic distortion and to improve the power factor. A switching table is based on the analysis on the change of instantaneous active and reactive power, to select the optimum switching state of the three-phase PWM rectifier. The simulation result shows feasibility of this control method.

Keywords: Power quality, direct power control, power ripple, switching table, unity power factor.

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Authors: Harkishen Singh, Gavin Mangeni

Abstract:

This project aims at building an efficient and automatic power monitoring SCADA system, which is capable of monitoring the electrical parameters of high voltage powered devices in real time for example RMS voltage and current, frequency, energy consumed, power factor etc. The system uses RS-485 serial communication interface to transfer data over longer distances. Embedded C programming is the platform used to develop two hardware modules namely: RTU and Master Station modules, which both use the CC2540 BLE 4.0 microcontroller configured in slave / master mode. The Si8900 galvanic ally isolated microchip is used to perform ADC externally. The hardware communicates via UART port and sends data to the user PC using the USB port. Labview software is used to design a user interface to display current state of the power loads being monitored as well as logs data to excel spreadsheet file. An understanding of the Si8900’s auto baud rate process is key to successful implementation of this project.

Keywords: SCADA, RS485, CC2540, Labview, Si8900.

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Authors: Hasmayadi Abdul Majid, Yuzman Yusoff, Noor Shelida Salleh

Abstract:

This paper presents the development of a single-ended 38.5 kS/s 10-bit programmable reference SAR ADC which is realized in MIMOS’s 0.35 µm CMOS process. The design uses a resistive DAC, a dynamic comparator with pre-amplifier and a SAR digital logic to create 10 effective bits ADC. A programmable reference circuitry allows the ADC to operate with different input range from 0.6 V to 2.1 V. The ADC consumed less than 7.5 mW power with a 3 V supply.

Keywords: Successive Approximation Register Analog-to- Digital Converter, SAR ADC, Resistive DAC, Programmable Reference.

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Authors: T. Hussein

Abstract:

The use of power system stabilizers (PSSs) to damp power system swing mode of oscillations is practical important. Our purpose is to retune the power system stabilizer (PSS1A) parameters in Unitrol D produced by ABB– was installed in 1995in Benghazi North Power Plants (BNPPs) at General Electricity Company of Libya (GECOL). The optimal values of the power system stabilizer (PSS1A) parameters are determined off-line by a particle swarm optimization technique (PSO). The objective is to damp the local and inter-area modes of oscillations that occur following power system disturbances. The retuned power system stabilizer (PSS1A) can cope with large disturbance at different operating points and has enhanced power system stability.

Keywords: Static excitation system, particle swarm optimization (PSO), power system stabilizer (PSS).

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Authors: A. Ourici

Abstract:

This paper proposes a direct power control for doubly-fed induction machine for variable speed wind power generation. It provides decoupled regulation of the primary side active and reactive power and it is suitable for both electric energy generation and drive applications. In order to control the power flowing between the stator of the DFIG and the network, a decoupled control of active and reactive power is synthesized using PI controllers.The obtained simulation results show the feasibility and the effectiveness of the suggested method

Keywords: Doubly fed induction machine , decoupled power control , vector control , active and reactive power, PWM inverter

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Authors: Hyung-Nam Kim, Won-Yong Chae, Dong-Sul Shin, Ho-Sung Kim, Hee-Je Kim

Abstract:

A wireless power transfer system can attribute to the fields in robot, aviation and space in which lightening the weight of device and improving the movement play an important role. A wireless power transfer system was investigated to overcome the inconvenience of using power cable. Especially a wireless power transfer technology is important element for mobile robots. We proposed the wireless power transfer system of the half-bridge resonant converter with the frequency tracking and optimized power transfer control unit. And the possibility of the application and development system was verified through the experiment with LED loads.

Keywords: Wireless Power Transmission (WPT), resonancefrequency, protection circuit. LED.

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Authors: Tosaphol Ratniyomchai, Uthai Jaithong, Thanatchai Kulworawanichpong

Abstract:

This paper presents an application of power line carrier (PLC) for electrical power telemetering. This system has a special capability of transmitting the measured values to a centralized computer via power lines. The PLC modem as a passive high-pass filter is designed for transmitting and receiving information. Its function is to send the information carrier together with transmitted data by superimposing it on the 50 Hz power frequency signal. A microcontroller is employed to function as the main processing of the modem. It is programmed for PLC control and interfacing with other devices. Each power meter, connected via a PLC modem, is assigned with a unique identification number (address) for distinguishing each device from one another.

Keywords: Power telemetering, Power line carrier, High-passfilter, Digital data transmission

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Authors: Tomislav Stambolic, Anton Causevski

Abstract:

The deficit of power supply in Macedonia is almost 30% or reached up to 3000 GWh in a year. The existing thermal and hydro power plants are not enough to cover the power and energy, so the import increases every year. Therefore, in order to have more domestic energy supply, the new trends in renewable and energy efficiency should be implemented in power sector. The paper gives some perspectives for development of the power system in Macedonia, taking into account the growth of electricity demand and in the same time with implementation of renewable and energy efficiency. The development of power system is made for the period up to 2030 with the period of every 5 years.

Keywords: Energy, Power System, Renewable, Efficiency

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Authors: Ákos Cserny

Abstract:

The unequivocal increase of the area of operation of the executive power can happen with the appearance of new areas to be influenced and its integration in the power, or at the expense of the scopes of other organs with public authority. The extension of the executive can only be accepted within the framework of the rule of law if parallel with this process we get constitutional guarantees that the exercise of power is kept within constitutional framework. Failure to do so, however, may result in the lack, deficit of democracy and democratic sense, and may cause an overwhelming dominance of the executive power. Therefore, the aim of this paper is to present executive power and responsibility in the context of different dimensions.

Keywords: Confidence, constitution, executive power, liability, parliamentarism.

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Authors: Tarek A. Kasmieh, Hassan S. Omran

Abstract:

This paper aims to give a full study of the dynamic behavior of a mono-phase active power filter. First, the principle of the parallel active power filter will be introduced. Then, a dimensioning procedure for all its components will be explained in detail, such as the input filter, the current and voltage controllers. This active power filter is simulated using OrCAD program showing the validity of the theoretical study.

Keywords: Active power filter, Power Quality, Hysteresiscurrent controller.

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Authors: I. Habi, M. Bouguerra, D. Ouahdi, H. Meglouli

Abstract:

In this paper, we apply the PQ theory with shunt active power filter in an unbalanced and distorted power system voltage to compensate the perturbations generated by non linear load. The power factor is also improved in the current source. The PLL system is used to extract the fundamental component of the even sequence under conditions mentioned of the power system voltage.

Keywords: Converter, power filter, harmonies, non-linear load, pq theory, PLL, unbalanced voltages, distorted voltages.

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Authors: Anil Kumar Pandey

Abstract:

Power plane noise is the most significant source of signal integrity (SI) issues in a high-speed digital design. In this paper, power integrity (PI) analysis of multiple power planes in a power delivery system of a 12-layer high-speed FPGA board is presented. All 10 power planes of HSD board are analyzed separately by using 3D Electromagnetic based PI solver, then the transient simulation is performed on combined PI data of all planes along with voltage regulator modules (VRMs) and 70 current drawing chips to get the board level power noise coupling on different high-speed signals. De-coupling capacitors are placed between power planes and ground to reduce power noise coupling with signals.

Keywords: Channel simulation, electromagnetic simulation, power-aware signal integrity analysis, power integrity, PIPro.

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Authors: Mohammad Hasan Raouf, Azim Nowbakht, Mohammad Bagher Haddadi, Mohammad Reza Tabatabaei

Abstract:

Power quality has become a very important issue recently due to the impact on electricity suppliers, equipment manufacturers and customers. Power quality is described as the variation of voltage, current and frequency in a power system. Voltage magnitude is one of the major factors that determine the quality of power. Indeed, custom power technology, the low-voltage counterpart of the more widely known flexible ac transmission system (FACTS) technology, aimed at high-voltage power transmission applications, has emerged as a credible solution to solve many problems relating to power quality problems. There are various power quality problems such as voltage sags, swells, flickers, interruptions and harmonics etc. Active Power Filter (APF) is one of the custom power devices and can mitigate harmonics, reactive power and unbalanced load currents originating from load side. In this study, an extensive review of APF studies, the advantages and disadvantages of each introduced methods are presented. The study also helps the researchers to choose the optimum control techniques and power circuit configuration for APF applications.

Keywords: Power Quality, Custom Power, Active Filter, Control Approach.

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Authors: Shashank Gautam

Abstract:

This paper proposes techniques like MT CMOS, POWER GATING, DUAL STACK, GALEOR and LECTOR to reduce the leakage power. A Full Adder has been designed using these techniques and power dissipation is calculated and is compared with general CMOS logic of Full Adder. Simulation results show the validity of the proposed techniques is effective to save power dissipation and to increase the speed of operation of the circuits to a large extent.

Keywords: Low Power, MT CMOS, Galeor, Lector, Power Gating, Dual Stack, Full Adder.

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Authors: M. Salehi, A. A. Motie Birjandi, F. Namdari

Abstract:

Weak damping of low frequency oscillations is a frequent phenomenon in electrical power systems. These frequencies can be damped by power system stabilizers. Unified power flow controller (UPFC), as one of the most important FACTS devices, can be applied to increase the damping of power system oscillations and the more effect of this controller on increasing the damping of oscillations depends on its proper placement in power systems. In this paper, a technique based on controllability is proposed to select proper location of UPFC and the best input control signal in order to enhance damping of power oscillations. The effectiveness of the proposed technique is demonstrated in IEEE 9 bus power system.

Keywords: Unified power flow controller (UPFC), controllability, small signal analysis, eigenvalues.

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Authors: A.V.Naresh Babu, S.Sivanagaraju, Ch.Padmanabharaju, T.Ramana

Abstract:

The interline power flow controller (IPFC) is one of the latest generation flexible AC transmission systems (FACTS) controller used to control power flows of multiple transmission lines. This paper presents a mathematical model of IPFC, termed as power injection model (PIM). This model is incorporated in Newton- Raphson (NR) power flow algorithm to study the power flow control in transmission lines in which IPFC is placed. A program in MATLAB has been written in order to extend conventional NR algorithm based on this model. Numerical results are carried out on a standard 2 machine 5 bus system. The results without and with IPFC are compared in terms of voltages, active and reactive power flows to demonstrate the performance of the IPFC model.

Keywords: flexible AC transmission systems (FACTS), interline power flow controller (IPFC), power injection model (PIM), power flow control.

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Authors: Mahdi Ebrahimzadeh

Abstract:

In this paper we introduce an ultra low power CMOS LC oscillator and analyze a method to design a low power low phase noise complementary CMOS LC oscillator. A 1.8GHz oscillator is designed based on this analysis. The circuit has power supply equal to 1.1 V and dissipates 0.17 mW power. The oscillator is also optimized for low phase noise behavior. The oscillator phase noise is -126.2 dBc/Hz and -144.4 dBc/Hz at 1 MHz and 8 MHz offset respectively.

Keywords: LC oscillator, Low Power, Low Phase Noise

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Authors: Hong Li, Linfeng Li, Jianping Hu

Abstract:

With rapid technology scaling, the proportion of the static power consumption catches up with dynamic power consumption gradually. To decrease leakage consumption is becoming more and more important in low-power design. This paper presents a power-gating scheme for P-DTGAL (p-type dual transmission gate adiabatic logic) circuits to reduce leakage power dissipations under deep submicron process. The energy dissipations of P-DTGAL circuits with power-gating scheme are investigated in different processes, frequencies and active ratios. BSIM4 model is adopted to reflect the characteristics of the leakage currents. HSPICE simulations show that the leakage loss is greatly reduced by using the P-DTGAL with power-gating techniques.

Keywords: Leakage reduction, low power, deep submicronCMOS circuits, P-type adiabatic circuits.

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