Search results for: analog circuits

Authors: M. Jagabar Sathik, K. Ramani

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In this paper family of multilevel inverter topology with reduced number of power switches is presented. The proposed inverter can generate both even and odd level. The proposed topology is suitable for symmetric structure. The proposed symmetric inverter results in reduction of power switches, power diode and gate driver circuits and also it may further minimize the installation area and cost. To prove the superiority of proposed topology is compared with conventional topologies. The performance of this symmetric multilevel inverter has been tested by computer based simulation and prototype based experimental setup for nine-level inverter is developed and results are verified.

Keywords: Cascaded H- Bridge (CHB), Multilevel Inverter (MLI), Nearest Level Modulation (NLM), Total Harmonic Distortion (THD).

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Authors: Mansour I. Abbadi, Abdel-Rahman M. Jaradat

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In this paper, a technique is proposed to implement an artificial voltage-controlled capacitance or inductance which can replace the well-known varactor diode in many applications. The technique is based on injecting the current of a voltage-controlled current source onto a fixed capacitor or inductor. Then, by controlling the transconductance of the current source by an external bias voltage, a voltage-controlled capacitive or inductive reactance is obtained. The proposed voltage-controlled reactance devices can be designed to work anywhere in the frequency spectrum. Practical circuits for the proposed voltage-controlled reactances are suggested and simulated.

Keywords: voltage-controlled capacitance, voltage-controlled inductance, varactor diode, variable transconductance.

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Authors: Heesung Lee, Joonkyung Sung, Euntai Kim

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This paper proposes a method which reduces power consumption in single-error correcting, double error-detecting checker circuits that perform memory error correction code. Power is minimized with little or no impact on area and delay, using the degrees of freedom in selecting the parity check matrix of the error correcting codes. The genetic algorithm is employed to solve the non linear power optimization problem. The method is applied to two commonly used SEC-DED codes: standard Hamming and odd column weight Hsiao codes. Experiments were performed to show the performance of the proposed method.

Keywords: Error correcting codes, genetic algorithm, non-linearpower optimization, Hamming code, Hsiao code.

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Authors: Sajid Iqbal, Masood Ahmed, Suhail Aftab Qureshi

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DC-DC converters are widely used in regulated switched mode power supplies and in DC motor drive applications. There are several sources of unwanted nonlinearity in practical power converters. In addition, their operation is characterized by switching that gives birth to a variety of nonlinear dynamics. DC-DC buck and boost converters controlled by pulse-width modulation (PWM) have been simulated. The voltage waveforms and attractors obtained from the circuit simulation have been studied. With the onset of instability, the phenomenon of subharmonic oscillations, quasi-periodicity, bifurcations, and chaos have been observed. This paper is mainly motivated by potential contributions of chaos theory in the design, analysis and control of power converters, in particular and power electronics circuits, in general.

Keywords: Buck converter, boost converter, period- doubling, chaos, bifurcation, strange attractor.

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Authors: Mesut Gündüz, Ferruh Yildiz, Ayşe Onat

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In Geographic Information System, one of the sources of obtaining needed geographic data is digitizing analog maps and evaluation of aerial and satellite photos. In this study, a method will be discussed which can be used to extract vectorial features and creating vectorized drawing files for aerial photos. At the same time a software developed for these purpose. Converting from raster to vector is also known as vectorization and it is the most important step when creating vectorized drawing files. In the developed algorithm, first of all preprocessing on the aerial photo is done. These are; converting to grayscale if necessary, reducing noise, applying some filters and determining the edge of the objects etc. After these steps, every pixel which constitutes the photo are followed from upper left to right bottom by examining its neighborhood relationship and one pixel wide lines or polylines obtained. The obtained lines have to be erased for preventing confusion while continuing vectorization because if not erased they can be perceived as new line, but if erased it can cause discontinuity in vector drawing so the image converted from 2 bit to 8 bit and the detected pixels are expressed as a different bit. In conclusion, the aerial photo can be converted to vector form which includes lines and polylines and can be opened in any CAD application.

Keywords: Vectorization, Aerial Photos, Vectorized DrawingFile.

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Authors: S.Aksoy, Y.Caglar

Abstract:

n-CdO/p-Si heterojunction diode was fabricated using sol-gel spin coating technique which is a low cost and easily scalable method for preparing of semiconductor films. The structural and morphological properties of CdO film were investigated. The X-ray diffraction (XRD) spectra indicated that the film was of polycrystalline nature. The scanning electron microscopy (SEM) images indicate that the surface morphology CdO film consists of the clusters formed with the coming together of the nanoparticles. The electrical characterization of Au/n-CdO/p–Si/Al heterojunction diode was investigated by current-voltage. The ideality factor of the diode was found to be 3.02 for room temperature. The reverse current of the diode strongly increased with illumination intensity of 100 mWcm-2 and the diode gave a maximum open circuit voltage Voc of 0.04 V and short-circuits current Isc of 9.92×10-9 A.

Keywords: CdO, heterojunction semiconductor devices, ideality factor, current-voltage characteristics

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Authors: P. Sanzo

Abstract:

Increased physical fitness participation has been paralleled by increasedoveruse injuries such as insertional Achilles tendinosis (AT). Treatment has provided inconsistentresults. The use of extracorporeal shockwave therapy (ECSWT) offers a new treatment consideration.The purpose of this study was to assess the effects of ECSWTon pain, function, range of motion (ROM), joint mobility and strength in patients with AT. Thirty subjects were treated with ECSWT and measures were takenbefore and three months after treatment. There was significant differences in visual analog scale (VAS) scores for pain at rest (p=0.002); after activity (p= 0.0001); overall improvement(p=0.0001); Lower Extremity Functional Scale (LEFS) scores (p=0.002); dorsiflexion range of motion (ROM) (p=0.0001); plantarflexion strength (p=0.025); talocrural joint anterior glide (p=0.046); and subtalar joint medial and lateral glide (p=0.025).ECSWT offers a new intervention that may limit the progression of the disorder and the long term healthcare costs associated with AT.

Keywords: Extracorporeal shockwave therapy, shockwave therapy, Achilles tendinosis, range of motion, strength, joint mobility

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

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This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

Keywords: Voltage sense amplifier, voltage transition, node stabilization, and biasing circuits.

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Authors: Ararat Khachatryan, Davit Mirzoyan

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In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.

Keywords: Nanoscale, aging, effect, NBTI, HCI.

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Authors: M. Harir, A. Bendiabdellah, A. Chaouch, N. Benouzza

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This paper deals with the modelling and simulation of the squirrel cage induction motor by taking into account all space harmonic components as well as the introduction of the bars skew in the calculation of the linear evolution of the magnetomotive force (MMF) between the slots extremities. The model used is based on multiple coupled circuits and the modified winding function approach (MWFA). The effect of skewing is included in the calculation of motors inductances with an axial asymmetry in the rotor. The simulation results in both time and spectral domains show the effectiveness and merits of the model and the error that may be caused if the skew of the bars are neglected.

Keywords: Modelling, MWFA, Skew effect, Squirrel cage induction motor, Spectral domain.

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Authors: Gianluca Cornetta, David J. Santos

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This paper describes a 2.4 GHz passive switch mixer and a 5/2.5 GHz voltage-controlled negative Gm oscillator (VCO) with an inversion-mode MOS varactor. Both circuits are implemented using a 1P8M 0.13 μm process. The switch mixer has an input referred 1 dB compression point of -3.89 dBm and a conversion gain of -0.96 dB when the local oscillator power is +2.5 dBm. The VCO consumes only 1.75 mW, while drawing 1.45 mA from a 1.2 V supply voltage. In order to reduce the passives size, the VCO natural oscillation frequency is 5 GHz. A clocked CMOS divideby- two circuit is used for frequency division and quadrature phase generation. The VCO has a -109 dBc/Hz phase noise at 1 MHz frequency offset and a 2.35-2.5 GHz tuning range (after the frequency division), thus complying with ZigBee requirements.

Keywords: Switch Mixers, Varactors, IEEE 802.15.4 (ZigBee), Direct Conversion Receiver, Wireless Sensor Networks.

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Authors: A. Mobini, K. Saghafi, V. Ahmadi

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in this paper we modified a simple two-dimensional photonic crystal waveguide by creating micro cavity resonators in order to increase the output light emission which can be applicable to photonic integrated circuits. The micro cavity resonators are constructed by removing two tubes close to the waveguide output. Coupling emitted light from waveguide with those micro cavities, results increasing intensity of waveguide output light. Inserting a tube in last row of waveguide, we have improved directionality of output light beam.

Keywords: photonic crystal, waveguide, micro cavity resonators, directional emission

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Authors: Abdelrahman A. H. Abdelrahim, Gharib Subhi Mahmoud, Sherzod Turaev, Azeddine Messikh

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Quantum gates are the basic building blocks in the quantum circuits model. These gates can be implemented using adiabatic or non adiabatic processes. Adiabatic models can be controlled using auxiliary qubits, whereas non adiabatic models can be simplified by using one single-shot implementation. In this paper, the controlled adiabatic evolutions is combined with the single-shot implementation to obtain quantum gates with controlled non adiabatic evolutions. This is an important improvement which can speed the implementation of quantum gates and reduce the errors due to the long run in the adiabatic model. The robustness of our scheme to different types of errors is also investigated.

Keywords: Adiabatic evolutions, non adiabatic evolutions, controlled adiabatic evolutions, quantum rotation gates, dephasing rates, master equation.

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.

Keywords: Voltage sense amplifier, multi-inputs, voltage transition, node stabilization, and biasing circuits.

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Authors: Muhaned Zaidi, Ian Grout, Abu Khari bin A’ain

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In this paper, a two-stage op-amp design is considered using both Miller and negative Miller compensation techniques. The first op-amp design uses Miller compensation around the second amplification stage, whilst the second op-amp design uses negative Miller compensation around the first stage and Miller compensation around the second amplification stage. The aims of this work were to compare the gain and phase margins obtained using the different compensation techniques and identify the ability to choose either compensation technique based on a particular set of design requirements. The two op-amp designs created are based on the same two-stage rail-to-rail output CMOS op-amp architecture where the first stage of the op-amp consists of differential input and cascode circuits, and the second stage is a class AB amplifier. The op-amps have been designed using a 0.35mm CMOS fabrication process.

Keywords: Op-amp, rail-to-rail output, Miller compensation, negative Miller capacitance.

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Authors: Jae-Chang Kwak, Yong-Seo Koo

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The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PFM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS (DT-CMOS) with low on-resistance is designed to decrease conduction loss. The threshold voltage of DT-CMOS drops as the gate voltage increase, resulting in a much higher current handling capability than standard MOSFET. PFM control circuits consist of a generator, AND gate and comparator. The generator is made to have 1.2MHz oscillation voltage. The DC-DC converter based on PFM control circuit and low on-resistance switching device is presented in this paper.

Keywords: DT-CMOS, PMIC, PFM, DC-DC converter.

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Authors: A. I. Alajtal, H. G. M. Edwards, M. A. Elbagermi

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Raman spectroscopy is currently a part of the instrumentation suite of the ESA ExoMars mission for the remote detection of life signatures in the Martian surface and subsurface. Terrestrial analogues of Martian sites have been identified and the biogeological modifications incurred as a result of extremophilic activity have been studied. Analytical instrumentation protocols for the unequivocal detection of biomarkers in suitable geological matrices are critical for future unmanned explorations, including the forthcoming ESA ExoMars mission to search for life on Mars scheduled for 2018 and Raman spectroscopy is currently a part of the Pasteur instrumentation suite of this mission. Here, Raman spectroscopy using 785nm excitation was evaluated for determining various concentrations of beta-carotene in admixture with polyaromatic hydrocarbons and usnic acid have been investigated by Raman microspectrometry to determine the lowest levels detectable in simulation of their potential identification remotely in geobiological conditions in Martian scenarios. Information from this study will be important for the development of a miniaturized Raman instrument for targetting Martian sites where the biosignatures of relict or extant life could remain in the geological record.

Keywords: Raman spectroscopy, Mars-analog, Beta-carotene, PAHs.

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Authors: Wenmin Qu

Abstract:

A capacitance level sensor with a segmented film electrode and a thin-film volume flow sensor with an innovative by-pass sleeve is presented as industrial products for the application in a harsh environment. The working principle of such sensors is well known; however, the traditional sensors show some limitations for certain industrial measurements. The two sensors presented in this paper overcome this limitation and enlarge the application spectrum. The problem is analyzed, and the solution is given. The emphasis of the paper is on developing the problem-solving concepts and the realization of the corresponding measuring circuits. These should give advice and encouragement, how we can still develop electronic measuring products in an almost saturated market.

Keywords: By-pass sleeve, charge transfer circuit, fixed ΔT circuit, harsh environment, industrial application, segmented electrode.

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Authors: Akash Rathee, Harish Parthasarathy

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In this paper, a frequency-variation based method has been proposed for transistor parameter estimation in a commonemitter transistor amplifier circuit. We design an algorithm to estimate the transistor parameters, based on noisy measurements of the output voltage when the input voltage is a sine wave of variable frequency and constant amplitude. The common emitter amplifier circuit has been modelled using the transistor Ebers-Moll equations and the perturbation technique has been used for separating the linear and nonlinear parts of the Ebers-Moll equations. This model of the amplifier has been used to determine the amplitude of the output sinusoid as a function of the frequency and the parameter vector. Then, applying the proposed method to the frequency components, the transistor parameters have been estimated. As compared to the conventional time-domain least squares method, the proposed method requires much less data storage and it results in more accurate parameter estimation, as it exploits the information in the time and frequency domain, simultaneously. The proposed method can be utilized for parameter estimation of an analog device in its operating range of frequencies, as it uses data collected from different frequencies output signals for parameter estimation.

Keywords: Perturbation Technique, Parameter estimation, frequency-variation based method.

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Authors: Zakir Husain

Abstract:

This paper presents modeling and analysis of 12-phase distribution static compensator (DSTATCOM), which is capable of balancing the source currents in spite of unbalanced loading and phase outages. In addition to balance the supply current, the power factor can be set to a desired value. The theory of instantaneous symmetrical components is used to generate the twelve-phase reference currents. These reference currents are then tracked using current controlled voltage source inverter, operated in a hysteresis band control scheme. An ideal compensator in place of physical realization of the compensator is used. The performance of the proposed DTATCOM is validated through MATLAB simulation and detailed simulation results are given.

Keywords: DSTATCOM, Modeling, Load balancing, Multiphase, Power factor correction.

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Authors: Jun Wang, Tingcun Wei

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The digital pulse width modulator (DPWM) is the crucial building block for digitally-controlled DC-DC switching converter, which converts the digital duty ratio signal into its analog counterpart to control the power MOSFET transistors on or off. With the increase of switching frequency of digitally-controlled DC-DC converter, the DPWM with higher time resolution is required. In this paper, a 15-bits DPWM with three-level hybrid structure is presented; the first level is composed of a7-bits counter and a comparator, the second one is a 5-bits delay line, and the third one is a 3-bits digital dither. The presented DPWM is designed and implemented using the PLL megafunction of FPGA (Field Programmable Gate Arrays), and the required frequency of clock signal is 128 times of switching frequency. The simulation results show that, for the switching frequency of 2 MHz, a DPWM which has the time resolution of 15 ps is achieved using a maximum clock frequency of 256MHz. The designed DPWM in this paper is especially useful for high-frequency digitally-controlled DC-DC switching converters.

Keywords: DPWM, PLL megafunction, FPGA, time resolution, digitally-controlled DC-DC switching converter.

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Authors: Syed Iftekhar Ali, M. S. Islam

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In this paper we present an energy efficient match-line (ML) sensing scheme for high-speed ternary content-addressable memory (TCAM). The proposed scheme isolates the sensing unit of the sense amplifier from the large and variable ML capacitance. It employs feedback in the sense amplifier to successfully detect a match while keeping the ML voltage swing low. This reduced voltage swing results in large energy saving. Simulation performed using 130nm 1.2V CMOS logic shows at least 30% total energy saving in our scheme compared to popular current race (CR) scheme for similar search speed. In terms of speed, dynamic energy, peak power consumption and transistor count our scheme also shows better performance than mismatch-dependant (MD) power allocation technique which also employs feedback in the sense amplifier. Additionally, the implementation of our scheme is simpler than CR or MD scheme because of absence of analog control voltage and programmable delay circuit as have been used in those schemes.

Keywords: content-addressable memory, energy consumption, feedback, peak power, sensing scheme, sense amplifier, ternary.

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Authors: Zheng Zhang, Xin Chen, Guoqing Ding

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Electronic apex locators (EAL) has been widely used clinically for measuring root canal working length with high accuracy, which is crucial for successful endodontic treatment. In order to maintain high accuracy in different measurement environments, this study presented a system for root canal length measurement based on multifrequency impedance method. This measuring system can generate a sweep current with frequencies from 100 Hz to 1 MHz through a direct digital synthesizer. Multiple impedance ratios with different combinations of frequencies were obtained and transmitted by an analog-to-digital converter and several of them with representatives will be selected after data process. The system analyzed the functional relationship between these impedance ratios and the distance between the file and the apex with statistics by measuring plenty of teeth. The position of the apical foramen can be determined by the statistical model using these impedance ratios. The experimental results revealed that the accuracy of the system based on multifrequency impedance ratios method to determine the position of the apical foramen was higher than the dual-frequency impedance ratio method. Besides that, for more complex measurement environments, the performance of the system was more stable.

Keywords: Root canal length, apex locator, multifrequency impedance, sweep frequency.

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Authors: D. Krishnaveni, M. Geetha Priya

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Applications of reversible logic gates in the design of complex integrated circuits provide power optimization.  This technique finds a great use in low power CMOS design, optical computing, quantum computing and nanotechnology. This paper proposes a reversible signed division circuit that can divide an n-bit signed dividend with an n-bit signed divisor using non-restoration division logic. The proposed design adequately addresses the ‘delay’ there by improving the efficiency of the circuit. An attempt is made to design a reversible signed division circuit. This paper provides a threshold to build more complex arithmetic systems using reversible logic, thus increasing the performance of computing systems.

Keywords: Low power CMOS, quantum computing, reversible logic gates, shift register, signed division.

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Authors: Aditi Shukla, Ambarish S. Vidyarthi, Subir Samanta

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The worldwide prevalence of H3N2 influenza virus and its increasing resistance to the existing drugs necessitates for the development of an improved/better targeting anti-influenza drug. H3N2 influenza neuraminidase is one of the two membrane-bound proteins belonging to group-2 neuraminidases. It acts as key player involved in viral pathogenicity and hence, is an important target of anti-influenza drugs. Oseltamivir is one of the potent drugs targeting this neuraminidase. In the present work, we have taken subtype N2 neuraminidase as the receptor and probable analogs of oseltamivir as drug molecules to study the protein-drug interaction in anticipation of finding efficient modified candidate compound. Oseltamivir analogs were made by modifying the functional groups using Marvin Sketch software and were docked using Schrodinger-s Glide. Oseltamivir analog 10 was detected to have significant energy value (16% less compared to Oseltamivir) and could be the probable lead molecule. It infers that some of the modified compounds can interact in a novel manner with increased hydrogen bonding at the active site of neuraminidase and it might be better than the original drug. Further work can be carried out such as enzymatic inhibition studies; synthesis and crystallizing the drug-target complex to analyze the interactions biologically.

Keywords: H3N2 Influenza, Neuraminidase, Oseltamiviranalogs, structure based drug designing

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Authors: Farid Moshgelani, Dhamin Al-Khalili, Côme Rozon

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In this paper, FinFET devices are analyzed with emphasis on sub-threshold leakage current control. This is achieved through proper biasing of the back gate, and through the use of asymmetric work functions for the four terminal FinFET devices. We are also examining different configurations of multiplexers and XOR gates using transistors of symmetric and asymmetric work functions. Based on extensive characterization data for MUX circuits, our proposed configuration using symmetric devices lead to leakage current and delay improvements of 65% and 47% respectively compared to results in the literature. For XOR gates, a 90% improvement in the average leakage current is achieved by using asymmetric devices. All simulations are based on a 25nm FinFET technology using the University of Florida UFDG model.

Keywords: FinFET, logic functions, asymmetric workfunction devices, back gate biasing, sub-threshold leakage current.

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Authors: Djalal Eddine Khodja, Aissa Kheldoun

Abstract:

In this work we present the modelling of the induction machine, taking into consideration the stator defects of the induction machine. It is based on the theory of electromagnetic coupling of electrical circuits. In fact, for the modelling of stationary defects such as short circuit between turns in the same phase, we introduce only in the matrix the coefficients of resistance and inductance of stator and in the mutual inductance stator-rotor. These coefficients take account the number of turns in short-circuit deducted from the total number of turns in the same phase; in this way we obtain the number of useful turns. In addition, all these faults involved, will be used for the creation of the database that will be used to develop an automated system failures of the induction machine.

Keywords: Asynchronous machine, Indicatory Values Statorfaults, Multi-turns Model, Three-phases Model.

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Authors: Khaja Kamaluddin, Muhammed Yousoof

Abstract:

Available Bit Rate Service (ABR) is the lower priority service and the better service for the transmission of data. On wireline ATM networks ABR source is always getting the feedback from switches about increase or decrease of bandwidth according to the changing network conditions and minimum bandwidth is guaranteed. In wireless networks guaranteeing the minimum bandwidth is really a challenging task as the source is always in mobile and traveling from one cell to another cell. Re establishment of virtual circuits from start to end every time causes the delay in transmission. In our proposed solution we proposed the mechanism to provide more available bandwidth to the ABR source by re-usage of part of old Virtual Channels and establishing the new ones. We want the ABR source to transmit the data continuously (non-stop) inorderto avoid the delay. In worst case scenario at least minimum bandwidth is to be allocated. In order to keep the data flow continuously, priority is given to the handoff ABR call against new ABR call.

Keywords: Bandwidth allocation, Virtual Channel (VC), CBR, ABR, MCR and QOS.

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Authors: Horng-Yuan Wu, Chin-Yuan Hsu, Tsair-Fwu Lee

Abstract:

A novel three-phase active power filter (APF) circuit with photovoltaic (PV) system to improve the quality of service and to reduce the capacity of energy storage capacitor is presented. The energy balance concept and sampling technique were used to simplify the calculation algorithm for the required utility source current and to control the voltage of the energy storage capacitor. The feasibility was verified by using the Pspice simulations and experiments. When the APF mode was used during non-operational period, not only the utilization rate, power factor and power quality could be improved, but also the capacity of energy storage capacitor could sparing. As the results, the advantages of the APF circuit are simplicity of control circuits, low cost, and good transient response.

Keywords: active power filter, sampling, energy-storagecapacitor, harmonic current, energy balance.

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Authors: Marcin Sowa

Abstract:

The paper discusses the subinterval-based numerical method for fractional derivative computations. It is now referred to by its acronym – SubIval. The basis of the method is briefly recalled. The ability of the method to be applied in time stepping solvers is discussed. The possibility of implementing a time step size adaptive solver is also mentioned. The solver is tested on a transient circuit example. In order to display the accuracy of the solver – the results have been compared with those obtained by means of a semi-analytical method called gcdAlpha. The time step size adaptive solver applying SubIval has been proven to be very accurate as the results are very close to the referential solution. The solver is currently able to solve FDE (fractional differential equations) with various derivative orders for each equation and any type of source time functions.

Keywords: Numerical method, SubIval, fractional calculus, numerical solver, circuit analysis.

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