WASET
	%0 Journal Article
	%A Muhaned Zaidi and  Ian Grout and  Abu Khari bin A’ain
	%D 2017
	%J International Journal of Electronics and Communication Engineering
	%B World Academy of Science, Engineering and Technology
	%I Open Science Index 123, 2017
	%T Rail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation
	%U https://publications.waset.org/pdf/10006593
	%V 123
	%X In this paper, a two-stage op-amp design is considered using both Miller and negative Miller compensation techniques. The first op-amp design uses Miller compensation around the second amplification stage, whilst the second op-amp design uses negative Miller compensation around the first stage and Miller compensation around the second amplification stage. The aims of this work were to compare the gain and phase margins obtained using the different compensation techniques and identify the ability to choose either compensation technique based on a particular set of design requirements. The two op-amp designs created are based on the same two-stage rail-to-rail output CMOS op-amp architecture where the first stage of the op-amp consists of differential input and cascode circuits, and the second stage is a class AB amplifier. The op-amps have been designed using a 0.35mm CMOS fabrication process.
	%P 261 - 267