@article{(Open Science Index):https://publications.waset.org/pdf/10009058,
	  title     = {Reversible Signed Division for Computing Systems},
	  author    = {D. Krishnaveni and  M. Geetha Priya},
	  country	= {},
	  institution	= {},
	  abstract     = {Applications of reversible logic gates in the design of complex integrated circuits provide power optimization.  This technique finds a great use in low power CMOS design, optical computing, quantum computing and nanotechnology. This paper proposes a reversible signed division circuit that can divide an n-bit signed dividend with an n-bit signed divisor using non-restoration division logic. The proposed design adequately addresses the ‘delay’ there by improving the efficiency of the circuit. An attempt is made to design a reversible signed division circuit. This paper provides a threshold to build more complex arithmetic systems using reversible logic, thus increasing the performance of computing systems.
},
	    journal   = {International Journal of Electrical and Computer Engineering},
	  volume    = {11},
	  number    = {12},
	  year      = {2017},
	  pages     = {1265 - 1275},
	  ee        = {https://publications.waset.org/pdf/10009058},
	  url   	= {https://publications.waset.org/vol/132},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 132, 2017},
	}