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Rail-To-Rail Output Op-Amp Design with Negative Miller Capacitance Compensation

Authors: Muhaned Zaidi, Ian Grout, Abu Khari bin A’ain


In this paper, a two-stage op-amp design is considered using both Miller and negative Miller compensation techniques. The first op-amp design uses Miller compensation around the second amplification stage, whilst the second op-amp design uses negative Miller compensation around the first stage and Miller compensation around the second amplification stage. The aims of this work were to compare the gain and phase margins obtained using the different compensation techniques and identify the ability to choose either compensation technique based on a particular set of design requirements. The two op-amp designs created are based on the same two-stage rail-to-rail output CMOS op-amp architecture where the first stage of the op-amp consists of differential input and cascode circuits, and the second stage is a class AB amplifier. The op-amps have been designed using a 0.35mm CMOS fabrication process.

Keywords: op-amp, rail-to-rail output, Miller compensation, Negative Miller capacitance

Digital Object Identifier (DOI):

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[1] Comer, D.J., et al. Bandwidth extension of high-gain CMOS stages using active negative capacitance. in Electronics, Circuits and Systems, 2006. ICECS'06. 13th IEEE International Conference on. 2006. IEEE.
[2] Genz, A.P., Operational Amplifier Bandwidth Extension Using Negative Capacitance Generation. 2006.
[3] Shem-Tov, B., M. Kozak, and E.G. Friedman. A high-speed CMOS op-amp design technique using negative Miller capacitance. in Electronics, Circuits and Systems, 2004. ICECS 2004. Proceedings of the 2004 11th IEEE International Conference on. 2004. IEEE.
[4] Hurst, P.J., et al., Miller compensation using current buffers in fully differential CMOS two-stage operational amplifiers. Circuits and Systems I: Regular Papers, IEEE Transactions on, 2004. 51(2): p. 275-285.
[5] Caka, N., et al., Influence of MOFSET parameters n its parasitic capacitances and their impact in digital circuits. WSEAS transactions on Circuits and Systems, 2007. 6(3): p. 281-287.
[6] Säckinger, E., Broadband circuits for optical fiber communication. 2005: John Wiley & Sons.
[7] Muller, P. and Y. Leblebici, CMOS multichannel single-chip receivers for multi-gigabit optical data communications. 2007: Springer.
[8] Aznar, F., S.C. Pueyo, and B.C. López, CMOS receiver front-ends for gigabit short-range optical communications. 2012: Springer Science & Business Media.
[9] García López, I., et al., High speed BiCMOS linear driver core for segmented InP Mach-Zehnder modulators. Analog Integrated Circuits and Signal Processing, 2016. 87(2): p. 105-115.
[10] Palermo, S., ECEN620: Network Theory Broadband Circuit Design Fall 2014. 2012.
[11] De Langen, K.-J. and J. Huijsing, Compact low-voltage and high-speed CMOS, BiCMOS and bipolar operational amplifiers. Vol. 520. 2013: Springer Science & Business Media.
[12] Miser, B.D., Design of a Wide-Swing Cascode Beta Multiplier Current Reference. 2003.
[13] Fiedorow, P., et al. Design and implementation of general purpose opamp using multipath frequency compensation. in New Circuits and Systems Conference (NEWCAS), 2011 IEEE 9th International. 2011. IEEE.
[14] Hogervorst, R., et al., A compact power-efficient 3 V CMOS rail-to-rail input/output operational amplifier for VLSI cell libraries. Solid-State Circuits, IEEE Journal of, 1994. 29(12): p. 1505-1513.
[15] Ivanov, V.V. and I.M. Filanovsky, Operational amplifier speed and accuracy improvement: analog circuit design with structural methodology. Vol. 763. 2006: Springer Science & Business Media.
[16] Hogervorst, R. and J. Huijsing, Design of low-voltage, low-power operational amplifier cells. Vol. 374. 2013: Springer Science & Business Media.
[17] Loikkanen, M., Design and compensation of high performance class AB amplifiers. Academic Dissertation, Faculty of Technology, University of Oulu, 2010.