Search results for: RLC short circuit
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1285

Search results for: RLC short circuit

1195 Pre-Analysis of Printed Circuit Boards Based On Multispectral Imaging for Vision Based Recognition of Electronics Waste

Authors: Florian Kleber, Martin Kampel

Abstract:

The increasing demand of gallium, indium and rare-earth elements for the production of electronics, e.g. solid state-lighting, photovoltaics, integrated circuits, and liquid crystal displays, will exceed the world-wide supply according to current forecasts. Recycling systems to reclaim these materials are not yet in place, which challenges the sustainability of these technologies. This paper proposes a multispectral imaging system as a basis for a vision based recognition system for valuable components of electronics waste. Multispectral images intend to enhance the contrast of images of printed circuit boards (single components, as well as labels) for further analysis, such as optical character recognition and entire printed circuit board recognition. The results show, that a higher contrast is achieved in the near infrared compared to ultraviolett and visible light.

Keywords: Electronic Waste, Recycling, Multispectral Imaging, Printed Circuit Boards, Rare-Earth Elements.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2632
1194 Comparative Study of Fault Identification and Classification on EHV Lines Using Discrete Wavelet Transform and Fourier Transform Based ANN

Authors: K.Gayathri, N. Kumarappan

Abstract:

An appropriate method for fault identification and classification on extra high voltage transmission line using discrete wavelet transform is proposed in this paper. The sharp variations of the generated short circuit transient signals which are recorded at the sending end of the transmission line are adopted to identify the fault. The threshold values involve fault classification and these are done on the basis of the multiresolution analysis. A comparative study of the performance is also presented for Discrete Fourier Transform (DFT) based Artificial Neural Network (ANN) and Discrete Wavelet Transform (DWT). The results prove that the proposed method is an effective and efficient one in obtaining the accurate result within short duration of time by using Daubechies 4 and 9. Simulation of the power system is done using MATLAB.

Keywords: EHV transmission line, Fault identification and classification, Discrete wavelet transform, Multiresolution analysis, Artificial neural network

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2392
1193 A 3.125Gb/s Clock and Data Recovery Circuit Using 1/4-Rate Technique

Authors: Il-Do Jeong, Hang-Geun Jeong

Abstract:

This paper describes the design and fabrication of a clock and data recovery circuit (CDR). We propose a new clock and data recovery which is based on a 1/4-rate frequency detector (QRFD). The proposed frequency detector helps reduce the VCO frequency and is thus advantageous for high speed application. The proposed frequency detector can achieve low jitter operation and extend the pull-in range without using the reference clock. The proposed CDR was implemented using a 1/4-rate bang-bang type phase detector (PD) and a ring voltage controlled oscillator (VCO). The CDR circuit has been fabricated in a standard 0.18 CMOS technology. It occupies an active area of 1 x 1 and consumes 90 mW from a single 1.8V supply.

Keywords: Clock and data recovery, 1/4-rate frequency detector, 1/4-rate phase detector.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2870
1192 A Test Methodology to Measure the Open-Loop Voltage Gain of an Operational Amplifier

Authors: Maninder Kaur Gill, Alpana Agarwal

Abstract:

It is practically not feasible to measure the open-loop voltage gain of the operational amplifier in the open loop configuration. It is because the open-loop voltage gain of the operational amplifier is very large. In order to avoid the saturation of the output voltage, a very small input should be given to operational amplifier which is not possible to be measured practically by a digital multimeter. A test circuit for measurement of open loop voltage gain of an operational amplifier has been proposed and verified using simulation tools as well as by experimental methods on breadboard. The main advantage of this test circuit is that it is simple, fast, accurate, cost effective, and easy to handle even on a breadboard. The test circuit requires only the device under test (DUT) along with resistors. This circuit has been tested for measurement of open loop voltage gain for different operational amplifiers. The underlying goal is to design testable circuits for various analog devices that are simple to realize in VLSI systems, giving accurate results and without changing the characteristics of the original system. The DUTs used are LM741CN and UA741CP. For LM741CN, the simulated gain and experimentally measured gain (average) are calculated as 89.71 dB and 87.71 dB, respectively. For UA741CP, the simulated gain and experimentally measured gain (average) are calculated as 101.15 dB and 105.15 dB, respectively. These values are found to be close to the datasheet values.

Keywords: Device under test, open-loop voltage gain, operational amplifier, test circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3264
1191 Assessing and Evaluating the Course Outcomes of Electrical Circuit Course for Bachelor of Science in Electrical and Electronic Engineering Program

Authors: Muhibul Haque Bhuyan, Sher Shermin Azmiri Khan

Abstract:

At present, it is an imperative and stimulating task to grow the concepts and skills of undergraduate students in any course. Educators must build up students' higher-order complex and critical thinking abilities. But many of them find it difficult to assess and evaluate these abilities of students who undertake their courses during undergraduate studies. In this research work, a simple assessment and evaluation process for the electrical circuit course of the undergraduate Electrical and Electronic Engineering (EEE) program is reported using the Outcome-Based Education (OBE) approach. The methodology of the work, course contents design, course outcomes (COs) preparation and mapping it with program outcomes (POs), question setting following Bloom's taxonomy, assessment strategy of the students, CO and PO evaluation records, statistics, and charts have been reported for a student-cohort of electrical circuit course taken in Spring 2019 Semester at EEE Department of Southeast University (SEU). It is found that the benchmark fixed by the course instructor has been achieved by the students of that course through CO assessment and evaluation. Recommendations of the course teacher for further quality enhancement based on CO achievement are also presented.

Keywords: OBE, COs, POs, assessment and evaluation, electrical circuit course.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 550
1190 Comparative Study of Ant Colony and Genetic Algorithms for VLSI Circuit Partitioning

Authors: Sandeep Singh Gill, Rajeevan Chandel, Ashwani Chandel

Abstract:

This paper presents a comparative study of Ant Colony and Genetic Algorithms for VLSI circuit bi-partitioning. Ant colony optimization is an optimization method based on behaviour of social insects [27] whereas Genetic algorithm is an evolutionary optimization technique based on Darwinian Theory of natural evolution and its concept of survival of the fittest [19]. Both the methods are stochastic in nature and have been successfully applied to solve many Non Polynomial hard problems. Results obtained show that Genetic algorithms out perform Ant Colony optimization technique when tested on the VLSI circuit bi-partitioning problem.

Keywords: Partitioning, genetic algorithm, ant colony optimization, non-polynomial hard, netlist, mutation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2207
1189 A Study on the Condition Monitoring of Transmission Line by On-line Circuit Parameter Measurement

Authors: Il Dong Kim, Jin Rak Lee, Young Jun Ko, Young Taek Jin

Abstract:

An on-line condition monitoring method for transmission line is proposed using electrical circuit theory and IT technology in this paper. It is reasonable that the circuit parameters such as resistance (R), inductance (L), conductance (g) and capacitance (C) of a transmission line expose the electrical conditions and physical state of the line. Those parameters can be calculated from the linear equation composed of voltages and currents measured by synchro-phasor measurement technique at both end of the line. A set of linear voltage drop equations containing four terminal constants (A, B ,C ,D ) are mathematical models of the transmission line circuits. At least two sets of those linear equations are established from different operation condition of the line, they may mathematically yield those circuit parameters of the line. The conditions of line connectivity including state of connecting parts or contacting parts of the switching device may be monitored by resistance variations during operation. The insulation conditions of the line can be monitored by conductance (g) and capacitance(C) measurements. Together with other condition monitoring devices such as partial discharge, sensors and visual sensing device etc.,they may give useful information to monitor out any incipient symptoms of faults. The prototype of hardware system has been developed and tested through laboratory level simulated transmission lines. The test has shown enough evident to put the proposed method to practical uses.

Keywords: Transmission Line, Condition Monitoring, Circuit Parameters, Synchro- phasor Measurement.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3147
1188 Memristor: The Missing Circuit Element and its Application

Authors: Vishnu Pratap Singh Kirar

Abstract:

Memristor is also known as the fourth fundamental passive circuit element. When current flows in one direction through the device, the electrical resistance increases and when current flows in the opposite direction, the resistance decreases. When the current is stopped, the component retains the last resistance that it had, and when the flow of charge starts again, the resistance of the circuit will be what it was when it was last active. It behaves as a nonlinear resistor with memory. Recently memristors have generated wide research interest and have found many applications. In this paper we survey the various applications of memristors which include non volatile memory, nanoelectronic memories, computer logic, neuromorphic computer architectures low power remote sensing applications, crossbar latches as transistor replacements, analog computations and switches.

Keywords: Memristor, non-volatile memory, arithmatic operation, programmable resistor.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3920
1187 Power MOSFET Models Including Quasi-Saturation Effect

Authors: Abdelghafour Galadi

Abstract:

In this paper, accurate power MOSFET models including quasi-saturation effect are presented. These models have no internal node voltages determined by the circuit simulator and use one JFET or one depletion mode MOSFET transistors controlled by an “effective” gate voltage taking into account the quasi-saturation effect. The proposed models achieve accurate simulation results with an average error percentage less than 9%, which is an improvement of 21 percentage points compared to the commonly used standard power MOSFET model. In addition, the models can be integrated in any available commercial circuit simulators by using their analytical equations. A description of the models will be provided along with the parameter extraction procedure.

Keywords: Power MOSFET, drift layer, quasi-saturation effect, SPICE model, circuit simulation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1958
1186 Novel Approach to Design of a Class-EJ Power Amplifier Using High Power Technology

Authors: F. Rahmani, F. Razaghian, A. R. Kashaninia

Abstract:

This article proposes a new method for application in communication circuit systems that increase efficiency, PAE, output power and gain in the circuit. The proposed method is based on a combination of switching class-E and class-J and has been termed class-EJ. This method was investigated using both theory and simulation to confirm ∼72% PAE and output power of >39dBm. The combination and design of the proposed power amplifier accrues gain of over 15dB in the 2.9 to 3.5GHz frequency bandwidth. This circuit was designed using MOSFET and high power transistors. The loadand source-pull method achieved the best input and output networks using lumped elements. The proposed technique was investigated for fundamental and second harmonics having desirable amplitudes for the output signal.

Keywords: Power Amplifier (PA), GaN HEMT, Class-J and Class-E, High Efficiency.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2302
1185 Effective Design Parameters on the End Effect in Single-Sided Linear Induction Motors

Authors: A. Zare Bazghaleh, M. R. Naghashan, H. Mahmoudimanesh, M. R. Meshkatoddini

Abstract:

Linear induction motors are used in various industries but they have some specific phenomena which are the causes for some problems. The most important phenomenon is called end effect. End effect decreases efficiency, power factor and output force and unbalances the phase currents. This phenomenon is more important in medium and high speeds machines. In this paper a factor, EEF , is obtained by an accurate equivalent circuit model, to determine the end effect intensity. In this way, all of effective design parameters on end effect is described. Accuracy of this equivalent circuit model is evaluated by two dimensional finite-element analysis using ANSYS. The results show the accuracy of the equivalent circuit model.

Keywords: Linear induction motor, end effect, equivalent circuitmodel, finite-element method.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2749
1184 Three-Phase High Frequency AC Conversion Circuit with Dual Mode PWM/PDM Control Strategy for High Power IH Applications

Authors: Nabil A. Ahmed

Abstract:

This paper presents a novel three-phase utility frequency to high frequency soft switching power conversion circuit with dual mode pulse width modulation and pulse density modulation for high power induction heating applications as melting of steel and non ferrous metals, annealing of metals, surface hardening of steel and cast iron work pieces and hot water producers, steamers and super heated steamers. This high frequency power conversion circuit can operate from three-phase systems to produce high current for high power induction heating applications under the principles of ZVS and it can regulate its ac output power from the rated value to a low power level. A dual mode modulation control scheme based on high frequency PWM in synchronization with the utility frequency positive and negative half cycles for the proposed high frequency conversion circuit and utility frequency pulse density modulation is produced to extend its soft switching operating range for wide ac output power regulation. A dual packs heat exchanger assembly is designed to be used in consumer and industrial fluid pipeline systems and it is proved to be suitable for the hot water, steam and super heated steam producers. Experiment and simulation results are given in this paper to verify the operation principles of the proposed ac conversion circuit and to evaluate its power regulation and conversion efficiency. Also, the paper presents a mutual coupling model of the induction heating load instead of equivalent transformer circuit model.

Keywords: Induction heating, three-phase, conversion circuit, pulse width modulation, pulse density modulation, high frequency, soft switching.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2136
1183 Design of Air Conditioning Automation for Patisserie Shopwindow

Authors: Kemal Tutuncu, Recai Ozcan

Abstract:

Having done in this study, air-conditioning automation for patisserie shopwindow was designed. In the cooling sector it is quite important to cooling up the air temperature in the shopwindow within short time interval. Otherwise the patisseries inside of the shopwindow will be spoilt in a few days. Additionally the humidity is other important parameter for the patisseries kept in shopwindow. It must be raised up to desired level in a quite short time. Traditional patisserie shopwindows only allow controlling temperature manually. There is no humidity control and humidity is supplied by fans that are directed to the water at the bottom of the shopwindows. In this study, humidity and temperature sensors (SHT11), PIC, AC motor controller, DC motor controller, ultrasonic nebulizer and other electronic circuit members were used to simulate air conditioning automation for patisserie shopwindow in proteus software package. The simulation results showed that temperature and humidity values are adjusted in desired time duration by openloop control technique. Outer and inner temperature and humidity values were used for control mechanism.

Keywords: Air conditioning automation, temperature and humidity, SHT11, AC motor controller, open-loop control.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2159
1182 Shaping the Input Side Current Waveform of a 3-ϕ Rectifier into a Pure Sine Wave

Authors: Sikder Mohammad Faruk, Mir Mofajjal Hossain, Muhibul Haque Bhuyan

Abstract:

In this investigative research paper, we have presented the simulation results of a three-phase rectifier circuit to improve the input side current using the passive filters, such as capacitors and inductors at the output and input terminals of the rectifier circuit respectively. All simulation works were performed in a personal computer using the PSPICE simulator software, which is a virtual circuit design and simulation software package. The output voltages and currents were measured across a resistive load of 1 k. We observed that the output voltage levels, input current wave shapes, harmonic contents through the harmonic spectrum, and total harmonic distortion improved due to the use of such filters.

Keywords: input current wave, three-phase rectifier, passive filter, PSPICE Simulation

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 428
1181 A Soft Error Rates Evaluation Method of Combinational Logic Circuit Based on Linear Energy Transfers

Authors: Man Li, Wanting Zhou, Lei Li

Abstract:

Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of combinational logic circuit. The existing research on soft error rates (SER) of combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rates evaluation method based on LET. In this paper, we analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on LET. Based on this model, the error rate of test circuit ISCAS’85 is calculated. Experimental results show that this model can be used for SER evaluation.

Keywords: Communication satellite, pulse width, soft error rates, linear energy transfer, LET.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 309
1180 Reversible Signed Division for Computing Systems

Authors: D. Krishnaveni, M. Geetha Priya

Abstract:

Applications of reversible logic gates in the design of complex integrated circuits provide power optimization.  This technique finds a great use in low power CMOS design, optical computing, quantum computing and nanotechnology. This paper proposes a reversible signed division circuit that can divide an n-bit signed dividend with an n-bit signed divisor using non-restoration division logic. The proposed design adequately addresses the ‘delay’ there by improving the efficiency of the circuit. An attempt is made to design a reversible signed division circuit. This paper provides a threshold to build more complex arithmetic systems using reversible logic, thus increasing the performance of computing systems.

Keywords: Low power CMOS, quantum computing, reversible logic gates, shift register, signed division.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1212
1179 Analysis of Partially Shaded PV Modules Using Piecewise Linear Parallel Branches Model

Authors: Yaw-Juen Wang, Po-Chun Hsu

Abstract:

This paper presents an equivalent circuit model based on piecewise linear parallel branches (PLPB) to study solar cell modules which are partially shaded. The PLPB model can easily be used in circuit simulation software such as the ElectroMagnetic Transients Program (EMTP). This PLPB model allows the user to simulate several different configurations of solar cells, the influence of partial shadowing on a single or multiple cells, the influence of the number of solar cells protected by a bypass diode and the effect of the cell connection configuration on partial shadowing.

Keywords: Cell Connection Configurations, EMTP, Equivalent Circuit, Partial Shading, Photovoltaic Module

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2882
1178 Use of Short Piles for Stabilizing the Side Slope of the Road Embankment along the Canal

Authors: Monapat Sasingha, Suttisak Soralump

Abstract:

This research presents the behavior of slope of the road along the canal stabilized by short piles. In this investigation, the centrifuge machine was used, modelling the condition of the water levels in the canal. The centrifuge tests were performed at 35 g. To observe the movement of the soil, visual analysis was performed to evaluate the failure behavior. Conclusively, the use of short piles to stabilize the canal slope proved to be an effective solution. However, the certain amount of settlement was found behind the short pile rows.

Keywords: Centrifuge test, slope failure, embankment, stability of slope.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 979
1177 Prediction of the Performance of a Bar-Type Piezoelectric Vibration Actuator Depending on the Frequency Using an Equivalent Circuit Analysis

Authors: J. H. Kim, J. H. Kwon, J. S. Park, K. J. Lim

Abstract:

This paper has been investigated a technique that predicts the performance of a bar-type unimorph piezoelectric vibration actuator depending on the frequency. This paper has been proposed an equivalent circuit that can be easily analyzed for the bar-type unimorph piezoelectric vibration actuator. In the dynamic analysis, rigidity and resonance frequency, which are important mechanical elements, were derived using the basic beam theory. In the equivalent circuit analysis, the displacement and bandwidth of the piezoelectric vibration actuator depending on the frequency were predicted. Also, for the reliability of the derived equations, the predicted performance depending on the shape change was compared with the result of a finite element analysis program.

Keywords: Actuator, performance, piezoelectric, unimorph.Actuator, performance, piezoelectric, unimorph.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1684
1176 Modeling and Visualizing Seismic Wave Propagation in Elastic Medium Using Multi-Dimension Wave Digital Filtering Approach

Authors: Jason Chien-Hsun Tseng, Nguyen Dong-Thai Dao, Chong-Ching Chang

Abstract:

A novel PDE solver using the multidimensional wave digital filtering (MDWDF) technique to achieve the solution of a 2D seismic wave system is presented. In essence, the continuous physical system served by a linear Kirchhoff circuit is transformed to an equivalent discrete dynamic system implemented by a MD wave digital filtering (MDWDF) circuit. This amounts to numerically approximating the differential equations used to describe elements of a MD passive electronic circuit by a grid-based difference equations implemented by the so-called state quantities within the passive MDWDF circuit. So the digital model can track the wave field on a dense 3D grid of points. Details about how to transform the continuous system into a desired discrete passive system are addressed. In addition, initial and boundary conditions are properly embedded into the MDWDF circuit in terms of state quantities. Graphic results have clearly demonstrated some physical effects of seismic wave (P-wave and S–wave) propagation including radiation, reflection, and refraction from and across the hard boundaries. Comparison between the MDWDF technique and the finite difference time domain (FDTD) approach is also made in terms of the computational efficiency.

Keywords: Seismic Wave Propagation, Multi-dimension WaveDigital Filters, Partial Differential Equations.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1386
1175 Simulation of Dynamics of a Permanent Magnet Linear Actuator

Authors: Ivan Yatchev, Ewen Ritchie

Abstract:

Comparison of two approaches for the simulation of the dynamic behaviour of a permanent magnet linear actuator is presented. These are full coupled model, where the electromagnetic field, electric circuit and mechanical motion problems are solved simultaneously, and decoupled model, where first a set of static magnetic filed analysis is carried out and then the electric circuit and mechanical motion equations are solved employing bi-cubic spline approximations of the field analysis results. The results show that the proposed decoupled model is of satisfactory accuracy and gives more flexibility when the actuator response is required to be estimated for different external conditions, e.g. external circuit parameters or mechanical loads.

Keywords: Coupled problems, dynamic models, finite elementanalysis, linear actuators, permanent magnets.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2716
1174 Modified Buck Boost Circuit for Linear and Non-Linear Piezoelectric Energy Harvesting

Authors: I Made Darmayuda, Chai Tshun Chuan Kevin, Je Minkyu

Abstract:

Plenty researches have reported techniques to harvest energy from piezoelectric transducer. In the earlier years, the researches mainly report linear energy harvesting techniques whereby interface circuitry is designed to have input impedance that match with the impedance of the piezoelectric transducer. In recent years non-linear techniques become more popular. The non-linear technique employs voltage waveform manipulation to boost the available-for-extraction energy at the time of energy transfer.  The fact that non-linear energy extraction provides larger available-for-extraction energy doesn’t mean the linear energy extraction is completely obsolete. In some scenarios, such as where initial power is not available, linear energy extraction is still preferred. A modified Buck Boost circuit which is capable of harvesting piezoelectric energy using both linear and non-linear techniques is reported in this paper. Efficiency of at least 64% can be achieved using this circuit. For linear extraction, the modified Buck Boost circuit is controlled using a fix frequency and duty cycle clock. A voltage sensor and a pulse generator are added as the controller for the non-linear extraction technique. 

Keywords: Buck boost, energy harvester, linear energy harvester, non-linear energy harvester, piezoelectric, synchronized charge extraction.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2392
1173 Design and Characterization of CMOS Readout Circuit for ISFET and ISE Based Sensors

Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Sallehand Tan Kong Yew

Abstract:

This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: Readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), and ion sensor electronics.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2600
1172 Design and Characterization of CMOS Readout Circuit for ISFET and ISE Based Sensors

Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Sallehand, Tan Kong Yew

Abstract:

This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 Rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: Readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), ion sensor electronics.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2015
1171 Thermal Modeling of Dry-Transformers and Estimating Temperature Rise

Authors: M. Ghareh, L. Sepahi

Abstract:

Temperature rise in a transformer depends on variety of parameters such as ambient temperature, output current and type of the core. Considering these parameters, temperature rise estimation is still complicated procedure. In this paper, we present a new model based on simple electrical equivalent circuit. This method avoids the complication associated to accurate estimation and is in very good agreement with practice.

Keywords: Thermal modeling, temperature rise, equivalent thermal circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3756
1170 Design and Characterization of a CMOS Process Sensor Utilizing Vth Extractor Circuit

Authors: Rohana Musa, Yuzman Yusoff, Chia Chieu Yin, Hanif Che Lah

Abstract:

This paper presents the design and characterization of a low power Complementary Metal Oxide Semiconductor (CMOS) process sensor. The design is targeted for implementation using Silterra’s 180 nm CMOS process technology. The proposed process sensor employs a voltage threshold (Vth) extractor architecture for detection of variations in the fabrication process. The process sensor generates output voltages in the range of 401 mV (fast-fast corner) to 443 mV (slow-slow corner) at nominal condition. The power dissipation for this process sensor is 6.3 µW with a supply voltage of 1.8V with a silicon area of 190 µm X 60 µm. The preliminary result of this process sensor that was fabricated indicates a close resemblance between test and simulated results.

Keywords: CMOS Process sensor, Process, Voltage and Temperature (PVT) sensor, threshold extractor circuit, Vth extractor circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 684
1169 Circuit Models for Conducted Susceptibility Analyses of Multiconductor Shielded Cables

Authors: Saih Mohamed, Rouijaa Hicham, Ghammaz Abdelilah

Abstract:

This paper presents circuit models to analyze the conducted susceptibility of multiconductor shielded cables in frequency domains using Branin’s method, which is referred to as the method of characteristics. These models, which can be used directly in the time and frequency domains, take into account the presence of both the transfer impedance and admittance. The conducted susceptibility is studied by using an injection current on the cable shield as the source. Two examples are studied; a coaxial shielded cable and shielded cables with two parallel wires (i.e., twinax cables). This shield has an asymmetry (one slot on the side). Results obtained by these models are in good agreement with those obtained by other methods.

Keywords: Circuit models, multiconductor shielded cables, Branin’s method, coaxial shielded cable, twinax cables.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2464
1168 A Novel Approach to Asynchronous State Machine Modeling on Multisim for Avoiding Function Hazards

Authors: L. Parisi, D. Hamili, N. Azlan

Abstract:

The aim of this study was to design and simulate a particular type of Asynchronous State Machine (ASM), namely a ‘traffic light controller’ (TLC), operated at a frequency of 0.5 Hz. The design task involved two main stages: firstly, designing a 4-bit binary counter using J-K flip flops as the timing signal and, subsequently, attaining the digital logic by deploying ASM design process. The TLC was designed such that it showed a sequence of three different colours, i.e. red, yellow and green, corresponding to set thresholds by deploying the least number of AND, OR and NOT gates possible. The software Multisim was deployed to design such circuit and simulate it for circuit troubleshooting in order for it to display the output sequence of the three different colours on the traffic light in the correct order. A clock signal, an asynchronous 4- bit binary counter that was designed through the use of J-K flip flops along with an ASM were used to complete this sequence, which was programmed to be repeated indefinitely. Eventually, the circuit was debugged and optimized, thus displaying the correct waveforms of the three outputs through the logic analyser. However, hazards occurred when the frequency was increased to 10 MHz. This was attributed to delays in the feedback being too high.

Keywords: Asynchronous State Machine, Traffic Light Controller, Circuit Design, Digital Electronics.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3193
1167 A Voltage Based Maximum Power Point Tracker for Low Power and Low Cost Photovoltaic Applications

Authors: Jawad Ahmad, Hee-Jun Kim

Abstract:

This paper describes the design of a voltage based maximum power point tracker (MPPT) for photovoltaic (PV) applications. Of the various MPPT methods, the voltage based method is considered to be the simplest and cost effective. The major disadvantage of this method is that the PV array is disconnected from the load for the sampling of its open circuit voltage, which inevitably results in power loss. Another disadvantage, in case of rapid irradiance variation, is that if the duration between two successive samplings, called the sampling period, is too long there is a considerable loss. This is because the output voltage of the PV array follows the unchanged reference during one sampling period. Once a maximum power point (MPP) is tracked and a change in irradiation occurs between two successive samplings, then the new MPP is not tracked until the next sampling of the PV array voltage. This paper proposes an MPPT circuit in which the sampling interval of the PV array voltage, and the sampling period have been shortened. The sample and hold circuit has also been simplified. The proposed circuit does not utilize a microcontroller or a digital signal processor and is thus suitable for low cost and low power applications.

Keywords: Maximum power point tracker, Sample and hold amplifier, Sampling interval, Sampling period.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2707
1166 Synchronization Between Two Chaotic Systems: Numerical and Circuit Simulation

Authors: J. H. Park, T. H. Lee, S. M. Lee, H. Y. Jung

Abstract:

In this paper, a generalized synchronization scheme, which is called function synchronization, for chaotic systems is studied. Based on Lyapunov method and active control method, we design the synchronization controller for the system such that the error dynamics between master and slave chaotic systems is asymptotically stable. For verification of our theory, computer and circuit simulations for a specific chaotic system is conducted.

Keywords: Chaotic systems, synchronization, Lyapunov method, simulation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1635