Search results for: Block floating point arithmetic

Authors: Abhijit Mitra

Abstract:

A special case of floating point data representation is block floating point format where a block of operands are forced to have a joint exponent term. This paper deals with the finite wordlength properties of this data format. The theoretical errors associated with the error model for block floating point quantization process is investigated with the help of error distribution functions. A fast and easy approximation formula for calculating signal-to-noise ratio in quantization to block floating point format is derived. This representation is found to be a useful compromise between fixed point and floating point format due to its acceptable numerical error properties over a wide dynamic range.

Keywords: Block floating point, Roundoff error, Block exponent dis-tribution fuction, Signal factor.

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Authors: Yukinari Minagi , Akinori Kanasugi

Abstract:

This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: dynamic reconfiguration, floating-point arithmetic, double precision, FPGA

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Authors: Abhijit Mitra

Abstract:

we propose a new normalized LMS (NLMS) algorithm, which gives satisfactory performance in certain applications in comaprison with con-ventional NLMS recursion. This new algorithm can be treated as a block based simplification of NLMS algorithm with significantly reduced number of multi¬ply and accumulate as well as division operations. It is also shown that such a recursion can be easily implemented in block floating point (BFP) arithmetic, treating the implementational issues much efficiently. In particular, the core challenges of a BFP realization to such adaptive filters are mainly considered in this regard. A global upper bound on the step size control parameter of the new algorithm due to BFP implementation is also proposed to prevent overflow in filtering as well as weight updating operations jointly.

Keywords: Adaptive algorithm, Block floating point arithmetic, Implementation issues, Normalized least mean square methods

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Authors: Abhijit Mitra

Abstract:

This paper proposes an efficient finite precision block floating point (BFP) treatment to the fixed coefficient finite impulse response (FIR) digital filter. The treatment includes effective implementation of all the three forms of the conventional FIR filters, namely, direct form, cascaded and par- allel, and a roundoff error analysis of them in the BFP format. An effective block formatting algorithm together with an adaptive scaling factor is pro- posed to make the realizations more simple from hardware view point. To this end, a generic relation between the tap weight vector length and the input block length is deduced. The implementation scheme also emphasises on a simple block exponent update technique to prevent overflow even during the block to block transition phase. The roundoff noise is also investigated along the analogous lines, taking into consideration these implementational issues. The simulation results show that the BFP roundoff errors depend on the sig- nal level almost in the same way as floating point roundoff noise, resulting in approximately constant signal to noise ratio over a relatively large dynamic range.

Keywords: Finite impulse response digital filters, Cascade structure, Parallel structure, Block floating point arithmetic, Roundoff error.

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Authors: Thomas Behan, Zaiyi Liao, Lian Zhao, Chunting Yang

Abstract:

In this paper, low end Digital Signal Processors (DSPs) are applied to accelerate integer neural networks. The use of DSPs to accelerate neural networks has been a topic of study for some time, and has demonstrated significant performance improvements. Recently, work has been done on integer only neural networks, which greatly reduces hardware requirements, and thus allows for cheaper hardware implementation. DSPs with Arithmetic Logic Units (ALUs) that support floating or fixed point arithmetic are generally more expensive than their integer only counterparts due to increased circuit complexity. However if the need for floating or fixed point math operation can be removed, then simpler, lower cost DSPs can be used. To achieve this, an integer only neural network is created in this paper, which is then accelerated by using DSP instructions to improve performance.

Keywords: Digital Signal Processor (DSP), Integer Neural Network(INN), Low Cost Neural Network, Integer Neural Network DSPImplementation.

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Authors: Haruo Shimada, Akinori Kanasugi

Abstract:

This paper proposes an architecture of dynamically reconfigurable arithmetic circuit. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operations. The proposed circuit is based on a complex number multiply-accumulation circuit which is used frequently in the field of digital signal processing. In addition, the proposed circuit performs real number double precision arithmetic operations. The data formats are single and double precision floating point number based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: arithmetic circuit, complex number, double precision, dynamic reconfiguration

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Authors: Padmakumar S., Vivek Agarwal, Kallol Roy

Abstract:

With the advent of inexpensive 32 bit floating point digital signal processor-s availability in market, many computationally intensive algorithms such as Kalman filter becomes feasible to implement in real time. Dynamic simulation of a self excited DC motor using second order state variable model and implementation of Kalman Filter in a floating point DSP TMS320C6713 is presented in this paper with an objective to introduce and implement such an algorithm, for beginners. A fractional hp DC motor is simulated in both Matlab® and DSP and the results are included. A step by step approach for simulation of DC motor in Matlab® and “C" routines in CC Studio® is also given. CC studio® project file details and environmental setting requirements are addressed. This tutorial can be used with 6713 DSK, which is based on floating point DSP and CC Studio either in hardware mode or in simulation mode.

Keywords: DC motor, DSP, Dynamic simulation, Kalman Filter

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Authors: K. B. Cullen, G. C. M. Silvestre, N. J. Hurley

Abstract:

This paper presents software tools that convert the C/Cµ floating point source code for a DSP algorithm into a fixedpoint simulation model that can be used to evaluate the numericalperformance of the algorithm on several different fixed pointplatforms including microprocessors, DSPs and FPGAs. The tools use a novel system for maintaining binary point informationso that the conversion from floating point to fixed point isautomated and the resulting fixed point algorithm achieves maximum possible precision. A configurable architecture is used during the simulation phase so that the algorithm can produce a bit-exact output for several different target devices.

Keywords: DSP devices, DSP algorithm, simulation model, software

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Authors: Xing-Jian Li, Shen Qu

Abstract:

The Smith arithmetic determinant is investigated in this paper. By using two different methods, we derive the explicit formula for the Smith arithmetic determinant.

Keywords: Elementary row transformation, Euler function, Matrix decomposition, Smith arithmetic determinant.

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Authors: Young-Kwan Choi

Abstract:

In development of floating photovoltaic generation system, finding a suitable place of installation is as important as development of economically feasible and stable structure. Especially since floating photovoltaic system has its facility floating on water surface, it is extremely important to review the effects of weather conditions such as wind, water flow and floating matters, various factors (such as fogs) that can reduce generation efficiency, possibility of connection with power system, and legal restrictions. The method of investigating suitable area and resource for development of tracking-type floating photovoltaic generation system was proposed in this paper, which can be used for development of floating and ocean photovoltaic system in the future.

Keywords: Floating PV system, On-site Survey, Resources Survey of Photovoltaic, Tracking-type Floating PV.

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Authors: J. Sulaiman, M. Othman, M. K. Hasan

Abstract:

Recently, the findings on the MEG iterative scheme has demonstrated to accelerate the convergence rate in solving any system of linear equations generated by using approximation equations of boundary value problems. Based on the same scheme, the aim of this paper is to investigate the capability of a family of four-point block iterative methods with a weighted parameter, ω such as the 4 Point-EGSOR, 4 Point-EDGSOR, and 4 Point-MEGSOR in solving two-dimensional elliptic partial differential equations by using the second-order finite difference approximation. In fact, the formulation and implementation of three four-point block iterative methods are also presented. Finally, the experimental results show that the Four Point MEGSOR iterative scheme is superior as compared with the existing four point block schemes.

Keywords: MEG iteration, second-order finite difference, weighted parameter.

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Authors: Niveditha Domse, Kris Kumar, K. N. Balasubramanya Murthy

Abstract:

The more recent satellite projects/programs makes extensive usage of real – time embedded systems. 16 bit processors which meet the Mil-Std-1750 standard architecture have been used in on-board systems. Most of the Space Applications have been written in ADA. From a futuristic point of view, 32 bit/ 64 bit processors are needed in the area of spacecraft computing and therefore an effort is desirable in the study and survey of 64 bit architectures for space applications. This will also result in significant technology development in terms of VLSI and software tools for ADA (as the legacy code is in ADA). There are several basic requirements for a special processor for this purpose. They include Radiation Hardened (RadHard) devices, very low power dissipation, compatibility with existing operational systems, scalable architectures for higher computational needs, reliability, higher memory and I/O bandwidth, predictability, realtime operating system and manufacturability of such processors. Further on, these may include selection of FPGA devices, selection of EDA tool chains, design flow, partitioning of the design, pin count, performance evaluation, timing analysis etc. This project deals with a brief study of 32 and 64 bit processors readily available in the market and designing/ fabricating a 64 bit RISC processor named RISC MicroProcessor with added functionalities of an extended double precision floating point unit and a 32 bit signal processing unit acting as co-processors. In this paper, we emphasize the ease and importance of using Open Core (OpenSparc T1 Verilog RTL) and Open “Source" EDA tools such as Icarus to develop FPGA based prototypes quickly. Commercial tools such as Xilinx ISE for Synthesis are also used when appropriate.

Keywords: RISC MicroProcessor, RPC – RISC Processor Core, PBX – Processor to Block Interface part of the Interconnection Network, BPX – Block to Processor Interface part of the Interconnection Network, FPU – Floating Point Unit, SPU – Signal Processing Unit, WB – Wishbone Interface, CTU – Clock and Test Unit

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Authors: K. Ganesan

Abstract:

By using a new set of arithmetic operations on interval numbers, we discuss some arithmetic properties of interval matrices which intern helps us to compute the powers of interval matrices and to solve the system of interval linear equations.

Keywords: Interval arithmetic, Interval matrix, linear equations.

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Authors: Abdelmalek Fermas, Adel Belouchrani, Otmane Ait Mohamed

Abstract:

In Blind Source Separation (BSS) processing, taking advantage of scaling factor indetermination and based on the floatingpoint representation, we propose a scaling technique applied to the separation matrix, to avoid the saturation or the weakness in the recovered source signals. This technique performs an Automatic Gain Control (AGC) in an on-line BSS environment. We demonstrate the effectiveness of this technique by using the implementation of a division free BSS algorithm with two input, two output. This technique is computationally cheaper and efficient for a hardware implementation.

Keywords: Automatic Gain Control, Blind Source Separation, Floating-Point Representation, FPGA Implementation.

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Authors: Swapnoneel Roy, Ashok Kumar Thakur, Minhazur Rahman

Abstract:

The Block Sorting problem is to sort a given permutation moving blocks. A block is defined as a substring of the given permutation, which is also a substring of the identity permutation. Block Sorting has been proved to be NP-Hard. Until now two different 2-Approximation algorithms have been presented for block sorting. These are the best known algorithms for Block Sorting till date. In this work we present a different characterization of Block Sorting in terms of a transposition cycle graph. Then we suggest a heuristic, which we show to exhibit a 2-approximation performance guarantee for most permutations.

Keywords: Block Sorting, Optical Character Recognition, Genome Rearrangements, Sorting Primitives, ApproximationAlgorithms

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Authors: Fuziyah Ishak, Mohamed B. Suleiman, Zanariah A. Majid, Khairil I. Othman

Abstract:

This paper considers the development of a two-point predictor-corrector block method for solving delay differential equations. The formulae are represented in divided difference form and the algorithm is implemented in variable stepsize variable order technique. The block method produces two new values at a single integration step. Numerical results are compared with existing methods and it is evident that the block method performs very well. Stability regions of the block method are also investigated.

Keywords: block method, delay differential equations, predictor-corrector, stability region, variable stepsize variable order.

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Authors: T. F. Jin, X. C. Yin, P. B. Qian

Abstract:

The present investigation is concerned with sub-impacts taken placed when a rigid hemispherical-head block transversely impacts against a beam at different locations. Dynamic substructure technique for elastic-plastic impact is applied to solve numerically this problem. The time history of impact force and energy exchange between block and beam are obtained. The process of sub-impacts is analyzed from the energy exchange point of view. The results verify the influences of the impact location on impact duration, the first sub-impact and energy exchange between the beam and the block.

Keywords: Beam, sub-impact, substructure, elastic-plasticity.

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Authors: Omid Mirmotahari, Yngvar Berg, Ahmad Habibizad Navin

Abstract:

Reversible logic is becoming more and more prominent as the technology sets higher demands on heat, power, scaling and stability. Reversible gates are able at any time to "undo" the current step or function. Multiple-valued logic has the advantage of transporting and evaluating higher bits each clock cycle than binary. Moreover, we demonstrate in this paper, combining these disciplines we can construct powerful multiple-valued reversible logic structures. In this paper a reversible block implemented by pseudo floatinggate can perform AD-function and a DA-function as its reverse application.

Keywords: Reversible logic, bi-directional, Pseudo floating-gate(PFG), multiple-valued logic (MVL).

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Authors: Hee-Choul Kwon, Heeyong Kwon

Abstract:

Image rotation is one of main pre-processing steps for image processing or image pattern recognition. It is implemented with a rotation matrix multiplication. It requires a lot of floating point arithmetic operations and trigonometric calculations, so it takes a long time to execute. Therefore, there has been a need for a high speed image rotation algorithm without two major time-consuming operations. However, the rotated image has a drawback, i.e. distortions. We solved the problem using an augmented two-step shear transform. We compare the presented algorithm with the conventional rotation with images of various sizes. Experimental results show that the presented algorithm is superior to the conventional rotation one.

Keywords: High speed rotation operation, image rotation, transform matrix, image processing, pattern recognition.

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Authors: Abdu Masanawa Sagir

Abstract:

In this paper, linear multistep technique using power series as the basis function is used to develop the block methods which are suitable for generating direct solution of the special second order ordinary differential equations of the form y′′ = f(x,y), a < = x < = b with associated initial or boundary conditions. The continuaous hybrid formulations enable us to differentiate and evaluate at some grids and off – grid points to obtain two different three discrete schemes, each of order (4,4,4)T, which were used in block form for parallel or sequential solutions of the problems. The computational burden and computer time wastage involved in the usual reduction of second order problem into system of first order equations are avoided by this approach. Furthermore, a stability analysis and efficiency of the block method are tested on linear and non-linear ordinary differential equations whose solutions are oscillatory or nearly periodic in nature, and the results obtained compared favourably with the exact solution.

Keywords: Block Method, Hybrid, Linear Multistep Method, Self – starting, Special Second Order.

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Authors: Lidia Obojska

Abstract:

This paper has, as its point of departure, the foundational axiomatic theory of E. De Giorgi (1996, Scuola Normale Superiore di Pisa, Preprints di Matematica 26, 1), based on two primitive notions of quality and relation. With the introduction of a unary relation, we develop a system totally based on the sole primitive notion of relation. Such a modification enables a definition of the concept of dynamic unary relation. In this way we construct a simple language capable to express other well known theories such as Robinson-s arithmetic or a piece of a theory of concatenation. A key role in this system plays an abstract relation designated by “( )", which can be interpreted in different ways, but in this paper we will focus on the case when we can perform computations and obtain results.

Keywords: language, unary relations, arithmetic, computability

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Authors: F. M. Mohamed, A. Y. Abdelaziz

Abstract:

The subject of petroleum storage tank fires has gained a great deal of attention due to the high cost of petroleum, and the consequent disruption of petroleum production; therefore, much of the current research has focused on petroleum storage tank fires. Also, the number of petroleum tank fires is oscillating between 15 and 20 fires per year. About 33% of all tank fires are attributed to lightning. Floating roof tanks (FRT’s) are especially vulnerable to lightning. To minimize the likelihood of a fire, the API RP 545 recommends three major modifications to floating roof tanks. This paper was inspired by a stroke of lightning that ignited a fire in a crude oil storage tank belonging to an Egyptian oil company, and is aimed at providing an efficient lightning protection system to the tank under study, in order to avoid the occurrence of such phenomena in the future and also, to give valuable recommendations to be applied to floating roof tank projects.

Keywords: Crude oil, fire, floating roof tank, lightning protection system.

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Authors: Arpa Petchsomrit, Namfa Sermkaew, Ruedeekorn Wiwattanapatapee

Abstract:

Oil entrapped floating alginate beads of curcumin were developed and characterized. Cremophor EL, Cremophor RH and Tween 80 were utilized to improve the solubility of the drug. The oil-loaded floating gel beads prepared by emulsion gelation method contained sodium alginate, mineral oil and surfactant. The drug content and % encapsulation declined as the ratio of surfactant was increased. The release of curcumin from 1% alginate beads was significantly more than for the 2% alginate beads. The drug released from the beads containing 25% of Tween 80 was about 70% while a higher drug release was observed with the beads containing Cremophor EL or Cremohor RH (approximately 90%). The developed floating beads of curcumin powder with surfactant provided a superior drug release than those without surfactant. Floating beads based on oil entrapment containing the drug solubilized in surfactants is a new delivery system to enhance the dissolution of poorly soluble drugs.

Keywords: Alginate, curcumin, floating drug delivery, oil entrapped bead.

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Authors: Nguyen Thi Thu Trang

Abstract:

Climate change and sea level rise is one of the greatest challenges facing human beings in the 21^st century. Because of sea level rise, several low-lying coastal areas around the globe are at risk of being completely submerged, disappearing under water. Particularly in Viet Nam, the rise in sea level is predicted to result in more frequent and even permanently inundated coastal plains. As a result, land reserving fund of coastal cities is going to be narrowed in near future, while construction ground is becoming increasingly limited due to a rapid growth in population. Faced with this reality, the solutions are being discussed not only in tradition view such as accommodation is raised or moved to higher areas, or “living with the water”, but also forwards to “living on the water”. Therefore, the concept of a sustainable floating community with floating houses based on the precious value of long term historical tradition of water dwellings in Viet Nam would be a sustainable solution for adaptation of climate change and sea level rise in the coastal areas. The sustainable floating community is comprised of sustainability in four components: architecture, environment, socio-economic and living quality. This research paper is focused on sustainability in architectural component of floating community. Through detailed architectural analysis of current floating houses and floating communities in Viet Nam, this research not only accumulates precious values of traditional architecture that need to be preserved and developed in the proposed concept, but also illustrates its weaknesses that need to address for optimal design of the future sustainable floating communities. Based on these studies the research would provide guidelines with appropriate architectural solutions for the concept of sustainable floating community with floating housing units that are adapted to climate change and sea level rise in Viet Nam.

Keywords: Climate change, floating houses, floating community, Viet Nam.

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Authors: M. Mashayekhi, H. H. Ardakani, A. Omidian

Abstract:

Among various testing methodologies, Built-in Self- Test (BIST) is recognized as a low cost, effective paradigm. Also, full adders are one of the basic building blocks of most arithmetic circuits in all processing units. In this paper, an optimized testable 2- bit full adder as a test building block is proposed. Then, a BIST procedure is introduced to scale up the building block and to generate a self testable n-bit full adders. The target design can achieve 100% fault coverage using insignificant amount of hardware redundancy. Moreover, Overall test time is reduced by utilizing polymorphic gates and also by testing full adder building blocks in parallel.

Keywords: BIST, Full Adder, Polymorphic Gate

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Authors: Lai-Man Po, Chi-Wang Ting, Ka-Ho Ng

Abstract:

Recently, an enhanced hexagon-based search (EHS) algorithm was proposed to speedup the original hexagon-based search (HS) by exploiting the group-distortion information of some evaluated points. In this paper, a second version of the EHS is proposed with a new point-oriented inner search technique which can further speedup the HS in both large and small motion environments. Experimental results show that the enhanced hexagon-based search version-2 (EHS2) is faster than the HS up to 34% with negligible PSNR degradation.

Keywords: Inner search, fast motion estimation, block-matching, hexagon search

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Authors: Harpreet Singh Dhillon, Abhijit Mitra

Abstract:

A reduced-bit multiplication algorithm based on the ancient Vedic multiplication formulae is proposed in this paper. Both the Vedic multiplication formulae, Urdhva tiryakbhyam and Nikhilam, are first discussed in detail. Urdhva tiryakbhyam, being a general multiplication formula, is equally applicable to all cases of multiplication. It is applied to the digital arithmetic and is shown to yield a multiplier architecture which is very similar to the popular array multiplier. Due to its structure, it leads to a high carry propagation delay in case of multiplication of large numbers. Nikhilam Sutra, on the other hand, is more efficient in the multiplication of large numbers as it reduces the multiplication of two large numbers to that of two smaller numbers. The framework of the proposed algorithm is taken from this Sutra and is further optimized by use of some general arithmetic operations such as expansion and bit-shifting to take advantage of bit-reduction in multiplication. We illustrate the proposed algorithm by reducing a general 4x4-bit multiplication to a single 2 x 2-bit multiplication operation.

Keywords: Multiplication, algorithm, Vedic mathematics, digital arithmetic, reduced-bit.

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Authors: Imran Khan Pathan, Anil Bhandari, Peeyush K. Sharma, Rakesh K. Patel, Suresh Purohit

Abstract:

Floating tablets of Marichyadi Vati were developed with an aim to prolong its gastric residence time and increase the bioavailability of drug. Rapid gastrointestinal transit could result in incomplete drug release from the drug delivery system above the absorption zone leading to diminished efficacy of the administered dose. The tablets were prepared by wet granulation technique, using HPMC E50 LV act as Matrixing agent, Carbopol as floating enhancer, microcrystalline cellulose as binder, Sodium bi carbonate as effervescent agent with other excipients. The simplex lattice design was used for selection of variables for tablets formulation. Formulation was optimized on the basis of floating time and in vitro drug release. The results showed that the floating lag time for optimized formulation was found to be 61 second with about 97.32 % of total drug release within 3 hours. The vitro release profiles of drug from the formulation could be best expressed zero order with highest linearity r² = 0.9943. It was concluded that the gastroretentive drug delivery system can be developed for Marichyadi Vati containing Piperine to increase the residence time of the drug in the stomach and thereby increasing bioavailability.

Keywords: Piperine, Marichyadi Vati, Gastroretentive drug delivery, Floating tablet.

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Authors: Srinivasan Chandrasekaran, Shihas A. Khader

Abstract:

Motion response of floating structures is of great concern in marine engineering. Nonlinearity is an inherent property of any floating bodies subjected to irregular waves. These floating structures are continuously subjected to environmental loadings from wave, current, wind etc. This can result in undesirable motions of the vessel which may challenge the operability. For a floating body to remain in its position, it should be able to induce a restoring force when displaced. Mooring is provided to enable this restoring force. This paper discusses the hydrodynamic performance and motion characteristics of an 8 point spread mooring system applied to a pipe laying barge operating in the West African sea. The modelling of the barge is done using a computer aided-design (CAD) software RHINOCEROS. Irregular waves are generated using a suitable wave spectrum. Both frequency domain and time domain analysis is done. Numerical simulations based on potential theory are carried out to find the responses and hydrodynamic performance of the barge in both free floating as well as moored conditions. Initially, potential flow frequency domain analysis is done to obtain the Response Amplitude Operator (RAO) which gives an idea about the structural motion in free floating state. RAOs for different wave headings are analyzed. In the following step, a time domain analysis is carried out to obtain the responses of the structure in the moored condition. In this study, wave induced motions are only taken into consideration. Wind and current loads are ruled out and shall be included in further studies. For the current study, 2000 seconds simulation is taken. The results represent wave induced motion responses, mooring line tensions and identify critical mooring lines.

Keywords: Irregular wave, moored barge, time domain analysis, numerical simulation.

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Authors: Maysam Saidi, Hassan Basirat Tabrizi, Reza Maddahian

Abstract:

In this paper, numerical simulations are performed to investigate the effect of disturbance block on flow field of the classical square lid-driven cavity. Attentions are focused on vortex formation and studying the effect of block position on its structure. Corner vortices are different upon block position and new vortices are produced because of the block. Finite volume method is used to solve Navier-Stokes equations and PISO algorithm is employed for the linkage of velocity and pressure. Verification and grid independency of results are reported. Stream lines are sketched to visualize vortex structure in different block positions.

Keywords: Disturbance Block, Finite Volume Method, Lid-Driven Cavity

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