Search results for: average power dissipation.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 4274

Search results for: average power dissipation.

4184 The Comparisons of Average Outgoing Quality Limit between the MCSP-2-C and MCSP-C

Authors: P. Guayjarernpanishkand, T. Mayureesawan

Abstract:

This paper presents a comparison of average outgoing quality limit of the MCSP-2-C plan with MCSP-C when MCSP-2-C has been developed from MCSP-C. The parameters used in MCSP-2- C are: i (the clearance number), c (the acceptance number), m (the number of conforming units to be found before allowing c nonconforming units in the sampling inspection), f1 and f2 (the sampling frequency at level 1 and 2, respectively). The average outgoing quality limit (AOQL) values from two plans were compared and we found that for all sets of i, r, and c values, MCSP-2-C gives higher values than MCSP-C. For all sets of i, r, and c values, the average outgoing quality values of MCSP-C and MCSP-2-C are similar when p is low or high but is difference when p is moderate.

Keywords: average outgoing quality, average outgoing quality limit, continuous sampling plan.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1491
4183 Transfigurative Changes of Governmental Responsibility

Authors: Ákos Cserny

Abstract:

The unequivocal increase of the area of operation of the executive power can happen with the appearance of new areas to be influenced and its integration in the power, or at the expense of the scopes of other organs with public authority. The extension of the executive can only be accepted within the framework of the rule of law if parallel with this process we get constitutional guarantees that the exercise of power is kept within constitutional framework. Failure to do so, however, may result in the lack, deficit of democracy and democratic sense, and may cause an overwhelming dominance of the executive power. Therefore, the aim of this paper is to present executive power and responsibility in the context of different dimensions.

Keywords: Confidence, constitution, executive power, liability, parliamentarism.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 902
4182 Optimal Design for SARMA(P,Q)L Process of EWMA Control Chart

Authors: Y. Areepong

Abstract:

The main goal of this paper is to study Statistical Process Control (SPC) with Exponentially Weighted Moving Average (EWMA) control chart when observations are serially-correlated. The characteristic of control chart is Average Run Length (ARL) which is the average number of samples taken before an action signal is given. Ideally, an acceptable ARL of in-control process should be enough large, so-called (ARL0). Otherwise it should be small when the process is out-of-control, so-called Average of Delay Time (ARL1) or a mean of true alarm. We find explicit formulas of ARL for EWMA control chart for Seasonal Autoregressive and Moving Average processes (SARMA) with Exponential white noise. The results of ARL obtained from explicit formula and Integral equation are in good agreement. In particular, this formulas for evaluating (ARL0) and (ARL1) be able to get a set of optimal parameters which depend on smoothing parameter (λ) and width of control limit (H) for designing EWMA chart with minimum of (ARL1).

Keywords: Average Run Length1, Optimal parameters, Exponentially Weighted Moving Average (EWMA) control chart.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1967
4181 A Set Theory Based Factoring Technique and Its Use for Low Power Logic Design

Authors: Padmanabhan Balasubramanian, Ryuta Arisaka

Abstract:

Factoring Boolean functions is one of the basic operations in algorithmic logic synthesis. A novel algebraic factorization heuristic for single-output combinatorial logic functions is presented in this paper and is developed based on the set theory paradigm. The impact of factoring is analyzed mainly from a low power design perspective for standard cell based digital designs in this paper. The physical implementation of a number of MCNC/IWLS combinational benchmark functions and sub-functions are compared before and after factoring, based on a simple technology mapping procedure utilizing only standard gate primitives (readily available as standard cells in a technology library) and not cells corresponding to optimized complex logic. The power results were obtained at the gate-level by means of an industry-standard power analysis tool from Synopsys, targeting a 130nm (0.13μm) UMC CMOS library, for the typical case. The wire-loads were inserted automatically and the simulations were performed with maximum input activity. The gate-level simulations demonstrate the advantage of the proposed factoring technique in comparison with other existing methods from a low power perspective, for arbitrary examples. Though the benchmarks experimentation reports mixed results, the mean savings in total power and dynamic power for the factored solution over a non-factored solution were 6.11% and 5.85% respectively. In terms of leakage power, the average savings for the factored forms was significant to the tune of 23.48%. The factored solution is expected to better its non-factored counterpart in terms of the power-delay product as it is well-known that factoring, in general, yields a delay-efficient multi-level solution.

Keywords: Factorization, Set theory, Logic function, Standardcell based design, Low power.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1775
4180 Active Power Filter dimensioning Using a Hysteresis Current Controller

Authors: Tarek A. Kasmieh, Hassan S. Omran

Abstract:

This paper aims to give a full study of the dynamic behavior of a mono-phase active power filter. First, the principle of the parallel active power filter will be introduced. Then, a dimensioning procedure for all its components will be explained in detail, such as the input filter, the current and voltage controllers. This active power filter is simulated using OrCAD program showing the validity of the theoretical study.

Keywords: Active power filter, Power Quality, Hysteresiscurrent controller.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1690
4179 Using the Schunt Active Power Filter for Compensation of the Distorted and Umbalanced Power System Voltage

Authors: I. Habi, M. Bouguerra, D. Ouahdi, H. Meglouli

Abstract:

In this paper, we apply the PQ theory with shunt active power filter in an unbalanced and distorted power system voltage to compensate the perturbations generated by non linear load. The power factor is also improved in the current source. The PLL system is used to extract the fundamental component of the even sequence under conditions mentioned of the power system voltage.

Keywords: Converter, power filter, harmonies, non-linear load, pq theory, PLL, unbalanced voltages, distorted voltages.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1588
4178 Power Integrity Analysis of Power Delivery System in High Speed Digital FPGA Board

Authors: Anil Kumar Pandey

Abstract:

Power plane noise is the most significant source of signal integrity (SI) issues in a high-speed digital design. In this paper, power integrity (PI) analysis of multiple power planes in a power delivery system of a 12-layer high-speed FPGA board is presented. All 10 power planes of HSD board are analyzed separately by using 3D Electromagnetic based PI solver, then the transient simulation is performed on combined PI data of all planes along with voltage regulator modules (VRMs) and 70 current drawing chips to get the board level power noise coupling on different high-speed signals. De-coupling capacitors are placed between power planes and ground to reduce power noise coupling with signals.

Keywords: Channel simulation, electromagnetic simulation, power-aware signal integrity analysis, power integrity, PIPro.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2268
4177 Numerical Approximation to the Performance of CUSUM Charts for EMA (1) Process

Authors: K. Petcharat, Y. Areepong, S. Sukparungsri, G. Mititelu

Abstract:

These paper, we approximate the average run length (ARL) for CUSUM chart when observation are an exponential first order moving average sequence (EMA1). We used Gauss-Legendre numerical scheme for integral equations (IE) method for approximate ARL0 and ARL1, where ARL in control and out of control, respectively. We compared the results from IE method and exact solution such that the two methods perform good agreement.

Keywords: Cumulative Sum Chart, Moving Average Observation, Average Run Length, Numerical Approximations.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2143
4176 Performance Analysis of MC-SS for the Indoor BPLC Systems

Authors: Justinian Anatory

Abstract:

power-line networks are promise infrastructure for broadband services provision to end users. However, the network performance is affected by stochastic channel changing which is due to load impedances, number of branches and branched line lengths. It has been proposed that multi-carrier modulations techniques such as orthogonal frequency division multiplexing (OFDM), Multi-Carrier Spread Spectrum (MC-SS), wavelet OFDM can be used in such environment. This paper investigates the performance of different indoor topologies of power-line networks that uses MC-SS modulation scheme.It is observed that when a branch is added in the link between sending and receiving end of an indoor channel an average of 2.5dB power loss is found. In additional, when the branch is added at a node an average of 1dB power loss is found. Additionally when the terminal impedances of the branch change from line characteristic impedance to impedance either higher or lower values the channel performances were tremendously improved. For example changing terminal load from characteristic impedance (85 .) to 5 . the signal to noise ratio (SNR) required to attain the same performances were decreased from 37dB to 24dB respectively. Also, changing the terminal load from channel characteristic impedance (85 .) to very higher impedance (1600 .) the SNR required to maintain the same performances were decreased from 37dB to 23dB. The result concludes that MC-SS performs better compared with OFDM techniques in all aspects and especially when the channel is terminated in either higher or lower impedances.

Keywords: Communication channel model; Broadband Powerlinecommunication; Branched network; OFDM; Delay Spread, MCSS;impulsive noise; load impedance

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1584
4175 A Review of Control Schemes for Active Power Filters in Order to Power Quality Improvement

Authors: Mohammad Hasan Raouf, Azim Nowbakht, Mohammad Bagher Haddadi, Mohammad Reza Tabatabaei

Abstract:

Power quality has become a very important issue recently due to the impact on electricity suppliers, equipment manufacturers and customers. Power quality is described as the variation of voltage, current and frequency in a power system. Voltage magnitude is one of the major factors that determine the quality of power. Indeed, custom power technology, the low-voltage counterpart of the more widely known flexible ac transmission system (FACTS) technology, aimed at high-voltage power transmission applications, has emerged as a credible solution to solve many problems relating to power quality problems. There are various power quality problems such as voltage sags, swells, flickers, interruptions and harmonics etc. Active Power Filter (APF) is one of the custom power devices and can mitigate harmonics, reactive power and unbalanced load currents originating from load side. In this study, an extensive review of APF studies, the advantages and disadvantages of each introduced methods are presented. The study also helps the researchers to choose the optimum control techniques and power circuit configuration for APF applications.

Keywords: Power Quality, Custom Power, Active Filter, Control Approach.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3447
4174 Hybrid Pulse Width Modulation Techniques for the Reduction of Switching Losses and Voltage Harmonics in Cascaded Multilevel Inverters

Authors: Venkata Reddy Kota

Abstract:

These days, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements. Also, it is difficult to connect the traditional converters to the high and medium voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Different modulation topologies like Sinusoidal Pulse Width Modulation (SPWM), Selective Harmonic Elimination Pulse Width Modulation (SHE-PWM) are available for multilevel inverters. In this work, different hybrid modulation techniques which are combination of fundamental frequency modulation and multilevel sinusoidal-modulation are compared. The main characteristic of these modulations are reduction of switching losses with good harmonic performance and balanced power loss dissipation among the device. The proposed hybrid modulation schemes are developed and simulated in Matlab/Simulink for cascaded H-bridge inverter. The results validate the applicability of the proposed schemes for cascaded multilevel inverter.

Keywords: Hybrid PWM techniques, Cascaded Multilevel Inverters, Switching loss minimization.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1967
4173 Unified Power Flow Controller Placement to Improve Damping of Power Oscillations

Authors: M. Salehi, A. A. Motie Birjandi, F. Namdari

Abstract:

Weak damping of low frequency oscillations is a frequent phenomenon in electrical power systems. These frequencies can be damped by power system stabilizers. Unified power flow controller (UPFC), as one of the most important FACTS devices, can be applied to increase the damping of power system oscillations and the more effect of this controller on increasing the damping of oscillations depends on its proper placement in power systems. In this paper, a technique based on controllability is proposed to select proper location of UPFC and the best input control signal in order to enhance damping of power oscillations. The effectiveness of the proposed technique is demonstrated in IEEE 9 bus power system.

Keywords: Unified power flow controller (UPFC), controllability, small signal analysis, eigenvalues.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1888
4172 Soil Moisture Regulation in Irrigated Agriculture

Authors: I. Kruashvili, I. Inashvili, K. Bziava, M. Lomishvili

Abstract:

Seepage capillary anomalies in the active layer of soil, related to the soil water movement, often cause variation of soil hydrophysical properties and become one of the main objectives of the hydroecology. It is necessary to mention that all existing equations for computing the seepage flow particularly from soil channels, through dams, bulkheads, and foundations of hydraulic engineering structures are preferable based on the linear seepage law. Regarding the existing beliefs, anomalous seepage is based on postulates according to which the fluid in free volume is characterized by resistance against shear deformation and is presented in the form of initial gradient. According to the above-mentioned information, we have determined: Equation to calculate seepage coefficient when the velocity of transition flow is equal to seepage flow velocity; by means of power function, equations for the calculation of average and maximum velocities of seepage flow have been derived; taking into consideration the fluid continuity condition, average velocity for calculation of average velocity in capillary tube has been received.

Keywords: Seepage, soil, velocity, water.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 992
4171 Digital Power Management Hardware Realization Using FPGA

Authors: Kar Foo Chong, Andreas Lee Astuti, Pradeep K. Gopalakrishnan, T. Hui Teo

Abstract:

This paper describes design of a digital feedback loop for a low switching frequency dc-dc switching converters. Low switching frequencies were selected in this design. A look up table for the digital PID (proportional integrator differentiator) compensator was implemented using Altera Stratix II with built-in ADC (analog-to-digital converter) to achieve this hardware realization. Design guidelines are given for the PID compensator, high frequency DPWM (digital pulse width modulator) and moving average filter.

Keywords: dc-dc converter, FPGA, PID, power management, .

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1984
4170 Multi-Line Power Flow Control using Interline Power Flow Controller (IPFC) in Power Transmission Systems

Authors: A.V.Naresh Babu, S.Sivanagaraju, Ch.Padmanabharaju, T.Ramana

Abstract:

The interline power flow controller (IPFC) is one of the latest generation flexible AC transmission systems (FACTS) controller used to control power flows of multiple transmission lines. This paper presents a mathematical model of IPFC, termed as power injection model (PIM). This model is incorporated in Newton- Raphson (NR) power flow algorithm to study the power flow control in transmission lines in which IPFC is placed. A program in MATLAB has been written in order to extend conventional NR algorithm based on this model. Numerical results are carried out on a standard 2 machine 5 bus system. The results without and with IPFC are compared in terms of voltages, active and reactive power flows to demonstrate the performance of the IPFC model.

Keywords: flexible AC transmission systems (FACTS), interline power flow controller (IPFC), power injection model (PIM), power flow control.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2969
4169 Analytical Investigation of Replaceable Links with Reduced Web Section for Link-to-Column Connections in Eccentrically Braced Frames

Authors: Daniel Y. Abebe, Sijeong Jeong, Jaehyouk Choi

Abstract:

The use of eccentrically braced frame (EBF) is increasing day by day as EBF possesses high elastic stiffness, stable inelastic response under cyclic lateral loading, and excellent ductility and energy dissipation capacity. The ductility and energy dissipation capacity of EBF depends on the active link beams. Recently, there are two types EBFs; these are conventional EBFs and EBFs with replaceable links. The conventional EBF has a disadvantage during maintenance in post-earthquake. The concept of removable active link beam in EBF is developed to overcome the limitation of the conventional EBF in post-earthquake. In this study, a replaceable link with reduced web section is introduced and design equations are suggested. In addition, nonlinear finite element analysis was conducted in order to evaluate the proposed links.

Keywords: EBFs, replaceable link, earthquake disaster, reduced section.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1440
4168 Design of an Ultra Low Power Low Phase Noise CMOS LC Oscillator

Authors: Mahdi Ebrahimzadeh

Abstract:

In this paper we introduce an ultra low power CMOS LC oscillator and analyze a method to design a low power low phase noise complementary CMOS LC oscillator. A 1.8GHz oscillator is designed based on this analysis. The circuit has power supply equal to 1.1 V and dissipates 0.17 mW power. The oscillator is also optimized for low phase noise behavior. The oscillator phase noise is -126.2 dBc/Hz and -144.4 dBc/Hz at 1 MHz and 8 MHz offset respectively.

Keywords: LC oscillator, Low Power, Low Phase Noise

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3776
4167 A Power-Gating Scheme to Reduce Leakage Power for P-type Adiabatic Logic Circuits

Authors: Hong Li, Linfeng Li, Jianping Hu

Abstract:

With rapid technology scaling, the proportion of the static power consumption catches up with dynamic power consumption gradually. To decrease leakage consumption is becoming more and more important in low-power design. This paper presents a power-gating scheme for P-DTGAL (p-type dual transmission gate adiabatic logic) circuits to reduce leakage power dissipations under deep submicron process. The energy dissipations of P-DTGAL circuits with power-gating scheme are investigated in different processes, frequencies and active ratios. BSIM4 model is adopted to reflect the characteristics of the leakage currents. HSPICE simulations show that the leakage loss is greatly reduced by using the P-DTGAL with power-gating techniques.

Keywords: Leakage reduction, low power, deep submicronCMOS circuits, P-type adiabatic circuits.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1920
4166 All Optical Wavelength Conversion Based On Four Wave Mixing in Optical Fiber

Authors: Surinder Singh, Gursewak Singh Lovkesh

Abstract:

We have designed wavelength conversion based on four wave mixing in an optical fiber at 10 Gb/s. The power of converted signal increases with increase in signal power. The converted signal power is investigated as a function of input signal power and pump power. On comparison of converted signal power at different value of input signal power, we observe that best converted signal power is obtained at -2 dBm input signal power for both up conversion as well as for down conversion. Further, FWM efficiency, quality factor is observed for increase in input signal power and optical fiber length.

Keywords: FWM, Optical fiber, Quality, Wavelength Converter.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2219
4165 High-Efficiency Comparator for Low-Power Application

Authors: M. Yousefi, N. Nasirzadeh

Abstract:

In this paper, dynamic comparator structure employing two methods for power consumption reduction with applications in low-power high-speed analog-to-digital converters have been presented. The proposed comparator has low consumption thanks to power reduction methods. They have the ability for offset adjustment. The comparator consumes 14.3 μW at 100 MHz which is equal to 11.8 fJ. The comparator has been designed and simulated in 180 nm CMOS. Layouts occupy 210 μm2.

Keywords: Comparator, low, power, efficiency.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1603
4164 PAPR Reduction of FBMC Using Sliding Window Tone Reservation Active Constellation Extension Technique

Authors: V. Sandeep Kumar, S. Anuradha

Abstract:

The high Peak to Average Power Ratio (PAR) in Filter Bank Multicarrier with Offset Quadrature Amplitude Modulation (FBMC-OQAM) can significantly reduce power efficiency and performance. In this paper, we address the problem of PAPR reduction for FBMC-OQAM systems using Tone Reservation (TR) technique. Due to the overlapping structure of FBMCOQAM signals, directly applying TR schemes of OFDM systems to FBMC-OQAM systems is not effective. We improve the tone reservation (TR) technique by employing sliding window with Active Constellation Extension for the PAPR reduction of FBMC-OQAM signals, called sliding window tone reservation Active Constellation Extension (SW-TRACE) technique. The proposed SW-TRACE technique uses the peak reduction tones (PRTs) of several consecutive data blocks to cancel the peaks of the FBMC-OQAM signal inside a window, with dynamically extending outer constellation points in active(data-carrying) channels, within margin-preserving constraints, in order to minimize the peak magnitude. Analysis and simulation results compared to the existing Tone Reservation (TR) technique for FBMC/OQAM system. The proposed method SW-TRACE has better PAPR performance and lower computational complexity.

Keywords: FBMC-OQAM, peak-to-average power ratio, sliding window, tone reservation Active Constellation Extension.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2824
4163 Design of a CMOS Differential Operational Transresistance Amplifier in 90 nm CMOS Technology

Authors: Hafiz Muhammad Obaid, Umais Tayyab, Shabbir Majeed Ch.

Abstract:

In this paper, a CMOS differential operational transresistance amplifier (OTRA) is presented. The amplifier is designed and implemented in a standard umc90-nm CMOS technology. The differential OTRA provides wider bandwidth at high gain. It also shows much better rise and fall time and exhibits a very good input current dynamic range of 50 to 50 μA. The OTRA can be used in many analog VLSI applications. The presented amplifier has high gain bandwidth product of 617.6 THz Ω. The total power dissipation of the presented amplifier is also very low and it is 0.21 mW.

Keywords: CMOS, differential, operational transresistance amplifier, OTRA, 90 nm, VLSI.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1122
4162 A High Level Implementation of a High Performance Data Transfer Interface for NoC

Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

Abstract:

The distribution of a single global clock across a chip has become the major design bottleneck for high performance VLSI systems owing to the power dissipation, process variability and multicycle cross-chip signaling. A Network-on-Chip (NoC) architecture partitioned into several synchronous blocks has become a promising approach for attaining fine-grain power management at the system level. In a NoC architecture the communication between the blocks is handled asynchronously. To interface these blocks on a chip operating at different frequencies, an asynchronous FIFO interface is inevitable. However, these asynchronous FIFOs are not required if adjacent blocks belong to the same clock domain. In this paper, we have designed and analyzed a 16-bit asynchronous micropipelined FIFO of depth four, with the awareness of place and route on an FPGA device. We have used a commercially available Spartan 3 device and designed a high speed implementation of the asynchronous 4-phase micropipeline. The asynchronous FIFO implemented on the FPGA device shows 76 Mb/s throughput and a handshake cycle of 109 ns for write and 101.3 ns for read at the simulation under the worst case operating conditions (voltage = 0.95V) on a working chip at the room temperature.

Keywords: Asynchronous, FIFO, FPGA, GALS, Network-on- Chip (NoC), VHDL.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2025
4161 Packaging and Interconnection Technologies of Power Devices, Challenges and Future Trends

Authors: Raed A. Amro

Abstract:

Standard packaging and interconnection technologies of power devices have difficulties meeting the increasing thermal demands of new application fields of power electronics devices. Main restrictions are the decreasing reliability of bond-wires and solder layers with increasing junction temperature. In the last few years intensive efforts have been invested in developing new packaging and interconnection solutions which may open a path to future application of power devices. In this paper, the main failure mechanisms of power devices are described and principle of new packaging and interconnection concepts and their power cycling reliability are presented.

Keywords: Power electronics devices, Reliability, Power Cycling, Low-temperature joining technique (LTJT)

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2559
4160 Power Flow and Modal Analysis of a Power System Including Unified Power Flow Controller

Authors: Djilani Kobibi Youcef Islam, Hadjeri Samir, Djehaf Mohamed Abdeldjalil

Abstract:

The Flexible AC Transmission System (FACTS) technology is a new advanced solution that increases the reliability and provides more flexibility, controllability, and stability of a power system. The Unified Power Flow Controller (UPFC), as the most versatile FACTS device for regulating power flow, is able to control respectively transmission line real power, reactive power, and node voltage. The main purpose of this paper is to analyze the effect of the UPFC on the load flow, the power losses, and the voltage stability using NEPLAN software modules, Newton-Raphson load flow is used for the power flow analysis and the modal analysis is used for the study of the voltage stability. The simulation was carried out on the IEEE 14-bus test system.

Keywords: FACTS, load flow, modal analysis, UPFC, voltage stability.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2348
4159 Assessing the Ways of Improving the Power Saving Modes in the Ore-Grinding Technological Process

Authors: Baghdasaryan Marinka

Abstract:

Monitoring the distribution of electric power consumption in the technological process of ore grinding is conducted. As a result, the impacts of the mill filling rate, the productivity of the ore supply, the volumetric density of the grinding balls, the specific density of the ground ore, and the relative speed of the mill rotation on the specific consumption of electric power have been studied. The power and technological factors affecting the reactive power generated by the synchronous motors, operating within the technological scheme are studied. A block diagram for evaluating the power consumption modes of the technological process is presented, which includes the analysis of the technological scheme, the determination of the place and volumetric density of the ore-grinding mill, the evaluation of the technological and power factors affecting the energy saving process, as well as the assessment of the electric power standards.

Keywords: Electric power standard, factor, ore grinding, power consumption, reactive power, technological.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 881
4158 Voltage Stability Assessment and Enhancement Using STATCOM - A Case Study

Authors: Puneet Chawla, Balwinder Singh

Abstract:

Recently, increased attention has been devoted to the voltage instability phenomenon in power systems. Many techniques have been proposed in the literature for evaluating and predicting voltage stability using steady state analysis methods. In this paper P-V and Q-V curves have been generated for a 57 bus Patiala Rajpura circle of India. The power-flow program is developed in MATLAB using Newton Raphson method. Using Q-V curves the weakest bus of the power system and the maximum reactive power change permissible on that bus is calculated. STATCOMs are placed on the weakest bus to improve the voltage and hence voltage stability and also the power transmission capability of the line.

Keywords: Voltage stability, Reactive power, power flow, weakest bus, STATCOM.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3006
4157 Current Distribution and Cathode Flooding Prediction in a PEM Fuel Cell

Authors: A. Jamekhorshid, G. Karimi, I. Noshadi, A. Jahangiri

Abstract:

Non-uniform current distribution in polymer electrolyte membrane fuel cells results in local over-heating, accelerated ageing, and lower power output than expected. This issue is very critical when fuel cell experiences water flooding. In this work, the performance of a PEM fuel cell is investigated under cathode flooding conditions. Two-dimensional partially flooded GDL models based on the conservation laws and electrochemical relations are proposed to study local current density distributions along flow fields over a wide range of cell operating conditions. The model results show a direct association between cathode inlet humidity increases and that of average current density but the system becomes more sensitive to flooding. The anode inlet relative humidity shows a similar effect. Operating the cell at higher temperatures would lead to higher average current densities and the chance of system being flooded is reduced. In addition, higher cathode stoichiometries prevent system flooding but the average current density remains almost constant. The higher anode stoichiometry leads to higher average current density and higher sensitivity to cathode flooding.

Keywords: Current distribution, Flooding, Hydrogen energysystem, PEM fuel cell.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2389
4156 New Wavelet Indices to Assess Muscle Fatigue during Dynamic Contractions

Authors: González-Izal M., Rodríguez-Carreño I, Mallor-Giménez F, Malanda A, Izquierdo M

Abstract:

The purpose of this study was to evaluate and compare new indices based on the discrete wavelet transform with another spectral parameters proposed in the literature as mean average voltage, median frequency and ratios between spectral moments applied to estimate acute exercise-induced changes in power output, i.e., to assess peripheral muscle fatigue during a dynamic fatiguing protocol. 15 trained subjects performed 5 sets consisting of 10 leg press, with 2 minutes rest between sets. Surface electromyography was recorded from vastus medialis (VM) muscle. Several surface electromyographic parameters were compared to detect peripheral muscle fatigue. These were: mean average voltage (MAV), median spectral frequency (Fmed), Dimitrov spectral index of muscle fatigue (FInsm5), as well as other five parameters obtained from the discrete wavelet transform (DWT) as ratios between different scales. The new wavelet indices achieved the best results in Pearson correlation coefficients with power output changes during acute dynamic contractions. Their regressions were significantly different from MAV and Fmed. On the other hand, they showed the highest robustness in presence of additive white gaussian noise for different signal to noise ratios (SNRs). Therefore, peripheral impairments assessed by sEMG wavelet indices may be a relevant factor involved in the loss of power output after dynamic high-loading fatiguing task.

Keywords: Median Frequency, EMG, wavelet transform, muscle fatigue

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1849
4155 Low Complexity Peak-to-Average Power Ratio Reduction in Orthogonal Frequency Division Multiplexing System by Simultaneously Applying Partial Transmit Sequence and Clipping Algorithms

Authors: V. Sudha, D. Sriram Kumar

Abstract:

Orthogonal Frequency Division Multiplexing (OFDM) has been used in many advanced wireless communication systems due to its high spectral efficiency and robustness to frequency selective fading channels. However, the major concern with OFDM system is the high peak-to-average power ratio (PAPR) of the transmitted signal. Some of the popular techniques used for PAPR reduction in OFDM system are conventional partial transmit sequences (CPTS) and clipping. In this paper, a parallel combination/hybrid scheme of PAPR reduction using clipping and CPTS algorithms is proposed. The proposed method intelligently applies both the algorithms in order to reduce both PAPR as well as computational complexity. The proposed scheme slightly degrades bit error rate (BER) performance due to clipping operation and it can be reduced by selecting an appropriate value of the clipping ratio (CR). The simulation results show that the proposed algorithm achieves significant PAPR reduction with much reduced computational complexity.

Keywords: CCDF, OFDM, PAPR, PTS.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1356