Commenced in January 2007
Paper Count: 30184
Design of an Ultra Low Power Low Phase Noise CMOS LC Oscillator
Authors: Mahdi Ebrahimzadeh
Abstract:In this paper we introduce an ultra low power CMOS LC oscillator and analyze a method to design a low power low phase noise complementary CMOS LC oscillator. A 1.8GHz oscillator is designed based on this analysis. The circuit has power supply equal to 1.1 V and dissipates 0.17 mW power. The oscillator is also optimized for low phase noise behavior. The oscillator phase noise is -126.2 dBc/Hz and -144.4 dBc/Hz at 1 MHz and 8 MHz offset respectively.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1335328Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3329
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