@article{(Open Science Index):https://publications.waset.org/pdf/6883,
	  title     = {Digital Power Management Hardware Realization Using FPGA},
	  author    = {Kar Foo Chong and  Andreas Lee Astuti and  Pradeep K. Gopalakrishnan and  T. Hui Teo},
	  country	= {},
	  institution	= {},
	  abstract     = {This paper describes design of a digital feedback loop
for a low switching frequency dc-dc switching converters. Low
switching frequencies were selected in this design. A look up table
for the digital PID (proportional integrator differentiator)
compensator was implemented using Altera Stratix II with built-in
ADC (analog-to-digital converter) to achieve this hardware
realization. Design guidelines are given for the PID compensator,
high frequency DPWM (digital pulse width modulator) and moving
average filter.},
	    journal   = {International Journal of Electronics and Communication Engineering},
	  volume    = {2},
	  number    = {6},
	  year      = {2008},
	  pages     = {1155 - 1158},
	  ee        = {https://publications.waset.org/pdf/6883},
	  url   	= {https://publications.waset.org/vol/18},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 18, 2008},
	}