Commenced in January 2007
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Digital Power Management Hardware Realization Using FPGA
Authors: Kar Foo Chong, Andreas Lee Astuti, Pradeep K. Gopalakrishnan, T. Hui Teo
Abstract:
This paper describes design of a digital feedback loop for a low switching frequency dc-dc switching converters. Low switching frequencies were selected in this design. A look up table for the digital PID (proportional integrator differentiator) compensator was implemented using Altera Stratix II with built-in ADC (analog-to-digital converter) to achieve this hardware realization. Design guidelines are given for the PID compensator, high frequency DPWM (digital pulse width modulator) and moving average filter.Keywords: dc-dc converter, FPGA, PID, power management, .
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1332790
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[2] T.W. Martin and S.S Ang, "Digital control of switching converters," Proceedings of the IEEE International Symposium on Industrial Electronics, vol.2, pp.480-484, July 1995.
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