Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 31900
Digital Power Management Hardware Realization Using FPGA

Authors: Kar Foo Chong, Andreas Lee Astuti, Pradeep K. Gopalakrishnan, T. Hui Teo


This paper describes design of a digital feedback loop for a low switching frequency dc-dc switching converters. Low switching frequencies were selected in this design. A look up table for the digital PID (proportional integrator differentiator) compensator was implemented using Altera Stratix II with built-in ADC (analog-to-digital converter) to achieve this hardware realization. Design guidelines are given for the PID compensator, high frequency DPWM (digital pulse width modulator) and moving average filter.

Keywords: dc-dc converter, FPGA, PID, power management, .

Digital Object Identifier (DOI):

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1841


[1] A. Prodic and D. Maksimovic, "Design of a digital PID regulator based on look-up tables for control of high-frequency dc-dc Converters,".Proceedings of 2002 IEEE Workshop on Computers in Power Electronics, pp. 18-22, June 2002.
[2] T.W. Martin and S.S Ang, "Digital control of switching converters," Proceedings of the IEEE International Symposium on Industrial Electronics, vol.2, pp.480-484, July 1995.
[3] A. Prodic, D. Maksimovic and R.W. Erickson "Design and implementation of a digital PWM controller for a high-frequency switch dc-dc power converters", The 27th annual Conference of the IEEE Industrial Electronics Society (IECON 2001), vol.2, pp. 893-898, 2001.