Search results for: wood chip.

Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

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Fast delay estimation methods, as opposed to simulation techniques, are needed for incremental performance driven layout synthesis. On-chip inductive effects are becoming predominant in deep submicron interconnects due to increasing clock speed and circuit complexity. Inductance causes noise in signal waveforms, which can adversely affect the performance of the circuit and signal integrity. Several approaches have been put forward which consider the inductance for on-chip interconnect modelling. But for even much higher frequency, of the order of few GHz, the shunt dielectric lossy component has become comparable to that of other electrical parameters for high speed VLSI design. In order to cope up with this effect, on-chip interconnect has to be modelled as distributed RLCG line. Elmore delay based methods, although efficient, cannot accurately estimate the delay for RLCG interconnect line. In this paper, an accurate analytical delay model has been derived, based on first and second moments of RLCG interconnection lines. The proposed model considers both the effect of inductance and conductance matrices. We have performed the simulation in 0.18μm technology node and an error of as low as less as 5% has been achieved with the proposed model when compared to SPICE. The importance of the conductance matrices in interconnect modelling has also been discussed and it is shown that if G is neglected for interconnect line modelling, then it will result an delay error of as high as 6% when compared to SPICE.

Keywords: Delay Modelling; On-Chip Interconnect; RLCGInterconnect; Ramp Input; Damping; VLSI

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Authors: M. Bagheri, P. Mottaghizadeh

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Reliable information about tool temperature distribution is of central importance in metal cutting. In this study, tool-chip interface temperature was determined in cutting of ST37 steel workpiece by applying HSS as the cutting tool in dry turning. Two different approaches were implemented for temperature measuring: an embedded thermocouple (RTD) in to the cutting tool and infrared (IR) camera. Comparisons are made between experimental data and results of MSC.SuperForm and FLUENT software. An investigation of heat generation in cutting tool was performed by varying cutting parameters at the stable cutting tool geometry and results were saved in a computer; then the diagrams of tool temperature vs. various cutting parameters were obtained. The experimental results reveal that the main factors of the increasing cutting temperature are cutting speed (V ), feed rate ( S ) and depth of cut ( h ), respectively. It was also determined that simultaneously change in cutting speed and feed rate has the maximum effect on increasing cutting temperature.

Keywords: Cutting parameters, Finite element modeling, Temperature measurement, Tool-chip interface temperature.

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Authors: Abdullah N. Olimat, Ahmad S. Awad, Faisal M. AL-Ghathian

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Natural wood is used in many applications in Jordan such as furniture, partitions constructions, and cupboards. Experimental work for smoke produced by the combustion of certain wood samples was studied. Smoke generated from burning of natural wood, is considered as a major cause of death in furniture fires. The critical parameter for life safety in fires is the available time for escape, so the visual obscuration due to smoke release during fire is taken into consideration. The effect of smoke, produced by burning of wood, depends on the amount of smoke released in case of fire. The amount of smoke production, apparently, affects the time available for the occupants to escape. To achieve the protection of life of building occupants during fire growth, fire retardant painting products are tested. The tested samples of natural wood include Beech, Ash, Beech Pine, and white Beech Pine. A smoke density chamber manufactured by fire testing technology has been used to perform measurement of smoke properties. The procedure of test was carried out according to the ISO-5659. A nonflammable vertical radiant heat flux of 25 kW/m² is exposed to the wood samples in a horizontal orientation. The main objective of the current study is to carry out the experimental tests for samples of natural woods to evaluate the capability to escape in case of fire and the fire safety requirements. Specific optical density, transmittance, thermal conductivity, and mass loss are main measured parameters. Also, comparisons between samples with paint and with no paint are carried out between the selected samples of woods.

Keywords: Optical density, specific optical density, transmittance, visibility.

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Authors: Ghada Elshafei, Abdelazim Negm

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Life cycle assessment is a technique to assess the environmental aspects and potential impacts associated with a product, process, or service, by compiling an inventory of relevant energy and material inputs and environmental releases; evaluating the potential environmental impacts associated with identified inputs and releases; and interpreting the results to help you make a more informed decision. In this paper, the life cycle assessment of aluminum and beech wood as two commonly used materials in Egypt for window frames are heading, highlighting their benefits and weaknesses. Window frames of the two materials have been assessed on the basis of their production, energy consumption and environmental impacts. It has been found that the climate change of the windows made of aluminum and beech wood window, for a reference window (1.2m×1.2m), are 81.7 mPt and -52.5 mPt impacts respectively. Among the most important results are: fossil fuel consumption, potential contributions to the green building effect and quantities of solid waste tend to be minor for wood products compared to aluminum products; incineration of wood products can cause higher impacts of acidification and eutrophication than aluminum, whereas thermal energy can be recovered.

Keywords: Aluminum window, beech wood window, green building, life cycle assessment, life cycle analysis, SimaPro software, window frame.

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Authors: Vedat Coskun, Fahri Soylemezgiller, Busra Ozdenizci, Kerem Ok

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In recent years, several smart card solutions for transportation services of cities with different technical infrastructures and business models has emerged considerably, which triggers new business and technical opportunities. In order to create a unique system, we present a novel, promising system called Multifunctional City Smart Card System to be used in all cities that provides transportation and loyalty services based on the MasterCard M/Chip Advance standards. The proposed system provides a unique solution for transportation services of large cities over the world, aiming to answer all transportation needs of citizens. In this paper, development of the Multifunctional City Smart Card system and system requirements are briefly described. Moreover, performance analysis results of M/Chip Advance Compatible Validators which is the system's most important component are presented.

Keywords: Smart Card, M/Chip Advance Standard, City Transportation, Performance Analysis.

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Authors: N.K.F. Mustafa, S. Johar, A.G. Ahmad, S.H. Zulkarnain, M.Y. A. Rahman, A.I. Che Ani

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Building life cycle will never be excused from the existence of defects and deterioration. They are common problems in building, existed in newly build or in aged building. Buildings constructed from wood are indeed affected by its agent and serious defects and damages can reduce values to a building. In repair works, it is important to identify the causes and repair techniques that best suites with the condition. This paper reviews the conservation of traditional timber mosque in Malaysia comprises the concept, principles and approaches of mosque conservation in general. As in conservation practice, wood in historic building can be conserved by using various restoration and conservation techniques which this can be grouped as Fully and Partial Replacement, Mechanical Reinforcement, Consolidation by Impregnation and Reinforcement, Removing Paint and also Preservation of Wood and Control Insect Invasion, as to prolong and extended the function of a timber in a building. It resulted that the common techniques adopted in timber mosque conservation are from the conventional ways and the understanding of the repair technique requires the use of only preserve wood to prevent the future immature defects.

Keywords: Building conservation, conservation principles, repair works, traditional timber mosque.

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Authors: Ticiane Rossi, Maurício C. Araújo, José O. Brito, Harold S. Freeman

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Natural dyes are gaining interest due their expected low risk to human health and to the environment. In this study, the wash fastness of a natural coloring matter from the liquid waste produced in the steam treatment of eucalyptus wood in textile fabrics was investigated. Specifically, eucalyptus wood extract was used to dye cotton, nylon and wool in an exhaust dyeing process without the addition of the traditional mordanting agents and then submitted to wash fastness analysis. The resulting dyed fabrics were evaluated for color fastness. It was found that wash fastness of dyed fabrics was very good to cotton and excellent to nylon and wool.

Keywords: Eucalyptus, natural dye, textile fibers, wash fastness.

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Authors: Ching-Feng Chen, Ching-Chih Tsai

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With the size of the transistor gradually approaching the physical limit, it challenges the persistence of Moore’s Law due to such issues of the short channel effect and the development of the high numerical aperture (NA) lithography equipment. In the context of the ever-increasing technical requirements of portable devices and high-performance computing (HPC), relying on the law continuation to enhance the chip density will no longer support the prospects of the electronics industry. Weighing the chip’s power consumption-performance-area-cost-cycle time to market (PPACC) is an updated benchmark to drive the evolution of the advanced wafer nanometer (nm). The advent of two and half- and three-dimensional (2.5 and 3D)- Very-Large-Scale Integration (VLSI) packaging based on Through Silicon Via (TSV) technology has updated the traditional die assembly methods and provided the solution. This overview investigates the up-to-date and cutting-edge packaging technologies for 2.5D and 3D integrated circuits (IC) based on the updated transistor structure and technology nodes. We conclude that multi-chip solutions for 2.5D and 3D IC packaging can prolong Moore’s Law.

Keywords: Moore’s Law, High Numerical Aperture, Power Consumption-Performance-Area-Cost-Cycle Time to Market, PPACC, 2.5 and 3D-Very-Large-Scale Integration Packaging, Through Silicon Vi.

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Authors: M. S. Kaiser, S. Reaz Ahmed

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Chip formation characteristics are investigated during surface finishing of high density polyethylene (HDPE) samples using a shaper machine. Both the cutting speed and depth of cut are varied continually to enable observations under various machining conditions. The generated chips are analyzed in terms of their shape, size, and deformation. Their physical appearances are also observed using digital camera and optical microscope. The investigation shows that continuous chips are obtained for all the cutting conditions. It is observed that cutting speed is more influential than depth of cut to cause dimensional changes of chips. Chips curl radius is also found to increase gradually with the increase of cutting speed. The length of continuous chips remains always smaller than the job length, and the corresponding discrepancies are found to be more prominent at lower cutting speed. Microstructures of the chips reveal that cracks are formed at higher cutting speeds and depth of cuts, which is not that significant at low depth of cut.

Keywords: HDPE, surface-finishing, chip formation, deformation, roughness.

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Authors: U. Pangnakorn, S. Chuenchooklin

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Effect of biopesticide from wood vinegar and extracted substances from 3 medicinal plants such as: non taai yak (Stemona tuberosa Lour), boraphet (Tinospora crispa Mier) and derris (Derris elliptica Roxb) were tested on the age five years of pomelo. The selected pomelo was carried out for insects’ pest control and its quality. The experimental site was located at farmer’s orchard in Phichit Province, Thailand. This study was undertaken during the drought season (December to March). The extracted from plants and wood vinegar were evaluated in 6 treatments: 1) water as control; 2) wood vinegar; 3) S. tuberosa Lour; 4) T. crispa Mier; 5) D. elliptica Roxb; 6) mixed (wood vinegar + S. tuberosa Lour + T. crispa Mier + D. elliptica Roxb). The experiment was RCB with 6 treatments and 3 replications per treatment. The results showed that T. crispa Mier was the highest effectiveness for reduction population of thrips (Scirtothrips dorsalis Hood) and citrus leaf miner (Phyllocnistis citrella Stainton) at 14.10 and 15.37 respectively, followed by treatment of mixed, D. elliptica Roxb, S. tuberosa Lour and wood vinegar with significance different. Additionally, T. crispa Mier promoted the high quality of harvested pomelo in term of thickness of skin at 12.45 mm and S. tuberosa Lour gave the high quality of the pomelo in term of firmness (276.5 kg/cm2) and brix (11.0%).

Keywords: Wood vinegar, Medicinal plants, Pomelo (Citrus maxima Merr.), Thrips (Scirtothrips dorsalis Hood), Citrus leaf miner (Phyllocnistis citrella Stainton).

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Authors: Faizal A. Samman, Thomas Hollstein, Manfred Glesner

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This paper presents design trade-off and performance impacts of the amount of pipeline phase of control path signals in a wormhole-switched network-on-chip (NoC). The numbers of the pipeline phase of the control path vary between two- and one-cycle pipeline phase. The control paths consist of the routing request paths for output selection and the arbitration paths for input selection. Data communications between on-chip routers are implemented synchronously and for quality of service, the inter-router data transports are controlled by using a link-level congestion control to avoid lose of data because of an overflow. The trade-off between the area (logic cell area) and the performance (bandwidth gain) of two proposed NoC router microarchitectures are presented in this paper. The performance evaluation is made by using a traffic scenario with different number of workloads under 2D mesh NoC topology using a static routing algorithm. By using a 130-nm CMOS standard-cell technology, our NoC routers can be clocked at 1 GHz, resulting in a high speed network link and high router bandwidth capacity of about 320 Gbit/s. Based on our experiments, the amount of control path pipeline stages gives more significant impact on the NoC performance than the impact on the logic area of the NoC router.

Keywords: Network-on-Chip, Synchronous Parallel Pipeline, Router Architecture, Wormhole Switching

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Authors: Md. Anayet U. Patwari, Mohammad Ahsan Habib, Md. Tanzib Ehsan, Md Golam Ahnaf, Md. S. I. Chowdhury

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Surface roughness is one of the key quality parameters of the finished product. During any machining operation, high temperatures are generated at the tool-chip interface impairing surface quality and dimensional accuracy of products. Cutting fluids are generally applied during machining to reduce temperature at the tool-chip interface. However, usages of cutting fluids give rise to problems such as waste disposal, pollution, high cost, and human health hazard. Researchers, now-a-days, are opting towards dry machining and other cooling techniques to minimize use of coolants during machining while keeping surface roughness of products within desirable limits. In this paper, a concept of using peltier cooling effects during aluminium milling operation has been presented and adopted with an aim to improve surface roughness of the machined surface. Experimental evidence shows that peltier cooling effect provides better surface roughness of the machined surface compared to dry machining.

Keywords: Aluminium, surface roughness, Peltier cooling effect, milling operation.

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Authors: A. Atli, K. Candelier, J. Alteyrac

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Environmental and sustainability concerns push the industries to manufacture alternative materials having less environmental impact. The Wood Plastic Composites (WPCs) produced by blending the biopolymers and natural fillers permit not only to tailor the desired properties of materials but also are the solution to meet the environmental and sustainability requirements. This work presents the elaboration and characterization of the fully green WPCs prepared by blending a biopolymer, BIOPLAST® GS 2189 and spruce sawdust used as filler with different amounts. Since both components are bio-based, the resulting material is entirely environmentally friendly. The mechanical, thermal, structural properties of these WPCs were characterized by different analytical methods like tensile, flexural and impact tests, Thermogravimetric Analysis (TGA), Differential Scanning Calorimetry (DSC) and X-ray Diffraction (XRD). Their water absorption properties and resistance to the termite and fungal attacks were determined in relation with different wood filler content. The tensile and flexural moduli of WPCs increased with increasing amount of wood fillers into the biopolymer, but WPCs became more brittle compared to the neat polymer. Incorporation of spruce sawdust modified the thermal properties of polymer: The degradation, cold crystallization, and melting temperatures shifted to higher temperatures when spruce sawdust was added into polymer. The termite, fungal and water absorption resistance of WPCs decreased with increasing wood amount in WPCs, but remained in durability class 1 (durable) concerning fungal resistance and quoted 1 (attempted attack) in visual rating regarding to the termites resistance except that the WPC with the highest wood content (30 wt%) rated 2 (slight attack) indicating a long term durability. All the results showed the possibility to elaborate the easy injectable composite materials with adjustable properties by incorporation of BIOPLAST® GS 2189 and spruce sawdust. Therefore, lightweight WPCs allow both to recycle wood industry byproducts and to produce a full ecologic material.

Keywords: Biodegradability, durability, mechanical properties, melt flow index, spectrophotometry, structural properties, thermal properties, wood-plastic composites.

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Authors: Zainudin Kornain, Azman Jalar, Rozaidi Rasid, Fong Chee Seng

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Void formation in underfill is considered as failure in flip chip manufacturing process. Void formation possibly caused by several factors such as poor soldering and flux residue during die attach process, void entrapment due moisture contamination, dispense pattern process and setting up the curing process. This paper presents the comparison of single step and two steps curing profile towards the void and black dots formation in underfill for Hi-CTE Flip Chip Ceramic Ball Grid Array Package (FC-CBGA). Statistic analysis was conducted to analyze how different factors such as wafer lot, sawing technique, underfill fillet height and curing profile recipe were affected the formation of voids and black dots. A C-Mode Scanning Aqoustic Microscopy (C-SAM) was used to scan the total count of voids and black dots. It was shown that the 2 steps curing profile provided solution for void elimination and black dots in underfill after curing process.

Keywords: black dots formation, curing profile, FC-CBGA, underfill, void formation,

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Authors: M. K. Benhaoua, A. K. Singh, A. E. H. Benyamina, A. Kumar, P. Boulet

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In this paper, we propose a new packing strategy to find a free resource for run-time mapping of application tasks to NoC-based Heterogeneous MPSoC. The proposed strategy minimizes the task mapping time in addition to placing the communicating tasks close to each other. To evaluate our approach, a comparative study is carried out for a platform containing single task supported PEs. Experiments show that our strategy provides better results when compared to latest dynamic mapping strategies reported in the literature.

Keywords: Multi-Processor Systems-on-Chip (MPSoCs), Network-on-Chip (NoC), Heterogeneous architectures, Dynamic mapping heuristics.

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Authors: Y. Ni, K. Sebri

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The practical implementation of audio-video coupled speech recognition systems is mainly limited by the hardware complexity to integrate two radically different information capturing devices with good temporal synchronisation. In this paper, we propose a solution based on a smart CMOS image sensor in order to simplify the hardware integration difficulties. By using on-chip image processing, this smart sensor can calculate in real time the X/Y projections of the captured image. This on-chip projection reduces considerably the volume of the output data. This data-volume reduction permits a transmission of the condensed visual information via the same audio channel by using a stereophonic input available on most of the standard computation devices such as PC, PDA and mobile phones. A prototype called VMIKE (Visio-Microphone) has been designed and realised by using standard 0.35um CMOS technology. A preliminary experiment gives encouraged results. Its efficiency will be further investigated in a large variety of applications such as biometrics, speech recognition in noisy environments, and vocal control for military or disabled persons, etc.

Keywords: Audio-Visual Speech recognition, CMOS Smartsensor, On-Chip image processing.

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Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

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This work proposes an accurate crosstalk noise estimation method in the presence of multiple RLC lines for the use in design automation tools. This method correctly models the loading effects of non switching aggressors and aggressor tree branches using resistive shielding effect and realistic exponential input waveforms. Noise peak and width expressions have been derived. The results obtained are at good agreement with SPICE results. Results show that average error for noise peak is 4.7% and for the width is 6.15% while allowing a very fast analysis.

Keywords: Crosstalk, distributed RLC segments, On-Chip interconnect, output response, VLSI, noise peak, noise width.

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Authors: Ramlan Zailani, Halim Ghafar, Mohamad Sofian So'aib

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Air infiltration in mass scale industrial applications of bio char production is inevitable. The presence of oxygen during the carbonization process is detrimental to the production of biochar yield and properties. The experiment was carried out on several wood species in a fixed-bed pyrolyser under various fractions of oxygen ranging from 0% to 11% by varying nitrogen and oxygen composition in the pyrolysing gas mixtures at desired compositions. The bed temperature and holding time were also varied. Process optimization was carried out by Response Surface Methodology (RSM) by employing Central Composite Design (CCD) using Design Expert 6.0 Software. The effect of oxygen ratio and holding time on biochar yield within the range studied were statistically significant. From the analysis result, optimum condition of 15.2% biochar yield of mangrove wood was predicted at pyrolysis temperature of 403 oC, oxygen percentage of 2.3% and holding time of two hours. This prediction agreed well with the experiment finding of 15.1% biochar yield.

Keywords: Mangrove wood, slow pyrolysis, oxygen infiltration.

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Authors: Shiyang Zhu, G. Q. Lo, D. L. Kwong

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Silicon photonics is merging as a unified platform for driving photonic based telecommunications and for local photonic based interconnect but it suffers from large footprint as compared with the nanoelectronics. Plasmonics is an attractive alternative for nanophotonics. In this work, two CMOS compatible plasmonic waveguide platforms are compared. One is the horizontal metal-insulator-Si-insulator-metal nanoplasmonic waveguide and the other is metal-insulator-Si hybrid plasmonic waveguide. Various passive and active photonic devices have been experimentally demonstrated based on these two plasmonic waveguide platforms.

Keywords: Plasmonics, on-chip integration, Silicon photonics.

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Authors: Yuanyuan Zhang, Guang Sun, Li Su, Depeng Jin, Lieguang Zeng

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Since Network-on-Chip (NoC) uses network interfaces (NIs) to improve the design productivity, by now, there have been a few papers addressing the design and implementation of a NI module. However, none of them considered the difference of address encoding methods between NoC and the traditional bus-shared architecture. On the basis of this difference, in the paper, we introduce a transmit mechanism to solve such a problem for global asynchronous locally synchronous (GALS) NoC. Furthermore, we give the concrete implementation of the NI module in this transmit mechanism. Finally, we evaluate its performance and area overhead by a VHDL-based cycle-accurate RTL model and simulation results confirm the validity of this address-oriented transmit mechanism.

Keywords: Network-on-Chip, Network Interface, Open CoreProtocol, Address.

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Authors: Panagiotis Kyratsis, Dr. Ing. Nikolaos Bilalis, Dr. Ing. Aristomenis Antoniadis

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Twist drills are geometrical complex tools and thus various researchers have adopted different mathematical and experimental approaches for their simulation. The present paper acknowledges the increasing use of modern CAD systems and using the API (Application Programming Interface) of a CAD system, drilling simulations are carried out. The developed DRILL3D software routine, creates parametrically controlled tool geometries and using different cutting conditions, achieves the generation of solid models for all the relevant data involved (drilling tool, cut workpiece, undeformed chip). The final data derived, consist a platform for further direct simulations regarding the determination of cutting forces, tool wear, drilling optimizations etc.

Keywords: Drilling, CAD based simulation, 3D-modelling.

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Authors: Paki Turgut, Mehmet Gumuscu

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In this study, artificial limestone brick samples are produced by using wood sawdust wastes (WSW) having different grades of sizes and limestone powder waste (LPW). The thermo-elastic properties of produced brick samples in various WSW amounts are investigated. At 30% WSW replacement with LPW in the brick sample the thermal conductivity value is effectively reduced and the reduction in the thermal conductivity value of brick sample at 30% WSW replacement with LPW is about 38.9% as compared with control sample. The energy conservation in buildings by using LPW and WSW in masonry brick material production having low thermal conductivity reduces energy requirements. A strong relationship is also found among the thermal conductivity, unit weight and ultrasonic pulse velocity values of brick samples produced. It shows a potential to be used for walls, wooden board substitute, alternative to the concrete blocks, ceiling panels, sound barrier panels, absorption materials etc.

Keywords: Limestone dust, masonry brick, thermo-elastic properties, wood sawdust.

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Authors: Anis Gharbi, Mohamed Haouari, Talel Ladhari, Mohamed Ali Rakrouki

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We address a complex scheduling problem arising in the wood panel industry with the objective of minimizing a quadratic function of job tardiness. The proposed solution strategy, which is based on an effective genetic algorithm, has been coded and implemented within a major Tunisian company, leader in the wood panel manufacturing. Preliminary experimental results indicate significant decrease of delivery times.

Keywords: Genetic algorithm, heuristic, hybrid flowshop, total weighted squared tardiness.

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Authors: Nawang Chhunid, Gagnesh Kumar

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On-chip memories consume a significant portion of the overall die space and power in modern microprocessors. On-chip caches depend on Static Random-Access Memory (SRAM) cells and scaling of technology occurring as per Moore’s law. Unfortunately, the scaling is affecting stability, performance, and leakage power which will become major problems for future SRAMs in aggressive nanoscale technologies due to increasing device mismatch and variations. 3T1D Dynamic Random-Access Memory (DRAM) cell is a non-destructive read DRAM cell with three transistors and a gated diode. In 3T1D DRAM cell gated diode (D1) acts as a storage device and also as an amplifier, which leads to fast read access. Due to its high tolerance to process variation, high density, and low cost of memory as compared to 6T SRAM cell, it is universally used by the advanced microprocessor for on chip data and program memory. In the present paper, it has been shown that 3T1D DRAM cell can perform better in terms of fast read access as compared to 6T, 4T, 3T SRAM cells, respectively.

Keywords: DRAM cell, read access time, tanner EDA tool write access time and retention time, average power dissipation.

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Authors: Alexandru Epureanu, Virgil Teodor

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One of the main research directions in CAD/CAM machining area is the reducing of machining time. The feedrate scheduling is one of the advanced techniques that allows keeping constant the uncut chip area and as sequel to keep constant the main cutting force. They are two main ways for feedrate optimization. The first consists in the cutting force monitoring, which presumes to use complex equipment for the force measurement and after this, to set the feedrate regarding the cutting force variation. The second way is to optimize the feedrate by keeping constant the material removal rate regarding the cutting conditions. In this paper there is proposed a new approach using an extended database that replaces the system model. The feedrate scheduling is determined based on the identification of the reconfigurable machine tool, and the feed value determination regarding the uncut chip section area, the contact length between tool and blank and also regarding the geometrical roughness. The first stage consists in the blank and tool monitoring for the determination of actual profiles. The next stage is the determination of programmed tool path that allows obtaining the piece target profile. The graphic representation environment models the tool and blank regions and, after this, the tool model is positioned regarding the blank model according to the programmed tool path. For each of these positions the geometrical roughness value, the uncut chip area and the contact length between tool and blank are calculated. Each of these parameters are compared with the admissible values and according to the result the feed value is established. We can consider that this approach has the following advantages: in case of complex cutting processes the prediction of cutting force is possible; there is considered the real cutting profile which has deviations from the theoretical profile; the blank-tool contact length limitation is possible; it is possible to correct the programmed tool path so that the target profile can be obtained. Applying this method, there are obtained data sets which allow the feedrate scheduling so that the uncut chip area is constant and, as a result, the cutting force is constant, which allows to use more efficiently the machine tool and to obtain the reduction of machining time.

Keywords: Reconfigurable machine tool, system identification, uncut chip area, cutting conditions scheduling.

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Authors: Mohammad Ali Jabraeil Jamali, Ahmad Khademzadeh, Hasan Asil, Amir Asil

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This method decrease usage power (expenditure) in networks on chips (NOC). This method data coding for data transferring in order to reduces expenditure. This method uses data compression reduces the size. Expenditure calculation in NOC occurs inside of NOC based on grown models and transitive activities in entry ports. The goal of simulating is to weigh expenditure for encoding, decoding and compressing in Baseline networks and reduction of switches in this type of networks. KeywordsNetworks on chip, Compression, Encoding, Baseline networks, Banyan networks.

Keywords: Networks on chip, Compression, Encoding, Baseline networks, Banyan networks

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Authors: Minsoo Lee, Yun-mi Kim, Yearn Jeong Kim, Yoon-kyung Lee, Hyejung Yoon

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Biological data has several characteristics that strongly differentiate it from typical business data. It is much more complex, usually large in size, and continuously changes. Until recently business data has been the main target for discovering trends, patterns or future expectations. However, with the recent rise in biotechnology, the powerful technology that was used for analyzing business data is now being applied to biological data. With the advanced technology at hand, the main trend in biological research is rapidly changing from structural DNA analysis to understanding cellular functions of the DNA sequences. DNA chips are now being used to perform experiments and DNA analysis processes are being used by researchers. Clustering is one of the important processes used for grouping together similar entities. There are many clustering algorithms such as hierarchical clustering, self-organizing maps, K-means clustering and so on. In this paper, we propose a clustering algorithm that imitates the ecosystem taking into account the features of biological data. We implemented the system using an Ant-Colony clustering algorithm. The system decides the number of clusters automatically. The system processes the input biological data, runs the Ant-Colony algorithm, draws the Topic Map, assigns clusters to the genes and displays the output. We tested the algorithm with a test data of 100 to1000 genes and 24 samples and show promising results for applying this algorithm to clustering DNA chip data.

Keywords: Ant colony system, biological data, clustering, DNA chip.

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Authors: T. Brettschneider, C. Dorrer, H. Suy, T. Braun, E. Jung, R. Hoofman, M. Bründel, R. Zengerle, F. Lärmer

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We present an integration approach of a CMOS biosensor into a polymer based microfluidic environment suitable for mass production. It consists of a wafer-level-package for the silicon die and laser bonding process promoted by an intermediate hot melt foil to attach the sensor package to the microfluidic chip, without the need for dispensing of glues or underfiller. A very good condition of the sensing area was obtained after introducing a protection layer during packaging. A microfluidic flow cell was fabricated and shown to withstand pressures up to Δp = 780 kPa without leakage. The employed biosensors were electrically characterized in a dry environment.

Keywords: CMOS biosensor, laser bonding, silicon polymer integration, wafer level packaging.

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Authors: Faizal A. Samman, Thomas Hollstein, Manfred Glesner

Abstract:

A synchronous network-on-chip using wormhole packet switching and supporting guaranteed-completion best-effort with low-priority (LP) and high-priority (HP) wormhole packet delivery service is presented in this paper. Both our proposed LP and HP message services deliver a good quality of service in term of lossless packet completion and in-order message data delivery. However, the LP message service does not guarantee minimal completion bound. The HP packets will absolutely use 100% bandwidth of their reserved links if the HP packets are injected from the source node with maximum injection. Hence, the service are suitable for small size messages (less than hundred bytes). Otherwise the other HP and LP messages, which require also the links, will experience relatively high latency depending on the size of the HP message. The LP packets are routed using a minimal adaptive routing, while the HP packets are routed using a non-minimal adaptive routing algorithm. Therefore, an additional 3-bit field, identifying the packet type, is introduced in their packet headers to classify and to determine the type of service committed to the packet. Our NoC prototypes have been also synthesized using a 180-nm CMOS standard-cell technology to evaluate the cost of implementing the combination of both services.

Keywords: Network-on-Chip, Parallel Pipeline Router Architecture, Wormhole Switching, Two-Level Priority Service.

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Authors: Imron Rosyadi, Ridha A. Djemal, Saleh A. Alshebeili

Abstract:

Design and implementation of a novel B-ACOSD CFAR algorithm is presented in this paper. It is proposed for detecting radar target in log-normal distribution environment. The BACOSD detector is capable to detect automatically the number interference target in the reference cells and detect the real target by an adaptive threshold. The detector is implemented as a System on Chip on FPGA Altera Stratix II using parallelism and pipelining technique. For a reference window of length 16 cells, the experimental results showed that the processor works properly with a processing speed up to 115.13MHz and processing time0.29 ┬Ás, thus meets real-time requirement for a typical radar system.

Keywords: CFAR, FPGA, radar.

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