Search results for: Circuit models
3025 Extension of a Smart Piezoelectric Ceramic Rod
Authors: Ali Reza Pouladkhan, Jalil Emadi, Hamed Habibolahiyan
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This paper presents an exact solution and a finite element method (FEM) for a Piezoceramic Rod under static load. The cylindrical rod is made from polarized ceramics (piezoceramics) with axial poling. The lateral surface of the rod is traction-free and is unelectroded. The two end faces are under a uniform normal traction. Electrically, the two end faces are electroded with a circuit between the electrodes, which can be switched on or off. Two cases of open and shorted electrodes (short circuit and open circuit) will be considered. Finally, a finite element model will be used to compare the results with an exact solution. The study uses ABAQUS (v.6.7) software to derive the finite element model of the ceramic rod.
Keywords: Finite element method, Ceramic rod; Axial poling, Normal traction, Short circuit, Open circuit.
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Authors: T. Thosdeekoraphat, S. Summart, C. Saetiaw, S. Santalunai, C. Thongsopa
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This article presents a current-mode universal biquadratic filter. The proposed circuit can apparently provide standard functions of the biquad filter: low-pass, high-pass, bandpass, band-reject and all-pass functions. The circuit uses 4 current controlled transconductance amplifiers (CCTAs) and 2 grounded capacitors. In addition, the pole frequency and quality factor can be adjusted by electronic method by adjusting the bias currents of the CCTA. The proposed circuit uses only grounded capacitors without additional external resistors, the proposed circuit is considerably appropriate to further developing into an integrated circuit. The results of PSPICE simulation program are corresponding to the theoretical analysis.
Keywords: Resistor-less, Current-mode, Biquad filter, CCTA.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20623023 Realization of Electronically Tunable Currentmode First-order Allpass Filter and Its Application
Authors: Supayotin Na Songkla, Winai Jaikla
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This article presents a resistorless current-mode firstorder allpass filter based on second generation current controlled current conveyors (CCCIIs). The features of the circuit are that: the pole frequency can be electronically controlled via the input bias current: the circuit description is very simple, consisting of 2 CCCIIs and single grounded capacitor, without any external resistors and component matching requirements. Consequently, the proposed circuit is very appropriate to further develop into an integrated circuit. Low input and high output impedances of the proposed configuration enable the circuit to be cascaded in current-mode without additional current buffers. The PSpice simulation results are depicted. The given results agree well with the theoretical anticipation. The application example as a current-mode quadrature oscillator is included.
Keywords: First-order all pass filter, current-mode, CCCII.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17943022 A Study on the Condition Monitoring of Transmission Line by On-line Circuit Parameter Measurement
Authors: Il Dong Kim, Jin Rak Lee, Young Jun Ko, Young Taek Jin
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An on-line condition monitoring method for transmission line is proposed using electrical circuit theory and IT technology in this paper. It is reasonable that the circuit parameters such as resistance (R), inductance (L), conductance (g) and capacitance (C) of a transmission line expose the electrical conditions and physical state of the line. Those parameters can be calculated from the linear equation composed of voltages and currents measured by synchro-phasor measurement technique at both end of the line. A set of linear voltage drop equations containing four terminal constants (A, B ,C ,D ) are mathematical models of the transmission line circuits. At least two sets of those linear equations are established from different operation condition of the line, they may mathematically yield those circuit parameters of the line. The conditions of line connectivity including state of connecting parts or contacting parts of the switching device may be monitored by resistance variations during operation. The insulation conditions of the line can be monitored by conductance (g) and capacitance(C) measurements. Together with other condition monitoring devices such as partial discharge, sensors and visual sensing device etc.,they may give useful information to monitor out any incipient symptoms of faults. The prototype of hardware system has been developed and tested through laboratory level simulated transmission lines. The test has shown enough evident to put the proposed method to practical uses.
Keywords: Transmission Line, Condition Monitoring, Circuit Parameters, Synchro- phasor Measurement.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 31983021 A Design of Electronically Tunable Voltagemode Universal Filter with High Input Impedance
Authors: Surapong Siripongdee, Witthaya Mekhum
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This article presents a voltage-mode universal biquadratic filter performing simultaneous 3 standard functions: lowpass, high-pass and band-pass functions, employing differential different current conveyor (DDCC) and current controlled current conveyor (CCCII) as active element. The features of the circuit are that: the quality factor and pole frequency can be tuned independently via the input bias currents: the circuit description is very simple, consisting of 1 DDCC, 2 CCCIIs, 2 electronic resistors and 2 grounded capacitors. Without requiring component matching conditions, the proposed circuit is very appropriate to further develop into an integrated circuit. The PSPICE simulation results are depicted. The given results agree well with the theoretical anticipation.Keywords: Filter, DDCC, CCCII, Analog circuit, Voltagemode, PSPICE
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15623020 Explicit Delay and Power Estimation Method for CMOS Inverter Driving on-Chip RLC Interconnect Load
Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar
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The resistive-inductive-capacitive behavior of long interconnects which are driven by CMOS gates are presented in this paper. The analysis is based on the ¤Ç-model of a RLC load and is developed for submicron devices. Accurate and analytical expressions for the output load voltage, the propagation delay and the short circuit power dissipation have been proposed after solving a system of differential equations which accurately describe the behavior of the circuit. The effect of coupling capacitance between input and output and the short circuit current on these performance parameters are also incorporated in the proposed model. The estimated proposed delay and short circuit power dissipation are in very good agreement with the SPICE simulation with average relative error less than 6%.Keywords: Delay, Inverter, Short Circuit Power, ¤Ç-Model, RLCInterconnect, VLSI
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16923019 Application of Magnetic Circuit and Multiple-Coils Array in Induction Heating for Improving Localized Hyperthermia
Authors: Chi-Fang Huang, Xi-Zhang Lin, Yi-Ru Yang
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Aiming the application of localized hyperthermia, a magnetic induction system with new approaches is proposed. The techniques in this system for improving the effectiveness of localized hyperthermia are that using magnetic circuit and the multiple-coil array instead of a giant coil for generating magnetic field. Specially, amorphous metal is adopted as the material of magnetic circuit. Detail design parameters of hardware are well described. Simulation tool is employed for this work and experiment result is reported as well.Keywords: cancer therapy, hyperthermia, Helmholtz coil, induction heating, magnetic circuit.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 32723018 Theoretical Considerations of the Influence of Mechanical Uniaxial Stress on Pixel Readout Circuits
Authors: Georgios C. Dogiamis, Bedrich J. Hosticka, Anton Grabmaier
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In this work the effects of uniaxial mechanical stress on a pixel readout circuit are theoretically analyzed. It is the effects of mechanical stress on the in-pixel transistors do not arise at the output, when a correlated double sampling circuit is used. However, mechanical stress effects on the photodiode will directly appear at the readout chain output. Therefore, compensation techniques are needed to overcome this situation. Moreover simulation technique of mechanical stress is proposed and diverse layout as well as design recommendations are put forward, in order to minimize stress related effects on the output of a circuit. he shown, that wever, Moreover, a out
Keywords: mechanical uniaxial stress, pixel readout circuit
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15493017 Dielectric Recovery Characteristics of High Voltage Gas Circuit Breakers Operating with CO2 Mixture
Authors: Peng Lu, Branimir Radisavljevic, Martin Seeger, Daniel Over, Torsten Votteler, Bernardo Galletti
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CO₂-based gas mixtures exhibit huge potential as the interruption medium for replacing SF₆ in high voltage switchgears. In this paper, the recovery characteristics of dielectric strength of CO₂-O₂ mixture in the post arc phase after the current zero are presented. As representative examples, the dielectric recovery curves under conditions of different gas filling pressures and short-circuit current amplitudes are presented. A series of dielectric recovery measurements suggests that the dielectric recovery rate is proportional to the mass flux of the blowing gas, and the dielectric strength recovers faster in the case of lower short circuit currents.
Keywords: CO2 mixture, high voltage circuit breakers, dielectric recovery rate, short-circuit current, mass flux.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4733016 A Study on Unidirectional Analog Output Voltage Inverter for Capacitive Load
Authors: Sun-Ki Hong, Nam-HeeByeon, Jung-Seop Lee, Tae-Sam Kang
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For Common R or R-L load to apply arbitrary voltage, the bridge traditional inverters don’t have any difficulties by PWM method. However for driving some piezoelectric actuator, arbitrary voltage not a pulse but a steady voltage should be applied. Piezoelectric load is considered as R-C load and its voltage does not decrease even though the applied voltage decreases. Therefore it needs some special inverter with circuit that can discharge the capacitive energy. Especially for unidirectional arbitrary voltage driving like as sine wave, it becomes more difficult problem. In this paper, a charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator is proposed. The circuit has charging and discharging switches for increasing and decreasing output voltage. With the proposed simple circuit, the load voltage can have any unidirectional level with tens of bandwidth because the load voltage can be adjusted by switching the charging and discharging switch appropriately. The appropriateness is proved from the simulation of the proposed circuit.
Keywords: DC-DC converter, analog output voltage, sinusoidal drive, piezoelectric load, discharging circuit.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 25203015 Signal Generator Circuit Carrying Information as Embedded Features from Multi-Transducer Signals
Authors: Sheroz Khan, Mustafa Zeki, Shihab Abdel Hameed, AHM Zahirul Alam, Aisha Hassan Abdalla, A. F. Salami, W. A. Lawal
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A novel circuit for generating a signal embedded with features about data from three sensors is presented. This suggested circuit is making use of a resistance-to-time converter employing a bridge amplifier, an integrator and a comparator. The second resistive sensor (Rz) is transformed into duty cycle. Another bridge with varying resistor, (Ry) in the feedback of an OP AMP is added in series to change the amplitude of the resulting signal in a proportional relationship while keeping the same frequency and duty cycle representing proportional changes in resistors Rx and Rz already mentioned. The resultant output signal carries three types of information embedded as variations of its frequency, duty cycle and amplitude.Keywords: Integrator, Comparator, Bridge Circuit, Resistanceto-Time Converter, Conditioning Circuit.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 13773014 A Digitally Programmable Voltage-mode Multifunction Biquad Filter with Single-Output
Authors: C. Ketviriyakit, W. Kongnun, C. Chanapromma, P. Silapan
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This article proposes a voltage-mode multifunction filter using differential voltage current controllable current conveyor transconductance amplifier (DV-CCCCTA). The features of the circuit are that: the quality factor and pole frequency can be tuned independently via the values of capacitors: the circuit description is very simple, consisting of merely 1 DV-CCCCTA, and 2 capacitors. Without any component matching conditions, the proposed circuit is very appropriate to further develop into an integrated circuit. Additionally, each function response can be selected by suitably selecting input signals with digital method. The PSpice simulation results are depicted. The given results agree well with the theoretical anticipation.Keywords: DV-CCCCTA, Voltage-mode, Multifunction filter
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 13573013 Computer-Aided Teaching of Transformers for Undergraduates
Authors: Rajesh Kumar, Roopali Dogra, Puneet Aggarwal
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In the era of technological advancement, use of computer technology has become inevitable. Hence it has become the need of the hour to integrate software methods in engineering curriculum as a part to boost pedagogy techniques. Simulations software is a great help to graduates of disciplines such as electrical engineering. Since electrical engineering deals with high voltages and heavy instruments, extra care must be taken while operating with them. The viable solution would be to have appropriate control. The appropriate control could be well designed if engineers have knowledge of kind of waveforms associated with the system. Though these waveforms can be plotted manually, but it consumes a lot of time. Hence aid of simulation helps to understand steady state of system and resulting in better performance. In this paper computer, aided teaching of transformer is carried out using MATLAB/Simulink. The test carried out on a transformer includes open circuit test and short circuit respectively. The respective parameters of transformer are then calculated using the values obtained from open circuit and short circuit test respectively using Simulink.
Keywords: Computer aided teaching, transformer, open circuit test, short circuit test, Simulink.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 9713012 Piezoelectric Transducer Modeling: with System Identification (SI) Method
Authors: Nora Taghavi, Ali Sadr
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System identification is the process of creating models of dynamic process from input- output signals. The aim of system identification can be identified as “ to find a model with adjustable parameters and then to adjust them so that the predicted output matches the measured output". This paper presents a method of modeling and simulating with system identification to achieve the maximum fitness for transformation function. First by using optimized KLM equivalent circuit for PVDF piezoelectric transducer and assuming different inputs including: sinuside, step and sum of sinusides, get the outputs, then by using system identification toolbox in MATLAB, we estimate the transformation function from inputs and outputs resulted in last program. Then compare the fitness of transformation function resulted from using ARX,OE(Output- Error) and BJ(Box-Jenkins) models in system identification toolbox and primary transformation function form KLM equivalent circuit.Keywords: PVDF modeling, ARX, BJ(Box-Jenkins), OE(Output-Error), System Identification.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 27453011 Investigation of Constant Transconductance Circuit for Low Power Low-Noise Amplifier
Authors: Wei Yi Lim, M. Annamalai Arasu, M. Kumarasamy Raja, Minkyu Je
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In this paper, the design of wide-swing constant transconductance (gm) bias circuit that generates bias voltage for low-noise amplifier (LNA) circuit design by using an off-chip resistor is demonstrated. The overall transconductance (Gm) generated by the constant gm bias circuit is important to maintain the overall gain and noise figure of the LNA circuit. Therefore, investigation is performed to study the variation in Gm with process, temperature and supply voltage (PVT). Temperature and supply voltage are swept from -10 °C to 85 °C and 1.425 V to 1.575 V respectively, while the process conditions are also varied to the extreme and the gm variation is eventually concluded at between -3 % to 7 %. With the slight variation in the gm value, through simulation, at worst condition of state SS, we are able to attain a conversion gain (S21) variation of -3.10 % and a noise figure (NF) variation of 18.71 %. The whole constant gm circuit draws approximately 100 µA from a 1.5V supply and is designed based on 0.13 µm CMOS process.
Keywords: Transconductance, LNA, temperature, process.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 41303010 PSRR Enhanced LDO Regulator Using Noise Sensing Circuit
Authors: Min-ju Kwon, Chae-won Kim, Jeong-yun Seo, Hee-guk Chae, Yong-seo Koo
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In this paper, we presented the LDO (low-dropout) regulator which enhanced the PSRR by applying the constant current source generation technique through the BGR (Band Gap Reference) to form the noise sensing circuit. The current source through the BGR has a constant current value even if the applied voltage varies. Then, the noise sensing circuit, which is composed of the current source through the BGR, operated between the error amplifier and the pass transistor gate of the LDO regulator. As a result, the LDO regulator has a PSRR of -68.2 dB at 1k Hz, -45.85 dB at 1 MHz and -45 dB at 10 MHz. the other performance of the proposed LDO was maintained at the same level of the conventional LDO regulator.
Keywords: LDO regulator, noise sensing circuit, current reference, pass transistor.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 6463009 A New Hardware Implementation of Manchester Line Decoder
Authors: Ibrahim A. Khorwat, Nabil Naas
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In this paper, we present a simple circuit for Manchester decoding and without using any complicated or programmable devices. This circuit can decode 90kbps of transmitted encoded data; however, greater than this transmission rate can be decoded if high speed devices were used. We also present a new method for extracting the embedded clock from Manchester data in order to use it for serial-to-parallel conversion. All of our experimental measurements have been done using simulation.Keywords: High threshold level, level segregation, lowthreshold level, smoothing circuit synchronization..
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 37843008 Chua’s Circuit Regulation Using a Nonlinear Adaptive Feedback Technique
Authors: Abolhassan Razminia, Mohammad-Ali Sadrnia
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Chua’s circuit is one of the most important electronic devices that are used for Chaos and Bifurcation studies. A central role of secure communication is devoted to it. Since the adaptive control is used vastly in the linear systems control, here we introduce a new trend of application of adaptive method in the chaos controlling field. In this paper, we try to derive a new adaptive control scheme for Chua’s circuit controlling because control of chaos is often very important in practical operations. The novelty of this approach is for sake of its robustness against the external perturbations which is simulated as an additive noise in all measured states and can be generalized to other chaotic systems. Our approach is based on Lyapunov analysis and the adaptation law is considered for the feedback gain. Because of this, we have named it NAFT (Nonlinear Adaptive Feedback Technique). At last, simulations show the capability of the presented technique for Chua’s circuit.
Keywords: Chaos, adaptive control, nonlinear control, Chua's circuit.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20653007 Design of SiC Capacitive Pressure Sensor with LC-Based Oscillator Readout Circuit
Authors: Azza M. Anis, M. M. Abutaleb, Hani F. Ragai, M. I. Eladawy
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This paper presents the characterization and design of a capacitive pressure sensor with LC-based 0.35 µm CMOS readout circuit. SPICE is employed to evaluate the characteristics of the readout circuit and COMSOL multiphysics structural analysis is used to simulate the behavior of the pressure sensor. The readout circuit converts the capacitance variation of the pressure sensor into the frequency output. Simulation results show that the proposed pressure sensor has output frequency from 2.50 to 2.28 GHz in a pressure range from 0.1 to 2 MPa almost linearly. The sensitivity of the frequency shift with respect to the applied pressure load is 0.11 GHz/MPa.
Keywords: CMOS LC-based oscillator, micro pressure sensor, silicon carbide
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16693006 Solver for a Magnetic Equivalent Circuit and Modeling the Inrush Current of a 3-Phase Transformer
Authors: Markus G. Ortner, Christian Magele, Klaus Krischan
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Knowledge about the magnetic quantities in a magnetic circuit is always of great interest. On the one hand, this information is needed for the simulation of a transformer. On the other hand, parameter studies are more reliable, if the magnetic quantities are derived from a well established model. One possibility to model the 3-phase transformer is by using a magnetic equivalent circuit (MEC). Though this is a well known system, it is often not an easy task to set up such a model for a large number of lumped elements which additionally includes the nonlinear characteristic of the magnetic material. Here we show the setup of a solver for a MEC and the results of the calculation in comparison to measurements taken. The equations of the MEC are based on a rearranged system of the nodal analysis. Thus it is possible to achieve a minimum number of equations, and a clear and simple structure. Hence, it is uncomplicated in its handling and it supports the iteration process. Additional helpful tasks are implemented within the solver to enhance the performance. The electric circuit is described by an electric equivalent circuit (EEC). Our results for the 3-phase transformer demonstrate the computational efficiency of the solver, and show the benefit of the application of a MEC.
Keywords: Inrush current, magnetic equivalent circuit, nonlinear behavior, transformer.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 24663005 Variable-Relation Criterion for Analysis of the Memristor
Authors: Qingjiang Li, Hui Xu, Haijun Liu, Xiaobo Tian
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To judge whether the memristor can be interpreted as the fourth fundamental circuit element, we propose a variable-relation criterion of fundamental circuit elements. According to the criterion, we investigate the nature of three fundamental circuit elements and the memristor. From the perspective of variables relation, the memristor builds a direct relation between the voltage across it and the current through it, instead of a direct relation between the magnetic flux and the charge. Thus, it is better to characterize the memristor and the resistor as two special cases of the same fundamental circuit element, which is the memristive system in Chua-s new framework. Finally, the definition of memristor is refined according to the difference between the magnetic flux and the flux linkage.Keywords: Memristor, Fundamental, Variable-Relation Criterion, Memristive system
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16763004 An Efficient VLSI Design Approach to Reduce Static Power using Variable Body Biasing
Authors: Md. Asif Jahangir Chowdhury, Md. Shahriar Rizwan, M. S. Islam
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In CMOS integrated circuit design there is a trade-off between static power consumption and technology scaling. Recently, the power density has increased due to combination of higher clock speeds, greater functional integration, and smaller process geometries. As a result static power consumption is becoming more dominant. This is a challenge for the circuit designers. However, the designers do have a few methods which they can use to reduce this static power consumption. But all of these methods have some drawbacks. In order to achieve lower static power consumption, one has to sacrifice design area and circuit performance. In this paper, we propose a new method to reduce static power in the CMOS VLSI circuit using Variable Body Biasing technique without being penalized in area requirement and circuit performance.
Keywords: variable body biasing, state saving technique, stack effect, dual V-th, static power reduction.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 30873003 Two Active Elements Based All-Pass Section Suited for Current-Mode Cascading
Authors: J. Mohan, S. Maheshwari
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A new circuit topology realizing a first-order currentmode all-pass filter is proposed using two dual-output second generation current conveyor and two passive components. The circuit possesses low-input and high-output impedance, which makes it ideal for current-mode systems. The proposed circuit is verified through PSPICE simulation results.
Keywords: active filter, all-pass filter, current-mode, current conveyor.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16233002 A Novel Optimized JTAG Interface Circuit Design
Authors: Chenguang Guo, Lei Chen, Yanlong Zhang
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This paper describes a novel optimized JTAG interface circuit between a JTAG controller and target IC. Being able to access JTAG using only one or two pins, this circuit does not change the original boundary scanning test frequency of target IC. Compared with the traditional JTAG interface which based on IEEE std. 1149.1, this reduced pin technology is more applicability in pin limited devices, and it is easier to control the scale of target IC for the designer.
Keywords: Boundary scan, JTAG interface, Test frequency, Reduced pin
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 13743001 A Study on ESD Protection Circuit Applying Silicon Controlled Rectifier-Based Stack Technology with High Holding Voltage
Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo
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In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.Keywords: ESD, SCR, latch-up, power clamp, holding voltage.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 9893000 A New Digital Transceiver Circuit for Asynchronous Communication
Authors: Aakash Subramanian, Vansh Pal Singh Makh, Abhijit Mitra
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A new digital transceiver circuit for asynchronous frame detection is proposed where both the transmitter and receiver contain all digital components, thereby avoiding possible use of conventional devices like monostable multivibrators with unstable external components such as resistances and capacitances. The proposed receiver circuit, in particular, uses a combinational logic block yielding an output which changes its state as soon as the start bit of a new frame is detected. This, in turn, helps in generating an efficient receiver sampling clock. A data latching circuit is also used in the receiver to latch the recovered data bits in any new frame. The proposed receiver structure is also extended from 4- bit information to any general n data bits within a frame with a common expression for the output of the combinational logic block. Performance of the proposed hardware design is evaluated in terms of time delay, reliability and robustness in comparison with the standard schemes using monostable multivibrators. It is observed from hardware implementation that the proposed circuit achieves almost 33 percent speed up over any conventional circuit.
Keywords: Asynchronous Communication, Digital Detector, Combinational logic output, Sampling clock generator, Hardwareimplementation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 22132999 An Optimization Tool-Based Design Strategy Applied to Divide-by-2 Circuits with Unbalanced Loads
Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza
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This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.Keywords: Divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 21282998 ANN Models for Microstrip Line Synthesis and Analysis
Authors: Dr.K.Sri Rama Krishna, J.Lakshmi Narayana, Dr.L.Pratap Reddy
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Microstrip lines, widely used for good reason, are broadband in frequency and provide circuits that are compact and light in weight. They are generally economical to produce since they are readily adaptable to hybrid and monolithic integrated circuit (IC) fabrication technologies at RF and microwave frequencies. Although, the existing EM simulation models used for the synthesis and analysis of microstrip lines are reasonably accurate, they are computationally intensive and time consuming. Neural networks recently gained attention as fast and flexible vehicles to microwave modeling, simulation and optimization. After learning and abstracting from microwave data, through a process called training, neural network models are used during microwave design to provide instant answers to the task learned.This paper presents simple and accurate ANN models for the synthesis and analysis of Microstrip lines to more accurately compute the characteristic parameters and the physical dimensions respectively for the required design specifications.Keywords: Neural Models, Algorithms, Microstrip Lines, Analysis, Synthesis
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 21502997 Design and Implementation of 4 Bit Multiplier Using Fault Tolerant Hybrid Full Adder
Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar
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The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.
Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14422996 Design of 900 MHz High Gain SiGe Power Amplifier with Linearity Improved Bias Circuit
Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang
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A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.
Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 992