@article{(Open Science Index):https://publications.waset.org/pdf/9571,
	  title     = {A Novel Optimized JTAG Interface Circuit Design},
	  author    = {Chenguang Guo and  Lei Chen and  Yanlong Zhang},
	  country	= {},
	  institution	= {},
	  abstract     = {This paper describes a novel optimized JTAG interface circuit between a JTAG controller and target IC. Being able to access JTAG using only one or two pins, this circuit does not change the original boundary scanning test frequency of target IC. Compared with the traditional JTAG interface which based on IEEE std. 1149.1, this reduced pin technology is more applicability in pin limited devices, and it is easier to control the scale of target IC for the designer.
},
	    journal   = {International Journal of Electronics and Communication Engineering},
	  volume    = {6},
	  number    = {1},
	  year      = {2012},
	  pages     = {12 - 16},
	  ee        = {https://publications.waset.org/pdf/9571},
	  url   	= {https://publications.waset.org/vol/61},
	  bibsource = {https://publications.waset.org/},
	  issn  	= {eISSN: 1307-6892},
	  publisher = {World Academy of Science, Engineering and Technology},
	  index 	= {Open Science Index 61, 2012},
	}