Search results for: circuit partitioning
207 Fast and Efficient On-Chip Interconnection Modeling for High Speed VLSI Systems
Authors: A.R. Aswatha, T. Basavaraju, S. Sandeep Kumar
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Timing driven physical design, synthesis, and optimization tools need efficient closed-form delay models for estimating the delay associated with each net in an integrated circuit (IC) design. The total number of nets in a modern IC design has increased dramatically and exceeded millions. Therefore efficient modeling of interconnection is needed for high speed IC-s. This paper presents closed–form expressions for RC and RLC interconnection trees in current mode signaling, which can be implemented in VLSI design tool. These analytical model expressions can be used for accurate calculation of delay after the design clock tree has been laid out and the design is fully routed. Evaluation of these analytical models is several orders of magnitude faster than simulation using SPICE.Keywords: IC design, RC/RLC Interconnection, VLSI Systems.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1505206 Compensation Method Eliminating Voltage Distortions in PWM Inverter
Authors: H. Sediki, S. Djennoune
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The switching lag-time and the voltage drop across the power devices cause serious waveform distortions and fundamental voltage drop in pulse width-modulated inverter output. These phenomenons are conspicuous when both the output frequency and voltage are low. To estimate the output voltage from the PWM reference signal it is essential to take account of these imperfections and to correct them. In this paper, on-line compensation method is presented. It needs three simple blocs to add at the ideal reference voltages. This method does not require any additional hardware circuit and off- line experimental measurement. The paper includes experimental results to demonstrate the validity of the proposed method. It is applied, finally, in case of indirect vector controlled induction machine and implemented using dSpace card.Keywords: Dead time, field-oriented control, Induction motor, PWM inverter, voltage drop.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4582205 Practical Simulation Model of Floating-Gate MOS Transistor in Sub 100nm Technologies
Authors: Zina Saheb, Ezz El-Masry
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As the Silicon oxide scaled down in MOSFET technology to few nanometers, gate Direct Tunneling (DT) in Floating gate (FGMOSFET) devices has become a major concern for analog designers. FGMOSFET has been used in many low-voltage and low-power applications, however, there is no accurate model that account for DT gate leakage in nano-scale. This paper studied and analyzed different simulation models for FGMOSFET using TSMC 90-nm technology. The simulation results for FGMOSFET cascade current mirror shows the impact of DT on circuit performance in terms of current and voltage without the need for fabrication. This works shows the significance of using an accurate model for FGMOSFET in nan-scale technologies.Keywords: CMOS transistor, direct-tunneling current, floatinggate, gate-leakage current, simulation model.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2989204 The Effects of 2wt% Cu Addition on the Corrosion Behavior of Heat Treated Al-6Si-0.5Mg-2Ni Alloy
Authors: A. Hossain, M. A. Gafur, F. Gulshan, A. S. W. Kurny
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Al-Si-Mg-Ni(-Cu) alloys are widely used in the automotive industry. They have the advantage of low weight associated with low coefficient of thermal expansion and excellent mechanical properties – mainly at high temperatures. The corrosion resistance of these alloys in coastal area, particularly sea water, however is not yet known. In this investigation, electrochemical impedance spectroscopy (EIS) and potentiodynamic polarization have been used to evaluate the corrosion resistance of Al-6Si-0.5Mg-2Ni (-2Cu) alloys in simulated sea water environments. The potentiodynamic polarization curves reveal that 2 wt% Cu content alloy (Alloy-2) is more prone to corrosion than the Cu free alloy (Alloy-1). But the EIS test results showed that corrosion resistance or charge transfer resistance (Rct) increases with the addition of Cu. Due to addition of Cu and thermal treatment, the magnitude of open circuit potential (OCP), corrosion potential (Ecorr) and pitting corrosion potential (Epit) of Al-6Si-0.5Mg-2Ni alloy in NaCl solution were shifted to the more noble direction.
Keywords: Al-Si alloy, potentiodynamic polarization, EIS, SEM.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2254203 A Simple Approach of Three phase Distribution System Modeling for Power Flow Calculations
Authors: J. B. V. Subrahmanyam, C. Radhakrishna
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This paper presents a simple three phase power flow method for solution of three-phase unbalanced radial distribution system (RDN) with voltage dependent loads. It solves a simple algebraic recursive expression of voltage magnitude, and all the data are stored in vector form. The algorithm uses basic principles of circuit theory and can be easily understood. Mutual coupling between the phases has been included in the mathematical model. The proposed algorithm has been tested with several unbalanced radial distribution networks and the results are presented in the article. 8- bus and IEEE 13 bus unbalanced radial distribution system results are in agreements with the literature and show that the proposed model is valid and reliable.Keywords: radial distribution networks, load flow, circuitmodel, three-phase four-wire, unbalance.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3994202 Efficient Hardware Architecture of the Direct 2- D Transform for the HEVC Standard
Authors: Fatma Belghith, Hassen Loukil, Nouri Masmoudi
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This paper presents the hardware design of a unified architecture to compute the 4x4, 8x8 and 16x16 efficient twodimensional (2-D) transform for the HEVC standard. This architecture is based on fast integer transform algorithms. It is designed only with adders and shifts in order to reduce the hardware cost significantly. The goal is to ensure the maximum circuit reuse during the computing while saving 40% for the number of operations. The architecture is developed using FIFOs to compute the second dimension. The proposed hardware was implemented in VHDL. The VHDL RTL code works at 240 MHZ in an Altera Stratix III FPGA. The number of cycles in this architecture varies from 33 in 4-point- 2D-DCT to 172 when the 16-point-2D-DCT is computed. Results show frequency improvements reaching 96% when compared to an architecture described as the direct transcription of the algorithm.Keywords: HEVC, Modified Integer Transform, FPGA.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2747201 Effect of Low Frequency Memory on High Power 12W LDMOS Transistors Intermodulation Distortion
Authors: A. Alghanim, J. Benedikt, P. J. Tasker
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The increasing demand for higher data rates in wireless communication systems has led to the more effective and efficient use of all allocated frequency bands. In order to use the whole bandwidth at maximum efficiency, one needs to have RF power amplifiers with a higher linear level and memory-less performance. This is considered to be a major challenge to circuit designers. In this thesis the linearity and memory are studied and examined via the behavior of the intermodulation distortion (IMD). A major source of the in-band distortion can be shown to be influenced by the out-of-band impedances presented at either the input or the output of the device, especially those impedances terminated the low frequency (IF) components. Thus, in order to regulate the in-band distortion, the out of-band distortion must be controllable. These investigations are performed on a 12W LDMOS device characterised at 2.1 GHz within a purpose built, high-power measurement system.
Keywords: Low Frequency Memory, IntermodulationDistortion (IMD).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1951200 Fault Location Identification in High Voltage Transmission Lines
Authors: Khaled M. El Naggar
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This paper introduces a digital method for fault section identification in transmission lines. The method uses digital set of the measured short circuit current to locate faults in electrical power systems. The digitized current is used to construct a set of overdetermined system of equations. The problem is then constructed and solved using the proposed digital optimization technique to find the fault distance. The proposed optimization methodology is an application of simulated annealing optimization technique. The method is tested using practical case study to evaluate the proposed method. The accurate results obtained show that the algorithm can be used as a powerful tool in the area of power system protection.
Keywords: Optimization, estimation, faults, measurement, high voltage, simulated annealing.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 840199 A Comparison Study of Inspector's Performance between Regular and Complex Tasks
Authors: Santirat Nansaarng, Sittichai Kaewkuekool, Supreeya Siripattanakunkajorn
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This research was to study a comparison of inspector-s performance between regular and complex visual inspection task. Visual task was simulated on DVD read control circuit. Inspection task was performed by using computer. Subjects were 10 undergraduate randomly selected and test for 20/20. Then, subjects were divided into two groups, five for regular inspection (control group) and five for complex inspection (treatment group) tasks. Result was showed that performance on regular and complex inspectors was significantly difference at the level of 0.05. Inspector performance on regular inspection was showed high percentage on defects detected by using equal time to complex inspection. This would be indicated that inspector performance was affected by visual inspection task.
Keywords: Visual inspection task, regular and complex task.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1255198 An Area-Efficient and Low-Power Digital Pulse-Width Modulation Controller for DC-DC Switching Power Converter
Authors: Jingjing Lan, Jun Zhou, Xin Liu
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In this paper, a low-power digital controller for DC-DC power conversion was presented. The controller generates the pulse-width modulated (PWM) signal from digital inputs provided by analog-to-digital converter (ADC). An efficient and simple design scheme to develop the control unit was discussed. This method allows minimization of the consumed resources of the chip and it is based on direct digital design approach. In this application, with the proposed scheme, nearly half area and two-third of the power consumption was saved compared to the conventional schemes. This work illustrates the possibility of implementing low-power and area-efficient power management circuit using direct digital design based approach.
Keywords: Buck converter, DC-DC power conversion, digital control, proportional-integral (PI) controller.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2266197 Hysteresis Control of Power Conditioning Unit for Fuel Cell Distributed Generation System
Authors: Kanhu Charan Bhuyan, Subhransu Padhee, Rajesh Kumar Patjoshi, Kamalakanta Mahapatra
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Fuel cell is an emerging technology in the field of renewable energy sources which has the capacity to replace conventional energy generation sources. Fuel cell utilizes hydrogen energy to produce electricity. The electricity generated by the fuel cell can’t be directly used for a specific application as it needs proper power conditioning. Moreover, the output power fluctuates with different operating conditions. To get a stable output power at an economic rate, power conditioning circuit is essential for fuel cell. This paper implements a two-staged power conditioning unit for fuel cell based distributed generation using hysteresis current control technique.
Keywords: Fuel cell, power conditioning unit, hysteresis control.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2423196 A New Microstrip Diplexer Using Coupled Stepped Impedance Resonators
Authors: A. Chinig, J. Zbitou, A. Errkik, L. Elabdellaoui, A. Tajmouati, A. Tribak, M. Latrach
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This paper presents a new structure of microstrip band pass filter (BPF) based on coupled stepped impedance resonators. Each filter consists of two coupled stepped impedance resonators connected to microstrip feed lines. The coupled junction is utilized to connect the two BPFs to the antenna. This two band pass filters are designed and simulated to operate for the digital communication system (DCS) and Industrial Scientific and Medical (ISM) bands at 1.8 GHz and 2.45 GHz respectively. The proposed circuit presents good performances with an insertion loss lower than 2.3 dB and isolation between the two channels greater than 21 dB. The prototype of the optimized diplexer have been investigated numerically by using ADS Agilent and verified with CST microwave software.
Keywords: Band Pass Filter, coupled junction, coupled stepped impedance resonators, diplexer, insertion loss, isolation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3822195 Computation of Probability Coefficients using Binary Decision Diagram and their Application in Test Vector Generation
Authors: Ashutosh Kumar Singh, Anand Mohan
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This paper deals with efficient computation of probability coefficients which offers computational simplicity as compared to spectral coefficients. It eliminates the need of inner product evaluations in determination of signature of a combinational circuit realizing given Boolean function. The method for computation of probability coefficients using transform matrix, fast transform method and using BDD is given. Theoretical relations for achievable computational advantage in terms of required additions in computing all 2n probability coefficients of n variable function have been developed. It is shown that for n ≥ 5, only 50% additions are needed to compute all probability coefficients as compared to spectral coefficients. The fault detection techniques based on spectral signature can be used with probability signature also to offer computational advantage.Keywords: Binary Decision Diagrams, Spectral Coefficients, Fault detection
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1464194 An Approach in the Improvement of the Reliability of Impedance Relay
Authors: D. Ouahdi, R. Ladjeroud, I. Habi
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The distance protection mainly the impedance relay which is considered as the main protection for transmission lines can be subjected to impedance measurement error which is, mainly, due to the fault resistance and to the power fluctuation. Thus, the impedance relay may not operate for a short circuit at the far end of the protected line (case of the under reach) or operates for a fault beyond its protected zone (case of overreach). In this paper, an approach to fault detection by a distance protection, which distinguishes between the faulty conditions and the effect of overload operation mode, has been developed. This approach is based on the symmetrical components; mainly the negative sequence, and it is taking into account both the effect of fault resistance and the overload situation which both have an effect upon the reliability of the protection in terms of dependability for the former and security for the latter.
Keywords: Distance Protection, Fault Detection, negative sequence, overload, Transmission line.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1839193 Inverter Based Gain-Boosting Fully Differential CMOS Amplifier
Authors: Alpana Agarwal, Akhil Sharma
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This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The self-biasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for gain boosting. The Miller compensation is also applied to enhance the phase margin. The circuit has been designed and simulated in 1.8 V 0.18 µm CMOS technology. The simulation results show a high DC gain of 100.7 dB, Unity-Gain Bandwidth of 107.8 MHz, and Phase Margin of 66.7o with a power dissipation of 286 μW and makes it suitable candidate for the high resolution pipelined ADCs.
Keywords: CMOS amplifier, gain boosting, inverter-based amplifier, self-biased inverter.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2614192 A Hyper-Domain Image Watermarking Method based on Macro Edge Block and Wavelet Transform for Digital Signal Processor
Authors: Yi-Pin Hsu, Shin-Yu Lin
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In order to protect original data, watermarking is first consideration direction for digital information copyright. In addition, to achieve high quality image, the algorithm maybe can not run on embedded system because the computation is very complexity. However, almost nowadays algorithms need to build on consumer production because integrator circuit has a huge progress and cheap price. In this paper, we propose a novel algorithm which efficient inserts watermarking on digital image and very easy to implement on digital signal processor. In further, we select a general and cheap digital signal processor which is made by analog device company to fit consumer application. The experimental results show that the image quality by watermarking insertion can achieve 46 dB can be accepted in human vision and can real-time execute on digital signal processor.
Keywords: watermarking, digital signal processor, embedded system
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1246191 A Novel Interpolation Scheme and Apparatus to Extend DAC Usable Spectrum over Nyquist Frequency
Authors: Wang liguo, Wang zongmin, Kong ying
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A novel interpolation scheme to extend usable spectrum and upconvert in high performance D/A converters is addressed in this paper. By adjusting the pulse width of cycle and the production circuit of code, the expansion code is a null code or complementary code that is interpolation process. What the times and codes of interpolation decide DAC works in one of a normal mode or multi-mixer mode so that convert the input digital data signal into normal signal or a mixed analog signal having a mixer frequency that is higher than the data frequency. Simulation results show that the novel scheme and apparatus most extend the usable frequency spectrum into fifth to sixth Nyquist zone beyond conventional DACs.Keywords: interpolation, upconversion, modulation, switching function, duty cycle.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1506190 The Effect of Transformer’s Vector Group on Retained Voltage Magnitude and Sag Frequency at Industrial Sites Due to Faults
Authors: M. N. Moschakis, V. V. Dafopoulos, I. G. Andritsos, E. S. Karapidakis, J. M. Prousalidis
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This paper deals with the effect of a power transformer’s vector group on the basic voltage sag characteristics during unbalanced faults at a meshed or radial power network. Specifically, the propagation of voltage sags through a power transformer is studied with advanced short-circuit analysis. A smart method to incorporate this effect on analytical mathematical expressions is proposed. Based on this methodology, the positive effect of transformers of certain vector groups on the mitigation of the expected number of voltage sags per year (sag frequency) at the terminals of critical industrial customers can be estimated.
Keywords: Balanced and unbalanced faults, industrial design, phase shift, power quality, power systems, voltage sags (or dips).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 10220189 Simulation and Analytical Investigation of Different Combination of Single Phase Power Transformers
Authors: M. Salih Taci, N. Tayebi, I. Bozkır
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In this paper, the equivalent circuit of the ideal single-phase power transformer with its appropriate voltage current measurement was presented. The calculated values of the voltages and currents of the different connections single phase normal transformer and the results of the simulation process are compared. As it can be seen, the calculated results are the same as the simulated results. This paper includes eight possible different transformer connections. Depending on the desired voltage level, step-down and step-up application transformer is considered. Modelling and analysis of a system consisting of an equivalent source, transformer (primary and secondary), and loads are performed to investigate the combinations. The obtained values are simulated in PSpice environment and then how the currents, voltages and phase angle are distributed between them is explained based on calculation.
Keywords: Transformer, simulation, equivalent model, parallel series combinations.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1113188 Jitter Transfer in High Speed Data Links
Authors: Tsunwai Gary Yip
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Phase locked loops for data links operating at 10 Gb/s or faster are low phase noise devices designed to operate with a low jitter reference clock. Characterization of their jitter transfer function is difficult because the intrinsic noise of the device is comparable to the random noise level in the reference clock signal. A linear model is proposed to account for the intrinsic noise of a PLL. The intrinsic noise data of a PLL for 10 Gb/s links is presented. The jitter transfer function of a PLL in a test chip for 12.8 Gb/s data links was determined in experiments using the 400 MHz reference clock as the source of simultaneous excitations over a wide range of frequency. The result shows that the PLL jitter transfer function can be approximated by a second order linear model.Keywords: Intrinsic phase noise, jitter in data link, PLL jitter transfer function, high speed clocking in electronic circuit
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1945187 FPGA Implementation of Adaptive Clock Recovery for TDMoIP Systems
Authors: Semih Demir, Anil Celebi
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Circuit switched networks widely used until the end of the 20th century have been transformed into packages switched networks. Time Division Multiplexing over Internet Protocol (TDMoIP) is a system that enables Time Division Multiplexing (TDM) traffic to be carried over packet switched networks (PSN). In TDMoIP systems, devices that send TDM data to the PSN and receive it from the network must operate with the same clock frequency. In this study, it was aimed to implement clock synchronization process in Field Programmable Gate Array (FPGA) chips using time information attached to the packages received from PSN. The designed hardware is verified using the datasets obtained for the different carrier types and comparing the results with the software model. Field tests are also performed by using the real time TDMoIP system.
Keywords: Clock recovery on TDMoIP, FPGA, MATLAB reference model, clock synchronization.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1461186 The Analysis of Own Signals of PM Electrical Machines – Example of Eccentricity
Authors: M. Barański
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This article presents a vibration diagnostic method designed for Permanent Magnets (PM) electrical machines–traction motors and generators. Those machines are commonly used in traction drives of electrical vehicles and small wind or water systems. The described method is very innovative and unique. Specific structural properties of machines excited by permanent magnets are used in this method - electromotive force (EMF) generated due to vibrations. There was analyzed number of publications, which describe vibration diagnostic methods, and tests of electrical machines and there was no method found to determine the technical condition of such machine basing on their own signals. This work presents field-circuit model, results of static tests, results of calculations and simulations.Keywords: Electrical vehicle, permanent magnet, traction drive, vibrations, electrical machine, eccentricity, diagnostics, data acquisition, data analysis.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1881185 Transformer Diagnosis Based on Coupled Circuits Method Modelling
Authors: Labar Hocine, Rekik Badri, Bounaya Kamel, Kelaiaia Mounia Samira
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Diagnostic goal of transformers in service is to detect the winding or the core in fault. Transformers are valuable equipment which makes a major contribution to the supply security of a power system. Consequently, it is of great importance to minimize the frequency and duration of unwanted outages of power transformers. So, Frequency Response Analysis (FRA) is found to be a useful tool for reliable detection of incipient mechanical fault in a transformer, by finding winding or core defects. The authors propose as first part of this article, the coupled circuits method, because, it gives most possible exhaustive modelling of transformers. And as second part of this work, the application of FRA in low frequency in order to improve and simplify the response reading. This study can be useful as a base data for the other transformers of the same categories intended for distribution grid.
Keywords: Diagnostic, Coupled Circuit Method, FRA, Transformer Faults
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1519184 Electroencephalography Based Brain-Computer Interface for Cerebellum Impaired Patients
Authors: Young-Seok Choi
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In healthy humans, the cortical brain rhythm shows specific mu (~6-14 Hz) and beta (~18-24 Hz) band patterns in the cases of both real and imaginary motor movements. As cerebellar ataxia is associated with impairment of precise motor movement control as well as motor imagery, ataxia is an ideal model system in which to study the role of the cerebellocortical circuit in rhythm control. We hypothesize that the EEG characteristics of ataxic patients differ from those of controls during the performance of a Brain-Computer Interface (BCI) task. Ataxia and control subjects showed a similar distribution of mu power during cued relaxation. During cued motor imagery, however, the ataxia group showed significant spatial distribution of the response, while the control group showed the expected decrease in mu-band power (localized to the motor cortex).
Keywords: Brain-computer interface, EEG, modulation, ataxia.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1967183 CMOS-Compatible Deposited Materials for Photonic Layers Integrated above Electronic Integrated Circuit
Authors: Shiyang Zhu, G. Q. Lo, D. L. Kwong
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Silicon photonics has generated an increasing interest in recent years mainly for optical communications optical interconnects in microelectronic circuits or bio-sensing applications. The development of elementary passive and active components (including detectors and modulators), which are mainly fabricated on the silicon on insulator platform for CMOS-compatible fabrication, has reached such a performance level that the integration challenge of silicon photonics with microelectronic circuits should be addressed. Since crystalline silicon can only be grown from another silicon crystal, making it impossible to deposit in this state, the optical devices are typically limited to a single layer. An alternative approach is to integrate a photonic layer above the CMOS chip using back-end CMOS fabrication process. In this paper, various materials, including silicon nitride, amorphous silicon, and polycrystalline silicon, for this purpose are addressed.
Keywords: Silicon photonics, CMOS, Integration.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2475182 Improved Approximation to the Derivative of a Digital Signal Using Wavelet Transforms for Crosstalk Analysis
Authors: S. P. Kozaitis, R. L. Kriner
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The information revealed by derivatives can help to better characterize digital near-end crosstalk signatures with the ultimate goal of identifying the specific aggressor signal. Unfortunately, derivatives tend to be very sensitive to even low levels of noise. In this work we approximated the derivatives of both quiet and noisy digital signals using a wavelet-based technique. The results are presented for Gaussian digital edges, IBIS Model digital edges, and digital edges in oscilloscope data captured from an actual printed circuit board. Tradeoffs between accuracy and noise immunity are presented. The results show that the wavelet technique can produce first derivative approximations that are accurate to within 5% or better, even under noisy conditions. The wavelet technique can be used to calculate the derivative of a digital signal edge when conventional methods fail.Keywords: digital signals, electronics, IBIS model, printedcircuit board, wavelets
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1876181 Phase Jitter Transfer in High Speed Data Links
Authors: Tsunwai Gary Yip
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Phase locked loops in 10 Gb/s and faster data links are low phase noise devices. Characterization of their phase jitter transfer functions is difficult because the intrinsic noise of the PLLs is comparable to the phase noise of the reference clock signal. The problem is solved by using a linear model to account for the intrinsic noise. This study also introduces a novel technique for measuring the transfer function. It involves the use of the reference clock as a source of wideband excitation, in contrast to the commonly used sinusoidal excitations at discrete frequencies. The data reported here include the intrinsic noise of a PLL for 10 Gb/s links and the jitter transfer function of a PLL for 12.8 Gb/s links. The measured transfer function suggests that the PLL responded like a second order linear system to a low noise reference clock.Keywords: Intrinsic phase noise, jitter in data link, PLL jitter transfer function, high speed clocking in electronic circuit
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1600180 A Power Reduction Technique for Built-In-Self Testing Using Modified Linear Feedback Shift Register
Authors: Mayank Shakya, Soundra Pandian. K. K
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A linear feedback shift register (LFSR) is proposed which targets to reduce the power consumption from within. It reduces the power consumption during testing of a Circuit Under Test (CUT) at two stages. At first stage, Control Logic (CL) makes the clocks of the switching units of the register inactive for a time period when output from them is going to be same as previous one and thus reducing unnecessary switching of the flip-flops. And at second stage, the LFSR reorders the test vectors by interchanging the bit with its next and closest neighbor bit. It keeps fault coverage capacity of the vectors unchanged but reduces the Total Hamming Distance (THD) so that there is reduction in power while shifting operation.Keywords: Linear Feedback Shift Register, Total Hamming Distance, Fault Coverage, Control Logic
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2025179 A Conversation about Inclusive Education: Revelations from Namibian Primary School Teachers
Authors: M. D. Nghiteke, A. Mji, G. T. Molepo
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Inclusive education stems from a philosophy and vision, which argues that all children should learn together at school. It is not only about treating all pupils in the same way. It is also about allowing all children to attend school without any restrictions. Ten primary school teachers in a circuit in Namibia volunteered to participate in face-to-face interviews about inclusive education. The teachers responded to three questions about their (i) understanding of inclusive education; (ii) whether inclusive education was implemented in primary schools; and (iii) whether they were able to work with learners with special needs. Findings indicated that teachers understood what inclusive education entailed; felt that inclusive education was not implemented in their primary schools, and they were unable to work with learners with special needs in their classrooms. Further, the teachers identified training and resources as important components of inclusive education. It is recommended that education authorities should perhaps verify the findings reported here as well as ensure that the concerns raised by the teachers are addressed.
Keywords: Classrooms and schools, inclusive education, resources, training.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1099178 Exploiting Silicon-on-Insulator Microring Resonator Bistability Behavior for All Optical Set-Reset Flip-Flop
Authors: P. Nadimi, D. D. Caviglia, E. Di Zitti
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We propose an all optical flip-flop circuit composedof two Silicon-on-insulator microring resonators coupled to straightwaveguides by exploiting the optical bistability behavior due to thenonlinear Kerr effect. We used the transfer matrix analysis toinvestigate continuous wave propagation through microrings, as wellwe considered the nonlinear switching characteristics of an opticaldevice using a double-coupler silicon ring resonator in presence ofthe Kerr nonlinearity, thus obtaining the bistability behavior of theoutput port, the drop port and also inside the silicon microringresonator. It is shown that the bistability behavior depends on thecontrol of the input wavelength.KeywordsAll optical flip-flops, Kerr effect, microringresonator, optical bistability.
Keywords: All optical flip-flops, Kerr effect, microring resonator, optical bistability.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2142