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Inverter Based Gain-Boosting Fully Differential CMOS Amplifier

Authors: Alpana Agarwal, Akhil Sharma


This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The self-biasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for gain boosting. The Miller compensation is also applied to enhance the phase margin. The circuit has been designed and simulated in 1.8 V 0.18 µm CMOS technology. The simulation results show a high DC gain of 100.7 dB, Unity-Gain Bandwidth of 107.8 MHz, and Phase Margin of 66.7o with a power dissipation of 286 μW and makes it suitable candidate for the high resolution pipelined ADCs.

Keywords: CMOS amplifier, gain boosting, inverter-based amplifier, self-biased inverter.

Digital Object Identifier (DOI):

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[1] P. R. Gray and R. G. Meyer, “MOS operational amplifier design-a tutorial overview” IEEE Journal of Solid-State Circuits, 1982, pp. 969-982.
[2] M. D. Ker and J. S. Chen, “Impact of MOSFET gate-oxide reliability on CMOS operational amplifier in a 130-nm low-voltage process” IEEE Transactions on Device and Materials Reliability, 2008, pp. 394-405.
[3] P. Mandal and V. Visvanathan, “Self-biasing of folded cascode CMOS op-amps”, International Journal of Electronics, 2000, pp. 795-808.
[4] M. Figueiredo et al., “A Two-Stage Fully Differential Inverter-Based Self-Biased CMOS Amplifier with High Efficiency” IEEE Transactions on Circuits and Systems I: Regular Papers, 2011, pp. 1591-1603.
[5] H. Maarefi et al., “A wide swing 1.5 V fully differential op-amp using a rail-to-rail analog CMFB circuit” 45th IEEE Midwest Symposium on Circuits and Systems (MWSCAS-2002), 2002, pp. 8-105.
[6] A. P. Perez et al., “Slew-rate and gain enhancement in two stage operational amplifiers” IEEE International Symposium on Circuits and Systems, 2009, pp. 2485–2488.
[7] R. S. Assaad and J. Silva-Martinez, “The recycling folded cascode: A general enhancement of the folded cascode amplifier,” IEEE Journal of Solid-State Circuits, 2009, pp. 2535–2542.
[8] D. Xu et al., “High DC gain self-cascode structure of OTA design with bandwidth enhancement” Electronics Letters, 2016, pp. 740-742.
[9] M. Bazes, “Two novel fully complementary self-biased CMOS differential amplifiers”, IEEE Journal of Solid-State Circuits, vol. 26, no.2, pp. 165-168, 1991.