{"title":"A Power Reduction Technique for Built-In-Self Testing Using Modified Linear Feedback Shift Register","authors":"Mayank Shakya, Soundra Pandian. K. K","country":null,"institution":"","volume":34,"journal":"International Journal of Electrical and Computer Engineering","pagesStart":1893,"pagesEnd":1897,"ISSN":"1307-6892","URL":"https:\/\/publications.waset.org\/pdf\/6299","abstract":"A linear feedback shift register (LFSR) is proposed which targets to reduce the power consumption from within. It reduces the power consumption during testing of a Circuit Under Test (CUT) at two stages. At first stage,\r\nControl Logic (CL) makes the clocks of the switching units\r\nof the register inactive for a time period when output from\r\nthem is going to be same as previous one and thus reducing\r\nunnecessary switching of the flip-flops. And at second stage,\r\nthe LFSR reorders the test vectors by interchanging the bit\r\nwith its next and closest neighbor bit. It keeps fault coverage\r\ncapacity of the vectors unchanged but reduces the Total Hamming Distance (THD) so that there is reduction in power\r\nwhile shifting operation.","references":null,"publisher":"World Academy of Science, Engineering and Technology","index":"Open Science Index 34, 2009"}