Search results for: Voltage stress frequency

Authors: R. S. Al Abri, M. H. Albadi, M. H. Al Abri, U. K. Al Rasbi, M. H. Al Hasni, S. M. Al Shidi

Abstract:

This paper presents an analysis study on the impacts of the changes of the capacitor banks, the loss of a transformer, and the installation of distributed generation on the voltage total harmonic distortion and harmonic resonance. The study is applied in a real system in Oman, Sohar Industrial Port–C Substation Network. Frequency scan method and Fourier series analysis method are used with the help of EDSA software. Moreover, the results are compared with limits specified by national Oman distribution code.

Keywords: Power quality, capacitor bank, voltage total harmonics distortion, harmonic resonance, frequency scan.

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Authors: Yong Seo Koo, Jong Ho Nam, Yong Nam Choi, Dae Yeol Yoo, Jung Woo Han

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This paper presents a silicon controller rectifier (SCR) based ESD protection circuit for IC. The proposed ESD protection circuit has low trigger voltage and high holding voltage compared with conventional SCR ESD protection circuit. Electrical characteristics of the proposed ESD protection circuit are simulated and analyzed using TCAD simulator. The proposed ESD protection circuit verified effective low voltage ESD characteristics with low trigger voltage and high holding voltage.

Keywords: ESD (Electro-Static Discharge), SCR (Silicon Controlled Rectifier), holding Voltage.

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Authors: Il-Do Jeong, Hang-Geun Jeong

Abstract:

This paper describes the design and fabrication of a clock and data recovery circuit (CDR). We propose a new clock and data recovery which is based on a 1/4-rate frequency detector (QRFD). The proposed frequency detector helps reduce the VCO frequency and is thus advantageous for high speed application. The proposed frequency detector can achieve low jitter operation and extend the pull-in range without using the reference clock. The proposed CDR was implemented using a 1/4-rate bang-bang type phase detector (PD) and a ring voltage controlled oscillator (VCO). The CDR circuit has been fabricated in a standard 0.18 CMOS technology. It occupies an active area of 1 x 1 and consumes 90 mW from a single 1.8V supply.

Keywords: Clock and data recovery, 1/4-rate frequency detector, 1/4-rate phase detector.

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Authors: Rade M. Ciric, Nikola Lj.Rajakovic

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Since the 80s huge efforts have been made to utilize renewable energy sources to generate electric power. This paper reports some aspects of integration of the distributed generators into the low voltage distribution networks. An assessment of impact of the distributed generators on the reliability indices of low voltage network is performed. Results obtained from case study using low voltage network, are presented and discussed.

Keywords: low voltage network, distributed generation, reliability indices

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Authors: Ali Raad Hassan, G. Thanigaiyarasu, V. Ramamurti

Abstract:

Natural frequencies and dynamic response of a spur gear sector are investigated using a two dimensional finite element model that offers significant advantages for dynamic gear analyses. The gear teeth are analyzed for different operating speeds. A primary feature of this modeling is determination of mesh forces using a detailed contact analysis for each time step as the gears roll through the mesh. Transient mode super position method has been used to find horizontal and vertical components of displacement and dynamic stress. The finite element analysis software ANSYS has been used on the proposed model to find the natural frequencies by Block Lanczos technique and displacements and dynamic stresses by transient mode super position method. A comparison of theoretical (natural frequency and static stress) results with the finite element analysis results has also been done. The effect of rotational speed of the gears on the dynamic response of gear tooth has been studied and design limits have been discussed.

Keywords: Natural frequency, Modal and transientanalysis, Spur gear, Dynamic stress.

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Authors: Renkai Wang, Tingcun Wei

Abstract:

In this paper, a digital control algorithm based on delta-operator is presented for high-frequency digitally-controlled DC-DC switching converters. The stability and the controlling accuracy of the DC-DC switching converters are improved by using the digital control algorithm based on delta-operator without increasing the hardware circuit scale. The design method of voltage compensator in delta-domain using PID (Proportion-Integration- Differentiation) control is given in this paper, and the simulation results based on Simulink platform are provided, which have verified the theoretical analysis results very well. It can be concluded that, the presented control algorithm based on delta-operator has better stability and controlling accuracy, and easier hardware implementation than the existed control algorithms based on z-operator, therefore it can be used for the voltage compensator design in high-frequency digitally- controlled DC-DC switching converters.

Keywords: Digitally-controlled DC-DC switching converter, finite word length, control algorithm based on delta-operator, high-frequency, stability.

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Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo

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In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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Authors: M. Fadlallah, G. Ghibaudo, C. G. Theodorou

Abstract:

The dynamic variation in memory devices such as the Static Random Access Memory can give errors in read or write operations. In this paper, the effect of low-frequency and random telegraph noise on the dynamic variation of one SRAM cell is detailed. The effect on circuit noise, speed, and length of time of processing is examined, using the Supply Read Retention Voltage and the Read Static Noise Margin. New test run methods are also developed. The obtained results simulation shows the importance of noise caused by dynamic variation, and the impact of Random Telegraph noise on SRAM variability is examined by evaluating the statistical distributions of Random Telegraph noise amplitude in the pull-up, pull-down. The threshold voltage mismatch between neighboring cell transistors due to intrinsic fluctuations typically contributes to larger reductions in static noise margin. Also the contribution of each of the SRAM transistor to total dynamic variation has been identified.

Keywords: Low-frequency noise, Random Telegraph Noise, Dynamic Variation, SRRV.

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Authors: Sun-Ki Hong, Yong-Ho Cho, Ki-Seok Kim, Tae-Sam Kang

Abstract:

Piezoelectric actuator is treated as RC load when it is modeled electrically. For some piezoelectric actuator applications, arbitrary voltage is required to actuate. Especially for unidirectional arbitrary voltage driving like as sine wave, some special inverter with circuit that can charge and discharge the capacitive energy can be used. In this case, the difference between power supply level and the object voltage level for RC load is varied. Because the control gain is constant, the controlled output is not uniform according to the voltage difference. In this paper, for charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator, the controller gain is controlled according to the voltage difference. With the proposed simple idea, the load voltage can have controlled smoothly although the voltage difference is varied. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: Analog voltage inverter, Capacitive load, Gain control, DC-DC converter, Piezoelectric, Voltage waveform.

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Authors: Wael M. El-Mamlouk, Metwally A. El-Sharkawy, Hossam. E. Mostafa

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In this paper, we analyze and test a scheme for the estimation of electrical fundamental frequency signals from the harmonic load current and voltage signals. The scheme was based on using two different Multi Layer Artificial Neural Networks (ML-ANN) one for the current and the other for the voltage. This study also analyzes and tests the effect of choosing the optimum artificial neural networks- sizes which determine the quality and accuracy of the estimation of electrical fundamental frequency signals. The simulink tool box of the Matlab program for the simulation of the test system and the test of the neural networks has been used.

Keywords: Harmonics, Neural Networks, Modeling, Simulation, Active filters, electric Networks.

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Authors: H. H. Goh, Q. S. Chua, S. W. Lee, B. C. Kok, K. C. Goh, K. T. K. Teo

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At present, the evaluation of voltage stability assessment experiences sizeable anxiety in the safe operation of power systems. This is due to the complications of a strain power system. With the snowballing of power demand by the consumers and also the restricted amount of power sources, therefore, the system has to perform at its maximum proficiency. Consequently, the noteworthy to discover the maximum ability boundary prior to voltage collapse should be undertaken. A preliminary warning can be perceived to evade the interruption of power system’s capacity. The effectiveness of line voltage stability indices (LVSI) is differentiated in this paper. The main purpose of the indices used is to predict the proximity of voltage instability of the electric power system. On the other hand, the indices are also able to decide the weakest load buses which are close to voltage collapse in the power system. The line stability indices are assessed using the IEEE 14 bus test system to validate its practicability. Results demonstrated that the implemented indices are practically relevant in predicting the manifestation of voltage collapse in the system. Therefore, essential actions can be taken to dodge the incident from arising.

Keywords: Critical line, line outage, line voltage stability indices (LVSI), maximum loadability, voltage collapse, voltage instability, voltage stability analysis.

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Authors: Mehrdad Ahmadi Kamarposhti, Mostafa Alinezhad

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One of the major causes of voltage instability is the reactive power limit of the system. Improving the system's reactive power handling capacity via Flexible AC transmission System (FACTS) devices is a remedy for prevention of voltage instability and hence voltage collapse. In this paper, the effects of SVC and STATCOM in Static Voltage Stability Margin Enhancement will be studied. AC and DC representations of SVC and STATCOM are used in the continuation power flow process in static voltage stability study. The IEEE-14 bus system is simulated to test the increasing loadability. It is found that these controllers significantly increase the loadability margin of power systems.

Keywords: SVC, STATCOM, Voltage Collapse, Maximum Loading Point.

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Authors: A. M. Wahab, E. Rustighi

Abstract:

Elastomeric dielectric material has recently become a new alternative for actuator technology. The characteristics of dielectric elastomers placed between two electrodes to withstand large strain when electrodes are charged has attracted the attention of many researcher to study this material for actuator technology. Thus, in the past few years Danfoss Ventures A/S has established their own dielectric electro-active polymer (DEAP), which was called PolyPower. The main objective of this work was to investigate the dynamic characteristics for vibration control of a PolyPower actuator folded in ‘pull’ configuration. A range of experiments was carried out on the folded actuator including passive (without electrical load) and active (with electrical load) testing. For both categories static and dynamic testing have been done to determine the behavior of folded DEAP actuator. Voltage-Strain experiments show that the DEAP folded actuator is a non-linear system. It is also shown that the voltage supplied has no effect on the natural frequency. Finally, varying AC voltage with different amplitude and frequency shows the parameters that influence the performance of DEAP folded actuator. As a result, the actuator performance dominated by the frequency dependence of the elastic response and was less influenced by dielectric properties.

Keywords: Dielectric Electro-active Polymer, Pull Actuator, Static, Dynamic, Electromechanical.

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Authors: D. I. De Souza, D. R. Fonseca, D. Kipper

Abstract:

In this paper, the test purpose will be to assess whether or not the accelerated model proposed by Eyring will be able to translate results for the shape and scale parameters of an underlying Weibull model, obtained under two accelerating using conditions, to expected normal using condition results for these parameters. The product being analyzed is a new type of insulate fluid, and the accelerating factor is the voltage stresses applied to the fluid at two different levels (30KV and 40KV). The normal operating voltage is 25KV. In this case, it was possible to test the insulate fluid at normal voltage using condition. Both results for the two parameters of the Weibull model, obtained under normal using condition and translated from accelerated using conditions to normal conditions, will be compared to each other to assess the accuracy of the Eyring model when the accelerating factor is only the voltage stress.

Keywords: Eyring Accelerated Model, Sequential Life Testing, Two-Parameter Weibull Distribution, Voltage Stresses.

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Authors: Chaiyut Sumpavakup, Thanatchai Kulworawanichpong

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This paper presents the voltage regulation scheme of D-STATCOM under three-phase faults. It consists of the voltage detection and voltage regulation schemes in the 0dq reference. The proposed control strategy uses the proportional controller in which the proportional gain, kp, is appropriately adjusted by using genetic algorithms. To verify its use, a simplified 4-bus test system is situated by assuming a three-phase fault at bus 4. As a result, the DSTATCOM can resume the load voltage to the desired level within 1.8 ms. This confirms that the proposed voltage regulation scheme performs well under three-phase fault events.

Keywords: D-STATCOM, proportional controller, genetic algorithms.

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Authors: Puneet Chawla, Balwinder Singh

Abstract:

Recently, increased attention has been devoted to the voltage instability phenomenon in power systems. Many techniques have been proposed in the literature for evaluating and predicting voltage stability using steady state analysis methods. In this paper P-V and Q-V curves have been generated for a 57 bus Patiala Rajpura circle of India. The power-flow program is developed in MATLAB using Newton Raphson method. Using Q-V curves the weakest bus of the power system and the maximum reactive power change permissible on that bus is calculated. STATCOMs are placed on the weakest bus to improve the voltage and hence voltage stability and also the power transmission capability of the line.

Keywords: Voltage stability, Reactive power, power flow, weakest bus, STATCOM.

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Authors: Ahmad M. Khalil, Ahmad M. Alshamali, Marwan H. Gagaa

Abstract:

We investigated oxidative DNA damage caused by radio frequency radiation using 8-oxo-7, 8-dihydro-2'- deoxyguanosine (8-oxodG) generated in mice tissues after exposure to 900 MHz mobile phone radio frequency in three independent experiments. The RF was generated by a Global System for Mobile Communication (GSM) signal generator. The radio frequency field was adjusted to 25 V/m. The whole body specific absorption rate (SAR) was 1.0 W/kg. Animals were exposed to this field for 30 min daily for 30 days. 24 h post-exposure, blood serum, brain and spleen were removed and DNA was isolated. Enzyme-linked immunosorbent assay (ELISA) was used to measure 8-oxodG concentration. All animals survived the whole experimental period. The body weight of animals did not change significantly at the end of the experiment. No statistically significant differences observed in the levels of oxidative stress. Our results are not in favor of the hypothesis that 900 MHz RF induces oxidative damage.

Keywords: Mice, Mobile phone radiation, oxidative stress, 8-oxo-7, 8-dihydro-2'-deoxyguanosine

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

Keywords: Voltage sense amplifier, voltage transition, node stabilization, and biasing circuits.

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Authors: B. M. Manjunatha, D. V. Ashok Kumar, M. Vijay Kumar

Abstract:

This paper proposes five level diode clamped Z source Inverter. The existing PWM techniques used for ZSI are restricted for two level. The two level Z Source Inverter have high harmonic distortions which effects the performance of the grid connected PV system. To improve the performance of the system the number of voltage levels in the output waveform need to be increased. This paper presents comparative analysis of a five level diode clamped Z source Inverter with different carrier based Modified Pulse Width Modulation techniques. The parameters considered for comparison are output voltage, voltage gain, voltage stress across switch and total harmonic distortion when powered by same DC supply. Analytical results are verified using MATLAB.

Keywords: Diode Clamped, Pulse Width Modulation, total harmonic distortion, Z Source Inverter.

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Authors: Dipankar Nag, Choe Andrew Kunil, Kevin Chai Tshun Chuan, Minkyu Je

Abstract:

This paper presents the design and implementation of a fully integrated Capacitance-to-Voltage Converter (CVC) as the analog front-end for magnetometer interface IC. The application demands very low power solution operating in the frequency of around 20 KHz. The design adapts low power architecture to create low noise electronic interface for Capacitive Micro-machined Lorentz force magnetometer sensor. Using a 0.18-μm CMOS process, simulation results of this interface IC show that the proposed CVC can provide 33 dB closed loop gain, 20 nV/√Hz input referred noise at 20 KHz, while consuming 65 μA current from 1.8-V supply. 

Keywords: Analog front end, Capacitance-to-Voltage Converter, Magnetometer, MEMS, Recycling Folded Cascode.

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Authors: H. Nasiraghdam, A. Jalilian

Abstract:

DSTATCOM is one of the equipments for voltage sag mitigation in power systems. In this paper a new control method for balanced and unbalanced voltage sag mitigation using DSTATCOM is proposed. The control system has two loops in order to regulate compensator current and load voltage. Delayed signal cancellation has been used for sequence separation. The compensator should protect sensitive loads against different types of voltage sag. Performance of the proposed method is investigated under different types of voltage sags for linear and nonlinear loads. Simulation results show appropriate operation of the proposed control system.

Keywords: Custom power, power quality, voltage sagmitigation, current vector control.

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Authors: Osea Zebua, Norikazu Ikoma, Hiroshi Maeda

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Estimation of voltage stability based on optimal filtering method is presented. PV curve is used as a tool for voltage stability analysis. Dynamic voltage stability estimation is done by using particle filter method. Optimum value (nose point) of PV curve can be estimated by estimating parameter of PV curve equation optimal value represents critical voltage and condition at specified point of measurement. Voltage stability is then estimated by analyzing loading margin condition c stimating equation. This maximum loading ecified dynamically.

Keywords: normalized PV curve, optimal filtering method particle filter, voltage stability.

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Authors: Pyone Lai Swe, Wanna Swe, Kyaw Myo Lin

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Voltage stability has become an important issue to many power systems around the world due to the weak systems and long line on power system networks. In this paper, MATLAB load flow program is applied to obtain the weak points in the system combined with finding the voltage stability limit. The maximum permissible loading of a system, within the voltage stability limit, is usually determined. The methods for varying tap ratio (using tap changing transformer) and applying different values of shunt capacitor injection to improve the voltage stability within the limit are also provided.

Keywords: Load flow, Voltage stability, Tap changingtransformer, Shunt capacitor injection, Voltage stability limit

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Authors: N. Mungkung, S. Wongcharoen, C. Sukkongwari, Somchai Arunrungrasmi

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This study examines the design and construction of AC Electronics load surge protection in order to carry electric surge load arisen from faults in low voltage electricity system (single phase/220V) by using the principle of electronics load clamping voltage during induction period so that electric voltage could go through to safe load and continue to work. The qualification of the designed device could prevent both transient over voltage and voltage swell. Both will work in cooperation, resulting in the ability to improve and modify the quality of electrical power in Thailand electricity distribution system more effective than the past and help increase the lifetime of electric appliances, electric devices, and electricity protection equipments.

Keywords: Electronics Load, Transient Over Voltage, Voltage Swell.

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Authors: Yakup Sahin, Naim Suleyman Ting, Ismail Aksoy

Abstract:

A 1 kW power factor correction boost converter with an active snubber cell is presented in this paper. In the converter, the main switch turns on under zero voltage transition (ZVT) and turns off under zero current transition (ZCT) without any additional voltage or current stress. The auxiliary switch turns on and off under zero current switching (ZCS). Besides, the main diode turns on under ZVS and turns off under ZCS. The output current and voltage are controlled by the PFC converter in wide line and load range. The simulation results of converter are obtained for 1 kW and 100 kHz. One of the most important feature of the given converter is that it has direct power transfer as well as excellent soft switching techniques. Also, the converter has 0.99 power factor with the sinusoidal input current shape.

Keywords: Power factor correction, direct power transfer, zero-voltage transition, zero-current transition, soft switching.

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Authors: SreehariRao Patri, K. S. R. KrishnaPrasad

Abstract:

An on chip low drop out voltage regulator that employs elegant compensation scheme is presented in this paper. The novelty in this design is that the device parasitic capacitances are exploited for compensation at different loads. The proposed LDO is designed to provide a constant voltage of 1.2V and is implemented in UMC 180 nano meter CMOS technology. The voltage regulator presented improves stability even at lighter loads and enhances line and load regulation.

Keywords: Analog, LDO, SOC.

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.

Keywords: Voltage sense amplifier, multi-inputs, voltage transition, node stabilization, and biasing circuits.

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Authors: Shao-Ku Kao

Abstract:

This paper presents an active rectifier with time-domain delay compensation to enhance the efficiency. A delay calibration circuit is designed to convert delay time to voltage and adaptive control on/off delay in variable input voltage. This circuit is designed in 0.18 mm CMOS process. The input voltage range is from 2 V to 3.6 V with the output voltage from 1.8 V to 3.4 V. The efficiency can maintain more than 85% when the load from 50 Ω ~ 1500 Ω for 3.6 V input voltage. The maximum efficiency is 92.4 % at output power to be 38.6 mW for 3.6 V input voltage.

Keywords: Wireless power transfer, active diode, delay compensation, time to voltage converter, PCE.

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Authors: Kittaya Somsai, Thanatchai Kulworawanichpong, Nitus Voraphonpiput

Abstract:

This paper presents the DC voltage control design of D-STATCOM when the D-STATCOM is used for load voltage regulation. Although, the DC voltage can be controlled by active current of the D-STATCOM, reactive current still affects the DC voltage. To eliminate this effect, the control strategy with elimination effect of the reactive current is proposed and the results of the control with and without the elimination the effect of the reactive current are compared. For obtaining the proportional and integral gains of the PI controllers, the symmetrical optimum and genetic algorithms methods are applied. The stability margin of these methods are obtained and discussed in detail. In addition, the performance of the DC voltage control based on symmetrical optimum and genetic algorithms methods are compared. Effectiveness of the controllers designed was verified through computer simulation performed by using Power System Tool Block (PSB) in SIMULINK/MATLAB. The simulation results demonstrated that the DC voltage control proposed is effective in regulating DC voltage when the DSTATCOM is used for load voltage regulation.

Keywords: D-STATCOM, DC voltage control, Symmetrical optimum, Genetic algorithms

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Authors: Ahmed Helal, Sherif Zain Elabideen, Ahmed Lotfy

Abstract:

In this paper the modeling and analysis of Space Vector Pulse Width Modulation (SVPWM) based Dynamic Voltage Restorer (DVR) using PSCAD/EMTDC software will be presented in details. The simulation includes full modeling of the SVPWM technique used to control the DVR inverter. A test power system composed of three phase voltage source, sag generator, DVR and three phase resistive load is used to demonstrate restoration capability of the DVR. The simulation results of the presented DVR proved excellent voltage sag mitigation to protect sensitive loads.

Keywords: Dynamic voltage restorer, power quality, simulationand modeling, voltage sag.

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