Search results for: Power semiconductor device

Authors: Lv Shizeng, Han Xiao, Zhang Yi, Ding Wenjing

Abstract:

The lunar sample storage device is mainly used for the preparation of the lunar samples, observation, physical analysis and other work. The lunar samples and operating equipment are placed directly inside the storage device. The inside of the storage device is a high purity nitrogen environment to ensure that the sample is not contaminated by the Earth's environment. In order to ensure that the water and oxygen indicators in the storage device meet the sample requirements, a dynamic gas cycle is required between the storage device and the external purification equipment. However, the internal gas disturbance in the storage device can affect the operation of the sample. In this paper, the storage device model is established, and the tetrahedral mesh is established by Tetra/Mixed method. The influence of different inlet position and gas flow on the internal flow field disturbance is calculated, and the disturbed flow area should be avoided during the sampling operation.

Keywords: Lunar samples, gas disturbance, storage device, characteristic analysis.

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Authors: Ly. Benbahouche

Abstract:

Currently, several soft switching topologies have been studied to achieve high power switching efficiency, reduced cost, improved reliability and reduced parasites. It is well known that improvement in power electronics systems always depend on advanced in power devices. The IGBT has been successfully used in a variety of switching applications such as motor drives and appliance control because of its superior characteristics.

The aim of this paper is focuses on simulation and explication of the internal dynamics of IGBTs behaviour under the most popular soft switching schemas that is Zero Current Switching (ZCS) environments.

The main purpose of this paper is to point out some mechanisms relating to current tail during the turn-off and examination of the response at turn-off with variation of temperature, inductance L, snubber capacitors Cs, and bus voltage in order to achieve an improved understanding of internal carrier dynamics. It is shown that the snubber capacitor, the inductance and even the temperature controls the magnitude and extent of the tail current, hence the turn-off time (switching speed of the device).

Moreover, it has also been demonstrated that the ZCS switching can be utilized efficiently to improve and reduce the power losses as well as the turn-off time. Furthermore, the turn-off loss in ZCS was found to depend on the time of switching of the device.

Keywords: PT-IGBT, ZCS, turn-off losses, dV/dt.

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Authors: Muhibul Haque Bhuyan

Abstract:

Spintronic, also termed spin electronics or spin transport electronics, is a kind of new technology, which exploits the two fundamental degrees of freedom- spin-state and charge-state of electrons to enhance the operational speed for the data storage and transfer efficiency of the device. Thus, it seems an encouraging technology to combat most of the prevailing complications in orthodox electron-based devices. This novel technology possesses the capacity to mix the semiconductor microelectronics and magnetic devices’ functionalities into one integrated circuit. Traditional semiconductor microelectronic devices use only the electronic charge to process the information based on binary numbers, 0 and 1. Due to the incessant shrinking of the transistor size, we are reaching the final limit of 1 nm or so. At this stage, the fabrication and other device operational processes will become challenging as the quantum effect comes into play. In this situation, we should find an alternative future technology, and spintronic may be such technology to transfer and store information. This review article provides a detailed discussion of the spintronic technology: fundamentals, materials, devices, circuits, challenges, and current research trends. At first, the fundamentals of spintronics technology are discussed. Then types, properties, and other issues of the spintronic materials are presented. After that, fabrication and working principles, as well as application areas and advantages/disadvantages of spintronic devices and circuits, are explained. Finally, the current challenges, current research areas, and prospects of spintronic technology are highlighted. This is a new paradigm of electronic cum magnetic devices built on the charge and spin of the electrons. Modern engineering and technological advances in search of new materials for this technology give us hope that this would be a very optimistic technology in the upcoming days.

Keywords: Spintronic technology, spin, charge, magnetic devices, spintronic devices, spintronic materials.

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Authors: Yakup Sahin, Naim Suleyman Ting, Ismail Aksoy

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In this paper, a single phase soft switched Zero Voltage Transition and Zero Current Transition (ZVT-ZCT) Power Factor Correction (PFC) boost converter is proposed. In the proposed PFC converter, the main switch turns on with ZVT and turns off with ZCT without any additional voltage or current stresses. Auxiliary switch turns on and off with zero current switching (ZCS). Also, the main diode turns on with zero voltage switching (ZVS) and turns off with ZCS. The proposed converter has features like low cost, simple control and structure. The output current and voltage are controlled by the proposed PFC converter in wide line and load range. The theoretical analysis of converter is clarified and the operating steps are given in detail. The simulation results of converter are obtained for 500 W and 100 kHz. It is observed that the semiconductor devices operate with soft switching (SS) perfectly. So, the switching power losses are minimum. Also, the proposed converter has 0.99 power factor with sinusoidal current shape.

Keywords: Power factor correction, zero-voltage transition, zero-current transition, soft switching.

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Authors: Seung Hwan Park, Cheng-Sool Park, Jun Seok Kim, Youngji Yoo, Daewoong An, Jun-Geol Baek

Abstract:

Depending on the big data analysis becomes important, yield prediction using data from the semiconductor process is essential. In general, yield prediction and analysis of the causes of the failure are closely related. The purpose of this study is to analyze pattern affects the final test results using a die map based clustering. Many researches have been conducted using die data from the semiconductor test process. However, analysis has limitation as the test data is less directly related to the final test results. Therefore, this study proposes a framework for analysis through clustering using more detailed data than existing die data. This study consists of three phases. In the first phase, die map is created through fail bit data in each sub-area of die. In the second phase, clustering using map data is performed. And the third stage is to find patterns that affect final test result. Finally, the proposed three steps are applied to actual industrial data and experimental results showed the potential field application.

Keywords: Die-Map Clustering, Feature Extraction, Pattern Recognition, Semiconductor Manufacturing Process.

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Authors: Jae-Chang Kwak, Yong-Seo Koo

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The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PFM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS (DT-CMOS) with low on-resistance is designed to decrease conduction loss. The threshold voltage of DT-CMOS drops as the gate voltage increase, resulting in a much higher current handling capability than standard MOSFET. PFM control circuits consist of a generator, AND gate and comparator. The generator is made to have 1.2MHz oscillation voltage. The DC-DC converter based on PFM control circuit and low on-resistance switching device is presented in this paper.

Keywords: DT-CMOS, PMIC, PFM, DC-DC converter.

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Authors: Amir A. N, Fadzilan A. M, Baskaran G.

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In this paper, we proposed an invention of an accessory into a communication device that will help humans to be connected universally. Generally, this device will be made up of crystal and will combine many technologies that will enable the user to run various applications and software anywhere and everywhere. Bringing up the concept of from being user friendly, we had used the crystal as the main material of the device that will trap the surrounding lights to produce projection of its screen. This leads to a lesser energy consumption and allows smaller sized battery to be used, making the device less bulky. Additionally, we proposed the usage of micro batteries as our energy source. Thus, researches regarding crystal were made along with explanations in details of specification and function of the technology used in the device. Finally, we had also drawn several views of the invention from different sides to be visualized.

Keywords: Crystal, Communication Technology, Future concept device, Micro batteries.

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Authors: Terrance Charles, Zhiyin Yang, Yiling Lu

Abstract:

Heavy trucks are aerodynamically inefficient due to their un-streamlined body shapes, leading to more than of 60% engine power being required to overcome the aerodynamics drag at 60 m/hr. There are many aerodynamics drag reduction devices developed and this paper presents a study on a drag reduction device called Cross Vortex Trap Device (CVTD) deployed in the gap between the tractor and the trailer of a simplified tractor-trailer model. Numerical simulations have been carried out at Reynolds number 0.51×10⁶ based on inlet flow velocity and height of the trailer using the Reynolds-Averaged Navier-Stokes (RANS) approach. Three different configurations of CVTD have been studied, ranging from single to three slabs, equally spaced on the front face of the trailer. Flow field around three different configurations of trap device have been analysed and presented. The results show that a maximum of 12.25% drag reduction can be achieved when a triple vortex trap device is used. Detailed flow field analysis along with pressure contours are presented to elucidate the drag reduction mechanisms of CVTD and why the triple vortex trap configuration produces the maximum drag reduction among the three configurations tested.

Keywords: Aerodynamic drag, cross vortex trap device, truck, RANS.

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Authors: V. Eramo, E. Miucci, A. Cianfrani, A. Germoni, M. Listanti

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The power consumption of an Optical Packet Switch equipped with SOA technology based Spanke switching fabric is evaluated. Sophisticated analytical models are introduced to evaluate the power consumption versus the offered traffic, the main switch parameters, and the used device characteristics. The impact of Amplifier Spontaneous Emission (ASE) noise generated by a transmission system on the power consumption is investigated. As a matter of example for 32×32 switches supporting 64 wavelengths and offered traffic equal to 0,8, the average energy consumption per bit is 5, 07 · 10-2 nJ/bit and increases if ASE noise introduced by the transmission systems is increased.

Keywords: Spanke, Amplifier Spontaneous Emission Noise, Power Consumption, Optical Packet Switch.

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Authors: Hung-Pei Hsu, Jyi-Tsong Lin, Po-Hsieh Lin, Cheng-Hsien Chang, Ming-Tsung Shih, Chan-Hsiang Chang, Shih-Chuan Tseng, Min-Yan Lin, Shih-Wen Hsu

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In this paper, we propose a novel metal oxide semiconductor field effect transistor with L-shaped channel structure (LMOS), and several type of L-shaped structures are also designed, studied and compared with the conventional MOSFET device for the same average gate length (Lavg). The proposed device electrical characteristics are analyzed and evaluated by three dimension (3-D) ISE-TCAD simulator. It can be confirmed that the LMOS devices have higher on-state drain current and both lower drain-induced barrier lowering (DIBL) and subthreshold swing (S.S.) than its conventional counterpart has. In addition, the transconductance and voltage gain properties of the LMOS are also improved.

Keywords: Average gate length (Lavg), drain-induced barrier lowering (DIBL), L-shaped channel MOSFET (LMOS), subthreshold swing (S.S.).

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Authors: Reza Sedaghati

Abstract:

The use of Flexible AC Transmission System (FACTS) devices in a power system can potentially overcome limitations of the present mechanically controlled transmission system. Also, the advance of technology makes possible to include new energy storage devices in the electrical power system. The integration of Superconducting Magnetic Energy Storage (SMES) into Static Synchronous Compensator (STATCOM) can lead to increase their flexibility in improvement of power system dynamic behaviour by exchanging both active and reactive powers with power grids. This paper describes structure and behaviour of SMES, specifications and performance principles of the STATCOM/SMES compensator. Moreover, the benefits and effectiveness of integrated SMES with STATCOM in power systems is presented. Also, the performance of the STATCOM/SMES compensator is evaluated using an IEEE 3-bus system through the dynamic simulation by PSCAD/EMTDC software.

Keywords: STATCOM/SMES compensator, chopper, converter, energy storage system, power systems.

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Authors: Tsuyoshi Yamazaki, Etsuo Morishita

Abstract:

Cyclists often run through a crosswind and sometimes we experience the adverse pressure. We came to an idea that Wells turbine can be used as power augmentation device in the crosswind something like sails of a yacht. Wells turbine always rotates in the same direction irrespective of the incoming flow direction, and we use it in the small-scale power generation in the ocean where waves create an oscillating flow. We incorporate the turbine to the wheel of a bike. A commercial device integrates strain gauges in the crank of a bike and transmitted force and torque applied to the pedal of the bike as an e-mail to the driver’s mobile phone. We can analyze the unsteady data in a spreadsheet sent from the crank sensor. We run the bike with the crank sensor on the rollers at the exit of a low-speed wind tunnel and analyze the effect of the crosswind to the wheel with a Wells turbine. We also test the aerodynamic characteristics of the turbine separately. Although power gain depends on the flow direction, several Watts increase might be possible by the Wells turbine incorporated to a bike wheel.

Keywords: Aerodynamics, wells turbine, bicycle, wind engineering.

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Authors: A. Mathieu, B. Aubry, E. Chhim, M. Jobe, M. Arnaud

Abstract:

Present project consists in a study and a development of piezoelectric devices for supplying power to new generation pacemakers. They are miniaturized leadless implants without battery placed directly in right ventricle. Amongst different acceptable energy sources in cardiac environment, we choose the solution of a device based on conversion of the energy produced by pressure variation inside the heart into electrical energy. The proposed energy harvesters can meet the power requirements of pacemakers, and can be a good solution to solve the problem of regular surgical operation. With further development, proposed device should provide enough energy to allow pacemakers autonomy, and could be good candidate for next pacemaker generation.

Keywords: Energy harvester, heart, leadless pacemaker, piezoelectric cells, pressure variation.

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Authors: S.A.M. Isa, M.S.M. Rahim, M.D. Kasmuni, D. Daman

Abstract:

Recently, there are significant improvements in the capabilities of mobile devices; rendering large terrain is tedious because of the constraint in resources of mobile devices. This paper focuses on the implementation of terrain rendering on mobile device to observe some issues and current constraints occurred. Experiments are performed using two datasets with results based on rendering speed and appearance to ascertain both the issues and constraints. The result shows a downfall of frame rate performance because of the increase of triangles. Since the resolution between computer and mobile device is different, the terrain surface on mobile device looks more unrealistic compared to on a computer. Thus, more attention in the development of terrain rendering on mobile devices is required. The problems highlighted in this paper will be the focus of future research and will be a great importance for 3D visualization on mobile device.

Keywords: Mobile Device, Mobile Rendering, OpenGL ES, Terrain Rendering.

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Authors: C. M. M. Paschoal, D. do N. Souza, L. A. P. Santos

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In this study three commercial semiconductor devices were characterized in the laboratory for computed tomography dosimetry: one photodiode and two phototransistors. It was evaluated four responses to the irradiation: dose linearity, energy dependence, angular dependence and loss of sensitivity after X ray exposure. The results showed that the three devices have proportional response with the air kerma; the energy dependence displayed for each device suggests that some calibration factors would be applied for each one; the angular dependence showed a similar pattern among the three electronic components. In respect to the fourth parameter analyzed, one phototransistor has the highest sensitivity however it also showed the greatest loss of sensitivity with the accumulated dose. The photodiode was the device with the smaller sensitivity to radiation, on the other hand, the loss of sensitivity after irradiation is negligible. Since high accuracy is a desired feature for a dosimeter, the photodiode can be the most suitable of the three devices for dosimetry in tomography. The phototransistors can also be used for CT dosimetry, however it would be necessary a correction factor due to loss of sensitivity with accumulated dose.

Keywords: Dosimetry, computed tomography, phototransistor, photodiode

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Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

Abstract:

A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.

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Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

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The distribution of a single global clock across a chip has become the major design bottleneck for high performance VLSI systems owing to the power dissipation, process variability and multicycle cross-chip signaling. A Network-on-Chip (NoC) architecture partitioned into several synchronous blocks has become a promising approach for attaining fine-grain power management at the system level. In a NoC architecture the communication between the blocks is handled asynchronously. To interface these blocks on a chip operating at different frequencies, an asynchronous FIFO interface is inevitable. However, these asynchronous FIFOs are not required if adjacent blocks belong to the same clock domain. In this paper, we have designed and analyzed a 16-bit asynchronous micropipelined FIFO of depth four, with the awareness of place and route on an FPGA device. We have used a commercially available Spartan 3 device and designed a high speed implementation of the asynchronous 4-phase micropipeline. The asynchronous FIFO implemented on the FPGA device shows 76 Mb/s throughput and a handshake cycle of 109 ns for write and 101.3 ns for read at the simulation under the worst case operating conditions (voltage = 0.95V) on a working chip at the room temperature.

Keywords: Asynchronous, FIFO, FPGA, GALS, Network-on- Chip (NoC), VHDL.

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Authors: Yu-Wei Chang, Chiao-Hung Cheng, Wen-Fang Wu, Sih-Li Chen

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This article experimentally investigates the thermal performance of thermoelectric air-cooling module which comprises a thermoelectric cooler (TEC) and an air-cooling heat sink. The influences of input current and heat load are determined. And performances under each situation are quantified by thermal resistance analysis. Since TEC generates Joule heat, this nature makes construction of thermal resistance network difficult. To simplify the analysis, this article emphasizes on the resistance heat load might meet when passing through the device. Therefore, the thermal resistances in this paper are to divide temperature differences by heat load. According to the result, there exists an optimum input current under every heating power. In this case, the optimum input current is around 6A or 7A. The performance of the heat sink would be improved with TEC under certain heating power and input current, especially at a low heat load. According to the result, the device can even make the heat source cooler than the ambient. However, TEC is not always effective at every heat load and input current. In some situation, the device works worse than the heat sink without TEC. To determine the availability of TEC, this study figures out the effective operating region in which the TEC air-cooling module works better than the heat sink without TEC. The result shows that TEC is more effective at a lower heat load. If heat load is too high, heat sink with TEC will perform worse than without TEC. The limit of this device is 57W. Besides, TEC is not helpful if input current is too high or too low. There is an effective range of input current, and the range becomes narrower when the heat load grows.

Keywords: Thermoelectric cooler, TEC, electronic cooling, heat sink.

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Authors: Mohammad Reza Zamani Kouhpanji

Abstract:

This paper presents a MEMS/NEMS device for fatigue and fracture characterization of nanomaterials. This device can apply static loads, cyclic loads, and their combinations in nanomechanical experiments. It is based on the electromagnetic force induced between paired parallel wires carrying electrical currents. Using this concept, the actuator and sensor parts of the device were designed and analyzed while considering the practical limitations. Since the PWCC device only uses two wires for actuation part and sensing part, its fabrication process is extremely easier than the available MEMS/NEMS devices. The total gain and phase shift of the MEMS/NEMS device were calculated and investigated. Furthermore, the maximum gain and sensitivity of the MEMS/NEMS device were studied to demonstrate the capability and usability of the device for wide range of nanomaterials samples. This device can be readily integrated into SEM/TEM instruments to provide real time study of the mechanical behaviors of nanomaterials as well as their fatigue and fracture properties, softening or hardening behaviors, and initiation and propagation of nanocracks.

Keywords: Sensors and actuators, MEMS/NEMS devices, fatigue and fracture nanomechanical testing device, static and cyclic nanomechanical testing device.

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Authors: Morteza Amirabadi, Vahid Fayaz , Fereshteh Felegary, Hossien Hossienkhani

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The most suitable Semiconductor detector, Cadmium Zinc Teloraid , has unique properties because of high Atomic number and wide Brand Gap . It has been tried in this project with different processes such as Lead , Diffusion , Produce and Recombination , effect of Trapping and injection carrier of CdZnTe , to get hole and then present a complete answer of it . Then we should investigate the movement of carrier ( Electron – Hole ) by using above answer.

Keywords: Semiconcuctor detector, Trapping, Recommbination, Diffusion

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Authors: V. Weinzettl, M. Imrisek, J. Havlicek, J. Mlynar, D. Naydenkova, P. Hacek, M. Hron, F. Janky, D. Sarychev, M. Berta, A. Bencze, T. Szabolics

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Semiconductor detector arrays are widely used in high-temperature plasma diagnostics. They have a fast response, which allows observation of many processes and instabilities in tokamaks. In this paper, there are reviewed several diagnostics based on semiconductor arrays as cameras, AXUV photodiodes (referred often as fast “bolometers") and detectors of both soft X-rays and visible light installed on the COMPASS tokamak recently. Fresh results from both spring and summer campaigns in 2012 are introduced. Examples of the utilization of the detectors are shown on the plasma shape determination, fast calculation of the radiation center, two-dimensional plasma radiation tomography in different spectral ranges, observation of impurity inflow, and also on investigation of MHD activity in the COMPASS tokamak discharges.

Keywords: Bolometry, plasma diagnostics, soft X-rays, tokamak.

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Authors: Reza Sedaghati, Mojtaba Hakimzadeh, Abdolmohamad Davodi, Navid Javidtash

Abstract:

The advent of Flexible AC Transmission Systems (FACTS) is giving rise to a new family of power electronic equipment emerging for controlling and optimizing the performance of power system, e.g. STATCOM. Static synchronous Compensator (STATCOM) is a commonly used FACTS device and has been successfully applied in power systems. In this sense, superconducting magnetic energy storage (SMES) in integration with a static synchronous compensator (STATCOM) is capable of supplying power systems with both active and reactive powers simultaneously and very rapidly, and thus is able to enhance the security dramatically. In this paper the structure and characteristics of the STATCOM/SMES is proposed. In addition, using a proper control scheme, STATCOM/ SMES is tested on an IEEE 3-bus system and more effective performance of the presented STATCOM/SMES compensator is evaluated with alone STATCOM through the dynamic simulation by using PSCAD/EMTDC software.

Keywords: STATCOM/SMES, Oscillation Damping, Control, Power System.

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Authors: Kadam Bhambri, Neena Gupta

Abstract:

All optical wavelength conversion is essential in present day optical networks for transparent interoperability, contention resolution, and wavelength routing. The incorporation of all optical wavelength convertors leads to better utilization of the network resources and hence improves the efficiency of optical networks. Wavelength convertors that can work with Dispersion Managed (DM) solitons are attractive due to their superior transmission capabilities. In this paper, wavelength conversion for dispersion managed soliton signals was demonstrated at 100 Gbps through semiconductor optical amplifier and an optical filter. The wavelength conversion was achieved for a 1550 nm input signal to1555nm output signal. The output signal was measured in terms of BER, Q factor and system margin.    

Keywords: All optical wavelength conversion, dispersion managed solitons, semiconductor optical amplifier, cross gain modulation.

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Authors: J. Rizk, Y. Chaiko

Abstract:

This paper shows the potential system benefits of simple tracking solar system using a stepper motor and light sensor. This method is increasing power collection efficiency by developing a device that tracks the sun to keep the panel at a right angle to its rays. A solar tracking system is designed, implemented and experimentally tested. The design details and the experimental results are shown.

Keywords: Renewable Energy, Power Optimization.

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Authors: P.Ramanathan, P.T.Vanathi

Abstract:

Parallel Prefix addition is a technique for improving the speed of binary addition. Due to continuing integrating intensity and the growing needs of portable devices, low-power and highperformance designs are of prime importance. The classical parallel prefix adder structures presented in the literature over the years optimize for logic depth, area, fan-out and interconnect count of logic circuits. In this paper, a new architecture for performing 8-bit, 16-bit and 32-bit Parallel Prefix addition is proposed. The proposed prefix adder structures is compared with several classical adders of same bit width in terms of power, delay and number of computational nodes. The results reveal that the proposed structures have the least power delay product when compared with its peer existing Prefix adder structures. Tanner EDA tool was used for simulating the adder designs in the TSMC 180 nm and TSMC 130 nm technologies.

Keywords: Parallel Prefix Adder (PPA), Dot operator, Semi-Dotoperator, Complementary Metal Oxide Semiconductor (CMOS), Odd-dot operator, Even-dot operator, Odd-semi-dot operator andEven-semi-dot operator.

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Authors: A. Bumbová, J. Kellner, Z. Večeřa, V. Kahle, J. Navrátil

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The construction of original functional sample of the portable device for fast analysis of energetic materials has been described in the paper. The portable device consisting of two parts – an original miniaturized microcolumn liquid chromatograph and a unique chemiluminescence detector – has been proposed and realized. In a very short time, this portable device is capable of identifying selectively most of military nitramine- and nitroesterbased explosives as well as inorganic nitrates occurring in trace concentrations in water or in soil. The total time required for the identification of extracts is shorter than 8 minutes.

Keywords: Chemiluminescence, microcolumn liquid chromatograph, nitramines, nitroesters, portable device.

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Authors: Yongsun Kim, Hoyong Kang

Abstract:

This paper proposes a power-controlled scheduling scheme for devices using a directional antenna in smart home. In the case of the home network using directional antenna, devices can concurrently transmit data in the same frequency band. Accordingly, the throughput increases compared to that of devices using omni-directional antenna in proportional to the number of concurrent transmissions. Also, the number of concurrent transmissions depends on the beamwidth of antenna, the number of devices operating in the network , transmission power, interference and so on. In particular, the less transmission power is used, the more concurrent transmissions occur due to small transmission range. In this paper, we considered sub-optimal scheduling scheme for throughput maximization and power consumption minimization. In the scheme, each device is equipped with a directional antenna. Various beamwidths, path loss components, and antenna radiation efficiencies are considered. Numerical results show that the proposed schemes outperform the scheduling scheme using directional antennas without power control.

Keywords: Mmwave WPANs, directional scheduling, power-controlled scheduling scheme, smart home.

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Authors: B. Arzhanov, A. Correia, P. Delgado, J. Meireles

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Due to the higher power loss levels in electronic components, the thermal design of PCBs (Printed Circuit Boards) of an assembled device becomes one of the most important quality factors in electronics. Nonetheless, some of leading causes of the microelectronic component failures are due to higher temperatures, the leakages or thermal-mechanical stress, which is a concern, is the reliability of microelectronic packages. This article presents an experimental approach to measure the junction temperature of exposed pad packages. The implemented solution is in a prototype phase, using a temperature-sensitive parameter (TSP) to measure temperature directly on the die, validating the numeric results provided by the Mechanical APDL (Ansys Parametric Design Language) under same conditions. The physical device-under-test is composed by a Thermal Test Chip (TTC-1002) and assembly in a QFN cavity, soldered to a test-board according to JEDEC Standards. Monitoring the voltage drop across a forward-biased diode, is an indirectly method but accurate to obtain the junction temperature of QFN component with an applied power range between 0,3W to 1.5W. The temperature distributions on the PCB test-board and QFN cavity surface were monitored by an infra-red thermal camera (Goby-384) controlled and images processed by the Xeneth software. The article provides a set-up to monitorize in real-time the junction temperature of ICs, namely devices with the exposed pad package (i.e. QFN). Presenting the PCB layout parameters that the designer should use to improve thermal performance, and evaluate the impact of voids in solder interface in the device junction temperature.

Keywords: Quad Flat No-Lead packages, exposed pads, junction temperature, thermal management, measurements.

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Authors: P. Valsalal, S. Thangalakshmi

Abstract:

There is a widespread changeover in the electrical power industry universally from old-style monopolistic outline towards a horizontally distributed competitive structure to come across the demand of rising consumption. When the transmission lines of derestricted system are incapable to oblige the entire service needs, the lines are overloaded or congested. The governor between customer and power producer is nominated as Independent System Operator (ISO) to lessen the congestion without obstructing transmission line restrictions. Among the existing approaches for congestion management, the frequently used approaches are reorganizing the generation and load curbing. There is a boundary for reorganizing the generators, and further loads may not be supplemented with the prevailing resources unless more private power producers are added in the system by considerably raising the cost. Hence, congestion is relaxed by appropriate Flexible AC Transmission Systems (FACTS) devices which boost the existing transfer capacity of transmission lines. The FACTs device, namely, Unified Power Flow Controller (UPFC) is preferred, and the correct placement of UPFC is more vital and should be positioned in the highly congested line. Hence, the weak line is identified by using power flow performance index with the new objective function with proposed hybrid Fish – Bee algorithm. Further, the location of UPFC at appropriate line reduces the branch loading and minimizes the voltage deviation. The power transfer capacity of lines is determined with and without UPFC in the identified congested line of IEEE 30 bus structure and the simulated results are compared with prevailing algorithms. It is observed that the transfer capacity of existing line is increased with the presented algorithm and thus alleviating the congestion.

Keywords: Available line transfer capability, congestion management, FACTS device, hybrid fish-bee algorithm, ISO, UPFC.

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Authors: Matthias Kirmse, Uwe Petersohn, Elief Paffrath

Abstract:

As in today's semiconductor industries test costs can make up to 50 percent of the total production costs, an efficient test error detection becomes more and more important. In this paper, we present a new machine learning approach to test error detection that should provide a faster recognition of test system faults as well as an improved test error recall. The key idea is to learn a classifier ensemble, detecting typical test error patterns in wafer test results immediately after finishing these tests. Since test error detection has not yet been discussed in the machine learning community, we define central problem-relevant terms and provide an analysis of important domain properties. Finally, we present comparative studies reflecting the failure detection performance of three individual classifiers and three ensemble methods based upon them. As base classifiers we chose a decision tree learner, a support vector machine and a Bayesian network, while the compared ensemble methods were simple and weighted majority vote as well as stacking. For the evaluation, we used cross validation and a specially designed practical simulation. By implementing our approach in a semiconductor test department for the observation of two products, we proofed its practical applicability.

Keywords: Ensemble methods, fault detection, machine learning, semiconductor test.

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