Search results for: Field Programmable gate array (FPGA)

Authors: N. Ojaroudi Parchin, H. Jahanbakhsh Basherlou, Y. Al-Yasir, A. M. Abdulkhaleq, R. A. Abd-Alhameed, P. S. Excell

Abstract:

A compact design of multi-sector patch antenna array for 60 GHz applications is presented and discussed in details. The proposed design combines five 1x8 linear patch antenna arrays, referred to as sectors, in a multi-sector configuration. The coaxial-fed radiation elements of the multi-sector array are designed on 0.2 mm Rogers RT5880 dielectrics. The array operates in the frequency range of 58-62 GHz and provides switchable directional/omnidirectional radiation beams with high gain and high directivity characteristics. The designed multi-sector array exhibits good performances and could be used in the fifth generation (5G) cellular networks.

Keywords: MM-wave communications, multi-sector array, patch antenna, small cell networks.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 909

Authors: Muhammad I. Ibrahimy, Mamun B.I. Reaz, Khandaker Asaduzzaman, Sazzad Hussain

Abstract:

An approach to develop the FPGA of a flexible key RSA encryption engine that can be used as a standard device in the secured communication system is presented. The VHDL modeling of this RSA encryption engine has the unique characteristics of supporting multiple key sizes, thus can easily be fit into the systems that require different levels of security. A simple nested loop addition and subtraction have been used in order to implement the RSA operation. This has made the processing time faster and used comparatively smaller amount of space in the FPGA. The hardware design is targeted on Altera STRATIX II device and determined that the flexible key RSA encryption engine can be best suited in the device named EP2S30F484C3. The RSA encryption implementation has made use of 13,779 units of logic elements and achieved a clock frequency of 17.77MHz. It has been verified that this RSA encryption engine can perform 32-bit, 256-bit and 1024-bit encryption operation in less than 41.585us, 531.515us and 790.61us respectively.

Keywords: RSA, FPGA, Communication, Security, VHDL.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1406

Authors: G. Viswanadh Raviteja

Abstract:

In this paper, a microstrip antenna array is designed for 5G applications. A corporate series feed is considered to operate with a center frequency between 27 to 28 GHz to be able to cover the 5G frequency bands 24.25-27.5 GHz, 26.5-29.5 GHz and 27.5-28.35 GHz. The substrate is taken to be Rogers RT/Duroid 6002. The corporate series 5G antenna array is designed stage by stage by taking into consideration a conventional antenna designed at 28 GHz, thereby constructing the 2X1 antenna array before arriving at the final design structure of 4-element corporate series feed antenna array. The discussions concerning S11 parameter, gain and voltage standing wave ratio (VSWR) for the design structures are considered and all the important findings are tabulated. The proposed antenna array’s S11 parameter was found to be -29.00 dB at a frequency of 27.39 GHz with a good directional gain of 12.12 dB.

Keywords: Corporate series feed, millimeter wave antenna array, 5G applications, millimeter-wave (mm-wave) applications

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 595

Authors: Rajesh Bera, Durbadal Mandal, Rajib Kar, Sakti P. Ghoshal

Abstract:

This paper describes optimal thinning of an Elliptical  Cylindrical Array (ECA) of uniformly excited isotropic antennas  which can generate directive beam with minimum relative Side Lobe  Level (SLL). The Particle Swarm Optimization (PSO) method, which  represents a new approach for optimization problems in  electromagnetic, is used in the optimization process. The PSO is used  to determine the optimal set of ‘ON-OFF’ elements that provides a  radiation pattern with maximum SLL reduction. Optimization is done  without prefixing the value of First Null Beam Width (FNBW). The  variation of SLL with element spacing of thinned array is also  reported. Simulation results show that the number of array elements  can be reduced by more than 50% of the total number of elements in  the array with a simultaneous reduction in SLL to less than -27dB.

 

Keywords: Thinned array, Particle Swarm Optimization, Elliptical Cylindrical Array, Side Lobe Label.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2622

Authors: Shobha Sharma, Amita Dev

Abstract:

Data driven dynamic logic is the high speed dynamic circuit with low area. The clock of the dynamic circuit is removed and data drives the circuit instead of clock for precharging purpose. This data driven dynamic nand gate is given static forward substrate biasing of Vsupply/2 as well as the substrate bias is connected to the input data, resulting in dynamic substrate bias. The dynamic substrate bias gives the shortest propagation delay with a penalty on the power dissipation. Propagation delay is reduced by 77.8% compared to the normal reverse substrate bias Data driven dynamic nand. Also dynamic substrate biased D3nand’s propagation delay is reduced by 31.26% compared to data driven dynamic nand gate with static forward substrate biasing of Vdd/2. This data driven dynamic nand gate with dynamic body biasing gives us the highest speed with no area penalty and finds its applications where power penalty is acceptable. Also combination of Dynamic and static Forward body bias can be used with reduced propagation delay compared to static forward biased circuit and with comparable increase in an average power. The simulations were done on hspice simulator with 22nm High-k metal gate strained Si technology HP models of Arizona State University, USA.

Keywords: Data driven nand gate, dynamic substrate biasing, nand gate, static substrate biasing.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1569

Authors: Gaurav Upadhyay, Nand Kishore, Prashant Ranjan, Shivesh Tripathi, V. S. Tripathi

Abstract:

In this paper, a patch antenna array design is proposed for vehicular communication. The antenna consists of 2-element patch array. The antenna array is operating at multiple frequency bands. The multiband operation is achieved by use of slots at proper locations at the patch. The array is made reconfigurable by use of two PIN-diodes. The antenna is simulated and measured in four states of diodes i.e. ON-ON, ON-OFF, OFF-ON, and OFF-OFF. In ON-ON state of diodes, the resonant frequencies are 4.62-4.96, 6.50-6.75, 6.90-7.01, 7.34-8.22, 8.89-9.09 GHz. In ON-OFF state of diodes, the measured resonant frequencies are 4.63-4.93, 6.50-6.70 and 7.81-7.91 GHz. In OFF-ON states of diodes the resonant frequencies are 1.24-1.46, 3.40-3.75, 5.07-5.25 and 6.90-7.20 GHz and in the OFF-OFF state of diodes 4.49-4.75 and 5.61-5.98 GHz. The maximum bandwidth of the proposed antenna is 16.29%. The peak gain of the antenna is 3.4 dB at 5.9 GHz, which makes it suitable for vehicular communication.

Keywords: Antenna, array, reconfigurable, vehicular.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 720

Authors: P. Warnicke

Abstract:

Simulations of magnetic microstructure in elliptical Permalloy elements used for controlled motion of magnetic particles are discussed. The saturating field of the elliptical elements was studied with respect to lateral dimensions for one-vortex, cross-tie, diamond and double-diamond states as initial zero-field domain configurations. With aspect ratio of 1:3 the short axis was varied from 125 nm to 1000 nm, whereas the thickness was kept constant at 50 nm.

Keywords: Domain structure, magnetization, micromagnetics, Permalloy.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1346

Authors: Somayeh Komeylian

Abstract:

The antenna arrays for the entire 3D spherical coverage have been developed for their potential use in variety of applications such as radars and body-worn devices of the body area networks. In this study, we have rigorously revamped the hybrid antenna array using the optimum geometry of bowtie elements for achieving a significant improvement in the angular discrimination capability as well as in separating two adjacent targets. In this scenario, we have analogously investigated the effectiveness of increasing the virtual array length in fostering and enhancing the directivity and angular resolution in the 10 GHz frequency. The simulation results have extensively verified that the proposed antenna array represents a drastic enhancement in terms of size, directivity, side lobe level (SLL) and, especially resolution compared with the other available geometries. We have also verified that the maximum directivities of the proposed hybrid antenna array represent the robustness to the all  variations, which is accompanied by the uniform 3D scanning characteristic.

Keywords: Bowtie antenna, hybrid antenna array, array signal processing, body area networks.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 846

Authors: Manasi Pathade, Prachi Kadam, Renuka Kulkarni, Tejas Teredesai

Abstract:

In this paper, we propose a novel concept of relative distance measurement using Stereo Vision Technology and discuss its implementation on a FPGA based real-time image processor. We capture two images using two CCD cameras and compare them. Disparity is calculated for each pixel using a real time dense disparity calculation algorithm. This algorithm is based on the concept of indexed histogram for matching. Disparity being inversely proportional to distance (Proved Later), we can thus get the relative distances of objects in front of the camera. The output is displayed on a TV screen in the form of a depth image (optionally using pseudo colors). This system works in real time on a full PAL frame rate (720 x 576 active pixels @ 25 fps).

Keywords: Stereo Vision, Relative Distance Measurement, Indexed Histogram, Real time FPGA Image Processor

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2961

Authors: Yuji Kageyama, Shin Nagata, Tatsuya Takino, Izuru Nomura, Hiroyuki Kamata

Abstract:

In previous study, technique to estimate a self-location by using a lunar image is proposed.We consider the improvement of the conventional method in consideration of FPGA implementationin this paper. Specifically, we introduce Artificial Bee Colony algorithm for reduction of search time.In addition, we use fixed point arithmetic to enable high-speed operation on FPGA.

Keywords: SLIM, Artificial Bee Colony Algorithm, Location Estimate.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1926

Authors: Danielle Reichel, Antoine Druilhe, Tuan Dang

Abstract:

Traditional development of wireless sensor network mote is generally based on SoC1 platform. Such method of development faces three main drawbacks: lack of flexibility in terms of development due to low resource and rigid architecture of SoC; low capability of evolution and portability versus performance if specific micro-controller architecture features are used; and the rapid obsolescence of micro-controller comparing to the long lifetime of power plants or any industrial installations. To overcome these drawbacks, we have explored a new approach of development of wireless sensor network mote using a hybrid FPGA technology. The application of such approach is illustrated through the implementation of an innovative wireless sensor network protocol called OCARI.

Keywords: Hybrid FPGA, Embedded system, Mote, flexibility, durability, OCARI protocol, SoC, Wireless Sensor Network

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1850

Authors: Syed Javed Arif, Mohd Ayyub Khan, Saleem Anwar Khan

Abstract:

In this paper, a simple method is presented for measurement of power frequency deviations. A phase locked loop (PLL) is used to multiply the signal under test by a factor of 100. The number of pulses in this pulse train signal is counted over a stable known period, using decade driving assemblies (DDAs) and flip-flops. These signals are combined using logic gates and then passed through decade counters to give a unique combination of pulses or levels, which are further encoded. These pulses are equally suitable for both control applications and display units. The experimental circuit developed gives a resolution of 1 Hz within the measurement period of 20 ms. The proposed circuit is also simulated in Verilog Hardware Description Language (VHDL) and implemented using Field Programing Gate Arrays (FPGAs). A Mixed signal Oscilloscope (MSO) is used to observe the results of FPGA implementation. These results are compared with the results of the proposed circuit of discrete components. The proposed system is useful for frequency deviation measurement and control in power systems.

Keywords: Frequency measurement, digital control, phase locked loop, encoding, Verilog HDL.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 575

Authors: Q. Zafar, R. Akram, Kh.S. Karimov, T.A. Khan, M. Farooq, M.M. Tahir

Abstract:

In this study we present the effect of elevated temperatures from 300K to 400K on the electrical properties of copper Phthalocyanine (CuPc) based organic field effect transistors (OFET). Thin films of organic semiconductor CuPc (40nm) and semitransparent Al (20nm) were deposited in sequence, by vacuum evaporation on a glass substrate with previously deposited Ag source and drain electrodes with a gap of 40 μm. Under resistive mode of operation, where gate was suspended it was observed that drain current of this organic field effect transistor (OFET) show an increase with temperature. While in grounded gate condition metal (aluminum) – semiconductor (Copper Phthalocyanine) Schottky junction dominated the output characteristics and device showed switching effect from low to high conduction states like Zener diode at higher bias voltages. This threshold voltage for switching effect has been found to be inversely proportional to temperature and shows an abrupt decrease after knee temperature of 360K. Change in dynamic resistance (Rd = dV/dI) with respect to temperature was observed to be -1%/K.

Keywords: Copper Phthalocyanine, Metal-Semiconductor Schottky Junction, Organic Field Effect Transistor, Switching effect, Temperature Sensor

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2538

Authors: Mountassar Maamoun, Abdelhamid Meraghni, Abdelhalim Benbelkacem, Daoud Berkani

Abstract:

This paper describes an efficient hardware implementation of a new technique for interfacing the data exchange between the microprocessor-based systems and the external devices. This technique, based on the use of software/hardware system and a reduced physical address, enlarges the interfacing capacity of the microprocessor-based systems, uses the Direct Memory Access (DMA) to increases the frequency of the new bus, and improves the speed of data exchange. While using this architecture in microprocessor-based system or in computer, the input of the hardware part of our system will be connected to the bus system, and the output, which is a new bus, will be connected to an external device. The new bus is composed of a data bus, a control bus and an address bus. A Xilinx Integrated Software Environment (ISE) 7.1i has been used for the programmable logic implementation.

Keywords: Interfacing, Software/hardware System, CPLD, programmable logic, DMA.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1354

Authors: Massoud Masoumi, Hosseyn Mahdizadeh

Abstract:

A new and highly efficient architecture for elliptic curve scalar point multiplication which is optimized for a binary field recommended by NIST and is well-suited for elliptic curve cryptographic (ECC) applications is presented. To achieve the maximum architectural and timing improvements we have reorganized and reordered the critical path of the Lopez-Dahab scalar point multiplication architecture such that logic structures are implemented in parallel and operations in the critical path are diverted to noncritical paths. With G=41, the proposed design is capable of performing a field multiplication over the extension field with degree 163 in 11.92 s with the maximum achievable frequency of 251 MHz on Xilinx Virtex-4 (XC4VLX200) while 22% of the chip area is occupied, where G is the digit size of the underlying digit-serial finite field multiplier.

Keywords: Elliptic curve cryptography, FPGA implementation, scalar point multiplication.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2508

Authors: Santanu Santra, Utpal Roy

Abstract:

The most important mathematical operation for any computing system is addition. An efficient adder can be of greater assistance in designing of any arithmetic circuits. Quantum-dot Cellular Automata (QCA) is a promising nanotechnology to create electronic circuits for computing devices and suitable candidate for next generation of computing systems. The article presents a modest approach to implement a novel XOR gate. The gate is simple in structure and powerful in terms of implementing digital circuits. By applying the XOR gate, the hardware requirement for a QCA circuit can be decrease and circuits can be simpler in level, clock phase and cell count. In order to verify the functionality of the proposed device some implementation of Half Adder (HA) and Full Adder (FA) is checked by means of computer simulations using QCA-Designer tool. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.

Keywords: Clock, Computing system, Majority gate, QCA, QCA Designer.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4413

Authors: Blesson Varghese, Gerard McKee

Abstract:

The work reported in this paper proposes Swarm-Array computing, a novel technique inspired by swarm robotics, and built on the foundations of autonomic and parallel computing. The approach aims to apply autonomic computing constructs to parallel computing systems and in effect achieve the self-ware objectives that describe self-managing systems. The constitution of swarm-array computing comprising four constituents, namely the computing system, the problem/task, the swarm and the landscape is considered. Approaches that bind these constituents together are proposed. Space applications employing FPGAs are identified as a potential area for applying swarm-array computing for building reliable systems. The feasibility of a proposed approach is validated on the SeSAm multi-agent simulator and landscapes are generated using the MATLAB toolkit.

Keywords: Swarm-Array computing, Autonomic computing, landscapes.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1547

Authors: Yeon-kug Moon, Kang-Yoon Lee, Yun-Jae Won, Seung-Ok Lim

Abstract:

This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2.

Keywords: component ; Channel selection filters, DC offset, programmable gain amplifier, tuning circuit

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2102

Authors: Muhammad Waseem Ashraf, Shahzadi Tayyaba, Nitin Afzulpurkar, Asim Nisar, Adisorn Tuantranont, Erik L J Bohez

Abstract:

In this paper, design, fabrication and coupled multifield analysis of hollow out-of-plane silicon microneedle array with piezoelectrically actuated microfluidic device for transdermal drug delivery (TDD) applications is presented. The fabrication process of silicon microneedle array is first done by series of combined isotropic and anisotropic etching processes using inductively coupled plasma (ICP) etching technology. Then coupled multifield analysis of MEMS based piezoelectrically actuated device with integrated 2×2 silicon microneedle array is presented. To predict the stress distribution and model fluid flow in coupled field analysis, finite element (FE) and computational fluid dynamic (CFD) analysis using ANSYS rather than analytical systems has been performed. Static analysis and transient CFD analysis were performed to predict the fluid flow through the microneedle array. The inlet pressure from 10 kPa to 150 kPa was considered for static CFD analysis. In the lumen region fluid flow rate 3.2946 μL/min is obtained at 150 V for 2×2 microneedle array. In the present study the authors have performed simulation of structural, piezoelectric and CFD analysis on three dimensional model of the piezoelectrically actuated mcirofluidic device integrated with 2×2 microneedle array.

Keywords: Coupled multifield, finite element analysis, hollow silicon microneedle, transdermal drug delivery.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1793

Authors: Nasir Mehmood, Saad Rahman, Vinodh Ravinath, Mahesh Balaji

Abstract:

This paper describes the design of a programmable FSK-modulator based on VCO and its implementation in 0.35m CMOS process. The circuit is used to transmit digital data at 100Kbps rate in the frequency range of 400-600MHz. The design and operation of the modulator is discussed briefly. Further the characteristics of PLL, frequency synthesizer, VCO and the whole design are elaborated. The variation among the proposed and tested specifications is presented. Finally, the layout of sub-modules, pin configurations, final chip and test results are presented.

Keywords: FSK Modulator, CMOS, VCO, Phase Locked Loop, Frequency Synthesizer.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1675

Authors: Jung-Chuan Chou, Wei-Lun Hsia

Abstract:

A measurement system for pH array sensors is introduced to increase accuracy, and decrease non-ideal effects successfully. An array readout circuit reads eight potentiometric signals at the same time, and obtains an average value. The deviation value or the extreme value is counteracted and the output voltage is a relatively stable value. The errors of measuring pH buffer solutions are decreased obviously with this measurement system, and the non-ideal effects, drift and hysteresis, are lowered to 1.638mV/hr and 1.118mV, respectively. The efficiency and stability are better than single sensor. The whole sensing characteristics are improved.

Keywords: Array sensors, measurement system, non-ideal effects, pH sensor, readout circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1646

Authors: Hamidreza Hoshyarmanesh, Hosein Madieh, Sanju Lama, Yaser Maddahi, Garnette R. Sutherland, Kourosh Zareinia

Abstract:

This paper illustrates the concept of an algorithm to register specified markers on the neuroArm surgical manipulators, an image-guided MR-compatible tele-operated robot for microsurgery and stereotaxy. Two range-finding algorithms, namely time-of-flight and phase-shift, are evaluated for registration and supervisory control. The time-of-flight approach is implemented in a semi-field experiment to determine the precise position of a tiny retro-reflective moving object. The moving object simulates a surgical tool tip. The tool is a target that would be connected to the neuroArm end-effector during surgery inside the magnet bore of the MR imaging system. In order to apply flight approach, a 905-nm pulsed laser diode and an avalanche photodiode are utilized as the transmitter and receiver, respectively. For the experiment, a high frequency time to digital converter was designed using a field-programmable gate arrays. In the phase-shift approach, a continuous green laser beam with a wavelength of 530 nm was used as the transmitter. Results showed that a positioning error of 0.1 mm occurred when the scanner-target point distance was set in the range of 2.5 to 3 meters. The effectiveness of this non-contact approach exhibited that the method could be employed as an alternative for conventional mechanical registration arm. Furthermore, the approach is not limited by physical contact and extension of joint angles.

Keywords: 3D laser scanner, intraoperative MR imaging, neuroArm, real time registration, robot-assisted surgery, supervisory control.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1000

Authors: Kar Foo Chong, Andreas Lee Astuti, Pradeep K. Gopalakrishnan, T. Hui Teo

Abstract:

This paper describes design of a digital feedback loop for a low switching frequency dc-dc switching converters. Low switching frequencies were selected in this design. A look up table for the digital PID (proportional integrator differentiator) compensator was implemented using Altera Stratix II with built-in ADC (analog-to-digital converter) to achieve this hardware realization. Design guidelines are given for the PID compensator, high frequency DPWM (digital pulse width modulator) and moving average filter.

Keywords: dc-dc converter, FPGA, PID, power management, .

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1959

Authors: M. M. Abutaleb, A. Hamdy, M. E. Abuelwafa, E. M. Saad

Abstract:

Optical flow is a research topic of interest for many years. It has, until recently, been largely inapplicable to real-time applications due to its computationally expensive nature. This paper presents a new reliable flow technique which is combined with a motion detection algorithm, from stationary camera image streams, to allow flow-based analyses of moving entities, such as rigidity, in real-time. The combination of the optical flow analysis with motion detection technique greatly reduces the expensive computation of flow vectors as compared with standard approaches, rendering the method to be applicable in real-time implementation. This paper describes also the hardware implementation of a proposed pipelined system to estimate the flow vectors from image sequences in real time. This design can process 768 x 576 images at a very high frame rate that reaches to 156 fps in a single low cost FPGA chip, which is adequate for most real-time vision applications.

Keywords: Optical flow, motion detection, real-time systems, FPGA.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1706

Authors: H. K. Hwang, Zekeriya Aliyazicioglu, Solomon Wu, Hung Lu, Nick Wilkins, Daniel Kerr

Abstract:

Multiple-input multiple-output (MIMO) radar has received increasing attention in recent years. MIMO radar has many advantages over conventional phased array radar such as target detection,resolution enhancement, and interference suppression. In this paper, the results are presented from a simulation study of MIMO uniformly-spaced linear array (ULA) antennas. The performance is investigated under varied parameters, including varied array size, pseudo random (PN) sequence length, number of snapshots, and signal to noise ratio (SNR). The results of MIMO are compared to a traditional array antenna.

Keywords: Multiple-input multiple-output (MIMO) radar, phased array antenna, target detection, radar signal processing.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2756

Authors: Yasuhiko Okuma, Yuichi Suzuki, Takahiro Murakami, Yoshihisa Ishida

Abstract:

In this paper, an extended method of the directionally constrained minimization of power (DCMP) algorithm for broadband signals is proposed. The DCMP algorithm is one of the useful techniques of extracting a target signal from observed signals of a microphone array system. In the DCMP algorithm, output power of the microphone array is minimized under a constraint of constant responses to directions of arrival (DOAs) of specific signals. In our algorithm, by limiting the directional constraint to the perpendicular direction to the sensor array system, the calculating time is reduced.

Keywords: Beamformer, directionally constrained minimizationof power, direction of arrival, microphone array.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1605

Authors: Z. X. Chen, N. Singh, D.-L. Kwong

Abstract:

This paper presents a vertical silicon nanowire n- MOSFET integrated with a CMOS-compatible fully-silicided (FUSI) NiSi2 gate. Devices with nanowire diameter of 50nm show good electrical performance (SS < 70mV/dec, DIBL < 30mV/V, Ion/Ioff > 107). Most significantly, threshold voltage tunability of about 0.2V is shown. Although threshold voltage remains low for the 50nm diameter device, it is expected to become more positive as nanowire diameter reduces.

Keywords: NiSi , fully-silicided (FUSI) gate, vertical siliconnanowire (SiNW), CMOS compatible.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1832

Authors: Amin Nekoubin, Abdolamir Nekoubin

Abstract:

Vertical ZnO nanowire array films were synthesized based on aqueous method for sensing applications. ZnO nanowires were investigated structurally using X-ray diffraction (XRD) and scanning electron microscopy (SEM). The gas-sensing properties of ZnO nanowires array films are studied. It is found that the ZnO nanowires array film sensor exhibits excellent sensing properties towards O2 and CO2 at 100 °C with the response time shorter than 5 s. High surface area / volume ratio of vertical ZnO nanowire and high mobility accounts for the fast response and recovery. The sensor response was measured in the range from 100 to 500 ppm O2 and CO2 in this study.

Keywords: Gas sensor, semiconductor, ZnO, Nanowire array

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1515

Authors: Noha M. Rashad, W. Swelam, M. H. Abd ElAzeem

Abstract:

A simple design of array antenna is presented in this paper, supporting millimeter wave applications which can be used in short range wireless communications such as 5G applications. This design enhances the use of V-band, according to IEEE standards, as the antenna works in the 70 GHz band with bandwidth more than 11 GHz and peak gain more than 13 dBi. The design is simulated using different numerical techniques achieving a very good agreement.

Keywords: 5G Technology, array antenna, microstrip, millimeter wave.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 928

Authors: Maja Sarevska, Abdel-Badeeh M. Salem

Abstract:

This paper considers the problem of Null-Steering beamforming using Neural Network (NN) approach for antenna array system. Two cases are presented. First, unlike the other authors, the estimated Direction Of Arrivals (DOAs) are used for antenna array weights NN-based determination and the imprecise DOAs estimations are taken into account. Second, the blind null-steering beamforming is presented. In this case the antenna array outputs are presented at the input of the NN without DOAs estimation. The results of computer simulations will show much better relative mean error performances of the first NN approach compared to the NNbased blind beamforming.

Keywords: Beamforming, DOAs, neural network.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2367