Search results for: Analog voltage inverter

Authors: Zdeňka Dostálová, David Matoušek, Bohumil Brtnik

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As there are also graph methods of circuit analysis in addition to algebraic methods, it is, in theory, clearly possible to carry out an analysis of a whole switched circuit in two-phase switching exclusively by the graph method as well. This article deals with two methods of full-graph solving of switched circuits: by transformation graphs and by two-graphs. It deals with the circuit switched capacitors and the switched current, too. All methods are presented in an equally detailed steps to be able to compare.

Keywords: Switched capacitors of two phases, switched currents of two phases, transformation graph, two-graph, Mason's formula, voltage transfer, summary graph.

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Authors: Yong-Seo Koo, Jin-Woo Jung, Byung-Seok Lee, Dong-Su Kim, Yil-Suk Yang

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In this paper, a novel LVTSCR-based device for electrostatic discharge (ESD) protection of integrated circuits (ICs) is designed, fabricated and characterized. The proposed device is similar to the conventional LVTSCR but it has an embedded PMOSFET in the anode n-well to enhance the turn on speed, the clamping capability and the robustness. This is possible because the embedded PMOSFET provides the sub-path of ESD discharge current. The TLP, HBM and MM testing are carried out to verify the ESD performance of the proposed devices, which are fabricated in 0.35um (Bipolar-CMOS-DMOS) BCDMOS process. The device has the robustness of 70mA/um that is higher about 60mA/um than the LVTSCR, approximately.

Keywords: ESD Protection, grounded gate NMOS (GGNMOS), low trigger voltage SCR (LVTSCR)

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Authors: M. Saeki

Abstract:

This paper presents the results of an experimental study on the performance of a triboelectric separator of plastic mixtures used for recycling. The separator consists of four cylindrical electrodes. The principle behind the separation technique is based on the difference in the Coulomb force acting on the plastic particles after triboelectric charging. The separation of mixtures of acrylonitrile butadiene styrene (ABS) and polystyrene (PS) using this method was studied. The effects of the triboelectric charging time and applied voltage on the separation efficiency were investigated. The experimental results confirm that it is possible to obtain a high purity and recovery rate for the initial compositions considered in this study.

Keywords: Coulomb force, recycling, triboelectric separator, waste plastics.

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Authors: Mamta Patel, R. N. Patel

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Transmission and distribution lines are vital links between the generating unit and consumers. They are exposed to atmosphere, hence chances of occurrence of fault in transmission line is very high which has to be immediately taken care of in order to minimize damage caused by it. In this paper Discrete wavelet transform of voltage signals at the two ends of transmission lines have been analyzed. The transient energy of the detail information of level five is calculated for different fault conditions. It is observed that the variation of transient energy of healthy and faulted line can give important information which can be very useful in classifying and locating the fault.

Keywords: Wavelet, Discrete wavelet transform, Multiresolution analysis, Transient energy

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Authors: V.Fathipour, M. A. Malakootian, S. Fathipour, M. Fathipour

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In this paper we propose a novel RF LDMOS structure which employs a thin strained silicon layer at the top of the channel and the N-Drift region. The strain is induced by a relaxed Si0.8 Ge0.2 layer which is on top of a compositionally graded SiGe buffer. We explain the underlying physics of the device and compare the proposed device with a conventional LDMOS in terms of energy band diagram and carrier concentration. Numerical simulations of the proposed strained silicon laterally diffused MOS using a 2 dimensional device simulator indicate improvements in saturation and linear transconductance, current drivability, cut off frequency and on resistance. These improvements are however accompanied with a suppression in the break down voltage.

Keywords: High Frequency MOSFET, Design of RF LDMOS, Strained-Silicon, LDMOS.

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Authors: M.Bensaada , A.Boudghene Stambouli , M.Bekhti, A. Bellar, L. Boukhris

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This paper is a simple and systematic approaches to the design and analysis a pulse width modulation (PWM) based sliding mode controller for buck DC-DC Converters. Various aspects of the design, including the practical problems and the proposed solutions, are detailed. However, these control strategies can't compensate for large load current and input voltage variations. In this paper, a new control strategy by compromising both schemes advantages and avoiding their drawbacks is proposed, analyzed and simulated.

Keywords: Buck, DC/DC converters, sliding mode control, pulse width modulation.

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Authors: Shiv Shankar Mishra, S. Wairya, R. K. Nagaria, S. Tiwari

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New methodologies for XOR-XNOR circuits are proposed to improve the speed and power as these circuits are basic building blocks of many arithmetic circuits. This paper evaluates and compares the performance of various XOR-XNOR circuits. The performance of the XOR-XNOR circuits based on TSMC 0.18μm process models at all range of the supply voltage starting from 0.6V to 3.3V is evaluated by the comparison of the simulation results obtained from HSPICE. Simulation results reveal that the proposed circuit exhibit lower PDP and EDP, more power efficient and faster when compared with best available XOR-XNOR circuits in the literature.

Keywords: Exclusive-OR (XOR), Exclusive-NOR (XNOR), High speed, Low power, Arithmetic Circuits.

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Authors: Wang Zhulin, Min Fuhong, Peng Guangya, Wang Yaoda, Cao Yi

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In this paper, a magnetron memristor model based on hyperbolic sine function is presented and the correctness proved by studying the trajectory of its voltage and current phase, and then a memristor chaotic system with the memristor model is presented. The phase trajectories and the bifurcation diagrams and Lyapunov exponent spectrum of the magnetron memristor system are plotted by numerical simulation, and the chaotic evolution with changing the parameters of the system is also given. The paper includes numerical simulations and mathematical model, which confirming that the system, has a wealth of dynamic behavior.

Keywords: Memristor, chaotic circuit, dynamical behavior, chaotic system.

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Authors: Deependra Singh, Devender Singh, K. S. Verma

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This paper addresses a novel technique for placement of distributed generation (DG) in electric power systems. A GA based approach for sizing and placement of DG keeping in view of system power loss minimization in different loading conditions is explained. Minimal system power loss is obtained under voltage and line loading constraints. Proposed strategy is applied to power distribution systems and its effectiveness is verified through simulation results on 16, 37-bus and 75-bus test systems.

Keywords: Distributed generation (DG), Genetic algorithms (GA), optimal sizing and placement, Power loss.

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Authors: Yashvir Singh, Swati Chamoli

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In this paper, a power laterally-diffused metal-oxide-semiconductor field-effect transistor (LDMOSFET) on In_0.53Ga_0.47As is presented. The device utilizes a thicker field-oxide with low dielectric constant under the field-plate in order to achieve possible reduction in device capacitances and reduced-surface-field effect. Using 2D numerical simulations, performance of the proposed device is analyzed and compared with that of the conventional LDMOSFET. The proposed structure provides 50% increase in the breakdown voltage, 21% increase in transit frequency, and 72% improvement in figure-of-merit over the conventional device for same cell pitch.

Keywords: InGaAs, dielectric, lateral, power MOSFET.

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Authors: Shipra Upadhyay , R. K. Nagaria, R. A. Mishra

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In this paper, we present the design and experimental evaluation of complementary energy path adiabatic logic (CEPAL) based 1 bit full adder circuit. A simulative investigation on the proposed full adder has been done using VIRTUOSO SPECTRE simulator of cadence in 0.18μm UMC technology and its performance has been compared with the conventional CMOS full adder circuit. The CEPAL based full adder circuit exhibits the energy saving of 70% to the conventional CMOS full adder circuit, at 100 MHz frequency and 1.8V operating voltage.

Keywords: Adiabatic, CEPAL, full adder, power clock

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Authors: A. Bozkurt, C. Kocatepe, R. Yumurtaci, İ. C. Tastan, G. Tulun

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Efficient use of energy, the increase in demand of energy and also with the reduction of natural energy sources, has improved its importance in recent years. Most of the losses in the system from electricity produced until the point of consumption is mostly composed by the energy distribution system. In this study, analysis of the resulting loss in power distribution transformer and distribution power cable is realized which are most of the losses in the distribution system. Transformer losses in the real distribution system are analyzed by CYME Power Engineering Software program. These losses are disclosed for different voltage levels and different loading conditions.

Keywords: Distribution system, distribution transformer, power cable, technical losses.

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Authors: Tarun Kumar Rawat, Abhirup Lahiri, Ashish Gupta

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In this paper, we analyze the effect of noise in a single- ended input differential amplifier working at high frequencies. Both extrinsic and intrinsic noise are analyzed using time domain method employing techniques from stochastic calculus. Stochastic differential equations are used to obtain autocorrelation functions of the output noise voltage and other solution statistics like mean and variance. The analysis leads to important design implications and suggests changes in the device parameters for improved noise characteristics of the differential amplifier.

Keywords: Single-ended input differential amplifier, Noise, stochastic differential equation, mean and variance.

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Authors: A. Hellany, M.Nagrial, M. Nassereddine, J. Rizk

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As new challenges emerge in power electrical workplace safety, it is the responsibility of the systems designer to seek out new approaches and solutions that address them. Design decisions made today will impact cost, safety and serviceability of the installed systems for 40 or 50 years during the useful life for the owner. Studies have shown that this cost is an order of magnitude of 7 to 10 times the installed cost of the power distribution equipment. This paper reviews some aspects of earthing system design in power substation surrounded by residential houses. The electrical potential rise and split factors are discussed and a few recommendations are provided to achieve a safety voltage in the area beyond the boundary of the substation.

Keywords: EPR, Split Factor, Earthing Design

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Authors: M.R.Shabgard, R.M.Shotorbani

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FW4 is a newly developed hot die material widely used in Forging Dies manufacturing. The right selection of the machining conditions is one of the most important aspects to take into consideration in the Electrical Discharge Machining (EDM) of FW4. In this paper an attempt has been made to develop mathematical models for relating the Material Removal Rate (MRR), Tool Wear Ratio (TWR) and surface roughness (Ra) to machining parameters (current, pulse-on time and voltage). Furthermore, a study was carried out to analyze the effects of machining parameters in respect of listed technological characteristics. The results of analysis of variance (ANOVA) indicate that the proposed mathematical models, can adequately describe the performance within the limits of the factors being studied.

Keywords: Electrical Discharge Machining (EDM), linearregression technique, Response Surface Methodology (RSM)

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Authors: Khaled M.EL-Naggar

Abstract:

In power systems, protective relays must filter their inputs to remove undesirable quantities and retain signal quantities of interest. This job must be performed accurate and fast. A new method for filtering the undesirable components such as DC and harmonic components associated with the fundamental system signals. The method is s based on a dynamic filtering algorithm. The filtering algorithm has many advantages over some other classical methods. It can be used as dynamic on-line filter without the need of parameters readjusting as in the case of classic filters. The proposed filter is tested using different signals. Effects of number of samples and sampling window size are discussed. Results obtained are presented and discussed to show the algorithm capabilities.

Keywords: Protection, DC-offset, Dynamic Filter, Estimation.

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Authors: A. R. Nezamabadi, M. Karami Khorramabadi

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This paper studies dynamic stability of homogeneous beams with piezoelectric layers subjected to periodic axial compressive load that is simply supported at both ends lies on a continuous elastic foundation. The displacement field of beam is assumed based on Bernoulli-Euler beam theory. Applying the Hamilton's principle, the governing dynamic equation is established. The influences of applied voltage, foundation coefficient and piezoelectric thickness on the unstable regions are presented. To investigate the accuracy of the present analysis, a compression study is carried out with a known data.

Keywords: Dynamic stability, Homogeneous graded beam-Piezoelectric layer, Harmonic balance method.

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Authors: Suhas K, Sripadaraja K

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This paper details few mechanical modeling and design issues of RF MEMS switches. We concentrate on an electrostatically actuated broad side series switch; surface micromachined with a crab leg membrane. The same results are extended to any complex structure. With available experimental data and fabrication results, we present the variation in dynamic performance and compliance of the switch with reference to few design issues, which we find are critical in deciding the dynamic behavior of the switch, without compromise on the RF characteristics. The optimization of pull in voltage, transient time and resonant frequency with regard to these critical design parameters are also presented.

Keywords: Microelectromechanical Systems (MEMS), RadioFrequency MEMS, Modeling, Actuators

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Authors: Young Wook Lee, Sun-Jae Kim, Soo-Yeon Lee, Moon-Kyu Song, Woo-Geun Lee Min-Koo Han

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We have fabricated a-IGZO TFT and investigated the stability under positive DC and AC bias stress. The threshold voltage of a-IGZO TFT shifts positively under those biases, and that reduces on-current. For this reason, conventional shift-register circuit employing TFTs which stressed by positive bias will be unstable, may do not work properly. We have designed a new 6-transistor shift-register, which has less transistors than prior circuits. The TFTs of the proposed shift-register are not suffering from positive DC or AC stress, mainly kept unbiased. Despite the compact design, the stable output signal was verified through the SPICE simulation even under RC delay of clock signal.

Keywords: Indium Gallium Zinc Oxide (IGZO), Thin FilmTransistor (TFT), shift-register

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Authors: Fatima Zohra Mahi, Luca Varani

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We present an analytical model for the calculation of the sensitivity, the spectral current noise and the detective parameter for an optically illuminated In0.53Ga0.47As n+nn+ diode. The photocurrent due to the excess carrier is obtained by solving the continuity equation. Moreover, the current noise level is evaluated at room temperature and under a constant voltage applied between the diode terminals. The analytical calculation of the current noise in the n+nn+ structure is developed by considering the free carries fluctuations. The responsivity and the detection parameter are discussed as functions of the doping concentrations and the emitter layer thickness in one-dimensional homogeneous n+nn+ structure.

Keywords: Responsivity, detection parameter, photo-detectors, continuity equation, current noise.

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Authors: Raheleh Hedayati, Sanaz Haddadian, Hooman Nabovati

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A 2.4GHz (RF) down conversion Gilbert Cell mixer, implemented in a 0.18-μm CMOS technology with a 1.8V supply, is presented. Current bleeding (charge injection) technique has been used to increase the conversion gain and the linearity of the mixer. The proposed mixer provides 10.75 dB conversion gain ( C G ) with 14.3mw total power consumption. The IIP3 and 1-dB compression point of the mixer are 8dbm and -4.6dbm respectively, at 300 MHz IF frequencies. Comparing the current design against the conventional mixer design, demonstrates better performance in the conversion gain, linearity, noise figure and port-to-port isolation.

Keywords: Mixer, Gilbert Cell, Charge Injection, RFIC, CMOSTechnology.

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Authors: A. R. Nezamabadi, M. Karami Khorramabadi

Abstract:

This paper studies stability of homogeneous beams with piezoelectric layers subjected to axial load that is simply supported at both ends lies on a continuous elastic foundation. The displacement field of beam is assumed based on first order shear deformation beam theory. Applying the Hamilton's principle, the governing equation is established. The influences of applied voltage, dimensionless geometrical parameter and foundation coefficient on the stability of beam are presented. To investigate the accuracy of the present analysis, a compression study is carried out with a known data.

Keywords: Stability, Homogeneous beam- Piezoelectric layer

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Authors: Min-ju Kwon, Chae-won Kim, Jeong-yun Seo, Hee-guk Chae, Yong-seo Koo

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In this paper, we presented the LDO (low-dropout) regulator which enhanced the PSRR by applying the constant current source generation technique through the BGR (Band Gap Reference) to form the noise sensing circuit. The current source through the BGR has a constant current value even if the applied voltage varies. Then, the noise sensing circuit, which is composed of the current source through the BGR, operated between the error amplifier and the pass transistor gate of the LDO regulator. As a result, the LDO regulator has a PSRR of -68.2 dB at 1k Hz, -45.85 dB at 1 MHz and -45 dB at 10 MHz. the other performance of the proposed LDO was maintained at the same level of the conventional LDO regulator.

Keywords: LDO regulator, noise sensing circuit, current reference, pass transistor.

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Authors: Pardeep Singh, Sanjay Sharma, Parvinder S. Sandhu

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This work aims to reduce the read power consumption as well as to enhance the stability of the SRAM cell during the read operation. A new 10-transisor cell is proposed with a new read scheme to minimize the power consumption within the memory core. It has separate read and write ports, thus cell read stability is significantly improved. A 16Kb SRAM macro operating at 1V supply voltage is demonstrated in 65 nm CMOS process. Its read power consumption is reduced to 24% of the conventional design. The new cell also has lower leakage current due to its special bit-line pre-charge scheme. As a result, it is suitable for low-power mobile applications where power supply is restricted by the battery.

Keywords: A 16Kb 10T-SRAM, 4x Read-Power Reduction

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Authors: P. V. V. Rama Rao, M. V. Srikanth, S. Dileep Kumar Varma

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With advances in solid-state power electronic devices and microprocessors, various pulse-width-modulation (PWM) techniques have been developed for industrial applications. This paper presents the comparison of two different PWM techniques, the sinusoidal PWM (SPWM) technique and the space-vector PWM (SVPWM) technique applied to two level VSI for micro grid applications. These two methods are compared by discussing their ease of implementation and by analyzing the output harmonic spectra of various output voltages (line-to-neutral voltages, and line-to-line voltages) and their total harmonic distortion (THD). The SVPWM technique in the under-modulation region can increase the fundamental output voltage by 15.5% over the SPWM technique.

Keywords: SPWM, SVPWM, VSI, Modulation Index.

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Authors: Chih Chin Yang, Chih Yu Lee, Jing Yi Wang, Mei Zhen Xue, Chia Yueh Wu

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A well-defined frequency multiple dividing (FMD) circuit using a resonant model is presented in this research. The basic component of a frequency multiple divider as used in a resonant model is established by compositing a well-defined resonant effect of negative differential resistance (NDR) characteristics which possesses a wider operational region and high operational current at a bias voltage of about 1.15 V. The resonant model is then applied in the frequency dividing circuit with the above division ratio (R_D) of 200 at the signal input of middle frequency. The division ratio also exists at the input of a low frequency signal.

Keywords: Divider, frequency, resonant model.

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Authors: Steve Hung-Lung Tu, Chu-Tse Lee

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A new power regulator controller with multiple-access PID compensator is proposed, which can achieve a minimum memory requirement for fully table look-up. The proposed regulator controller employs hysteresis comparators, an error process unit (EPU) for voltage regulation, a multiple-access PID compensator and a lowpower- consumption digital PWM (DPWM). Based on the multipleaccess mechanism, the proposed controller can alleviate the penalty of large amount of memory employed for fully table look-up based PID compensator in the applications of power regulation. The proposed controller has been validated with simulation results.

Keywords: Multiple access, PID compensator, PWM, Buck conversion.

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Authors: E. Farshidi

Abstract:

This paper presents the design of a low power second-order continuous-time sigma-delta modulator for low power applications. The loop filter of this modulator has been implemented based on the nonlinear transconductance-capacitor (Gm-C) by employing current-mode technique. The nonlinear transconductance uses floating gate MOS (FG-MOS) transistors that operate in weak inversion region. The proposed modulator features low power consumption (<80uW), low supply voltage (1V) and 62dB dynamic range. Simulation results by HSPICE confirm that it is very suitable for low power biomedical instrumentation designs.

Keywords: Sigma-delta, modulator, Current-mode, Nonlinear Transconductance, FG-MOS.

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Authors: M. Khaouani, A. Guen-Bouazza, B. Bouazza, Z. Kourdi

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The integrity and issues related to electrostatic performance associated with scaling Si MOSFET bulk sub 10nm channel length promotes research in new device architectures such as SOI, double gate and GAA MOSFET. In this paper, we present some novel characteristic of horizontal rectangular gate\gate all around MOSFETs with dual metal of gate we obtained using SILVACO TCAD tools. We will also exhibit some simulation results we obtained relating to the influence of some parameters variation on our structure, that having a direct impact on their threshold voltage and drain current. In addition, our TFET showed reasonable I_ON/I_OFF ratio of (10⁴) and low drain induced barrier lowering (DIBL) of 39 mV/V.

Keywords: GAA, SILVACO, QUANTUM, MOSFETs.

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Authors: N.Karpagam, D.Devaraj

Abstract:

Static Var Compensator (SVC) is a shunt type FACTS device which is used in power system primarily for the purpose of voltage and reactive power control. In this paper, a fuzzy logic based supplementary controller for Static Var Compensator (SVC) is developed which is used for damping the rotor angle oscillations and to improve the transient stability of the power system. Generator speed and the electrical power are chosen as input signals for the Fuzzy Logic Controller (FLC). The effectiveness and feasibility of the proposed control is demonstrated with Single Machine Infinite Bus (SMIB) system and multimachine system (WSCC System) which show improvement over the use of a fixed parameter controller.

Keywords: FLC, SVC, Transient stability, SMIB, PIDcontroller.

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