**Commenced**in January 2007

**Frequency:**Monthly

**Edition:**International

**Paper Count:**32937

##### A New Approach to Design Low Power Continues-Time Sigma-Delta Modulators

**Authors:**
E. Farshidi

**Abstract:**

This paper presents the design of a low power second-order continuous-time sigma-delta modulator for low power applications. The loop filter of this modulator has been implemented based on the nonlinear transconductance-capacitor (Gm-C) by employing current-mode technique. The nonlinear transconductance uses floating gate MOS (FG-MOS) transistors that operate in weak inversion region. The proposed modulator features low power consumption (<80uW), low supply voltage (1V) and 62dB dynamic range. Simulation results by HSPICE confirm that it is very suitable for low power biomedical instrumentation designs.

**Keywords:**
Sigma-delta,
modulator,
Current-mode,
Nonlinear Transconductance,
FG-MOS.

**Digital Object Identifier (DOI):**
doi.org/10.5281/zenodo.1076196

**References:**

[1] C. A. D. E. La Croz-Blas, A. J. Lopez-Martin and A. Carlosena, "1.2V 5uw class-AB CMOS log-domain integrator with multi decade tuning," IEEE. Trans. Circuits Syst. II, Analog Digit. Signal process. vol. 52, no.10, pp. 665-668, Oct. 2005.

[2] D. Payton and C .Enz, "A micro power class-AB CMOS Log-domain filter for DECT applications," IEEE J. solid-State Circuits, vol. 36, no. 7, pp. 1067-1075, Jul. 2001.

[3] E. Farshidi, "A Micropower Current-Mode Sigma-Delta Modulator for Biomedical Applications," Presented in the 17th IEEE Signal Process. and Communications Application Conference, SIU-09, pp. 856-859, Antalya, Turkey, April 2009.

[4] O. Shoaei and W. M. Snelgrove, "Design and implementation of a tunable 40MHz-10Mhz Gm-C band pass Delta-Sigma modulator," IEEE Transactions on Circuits and Systems-II, vol. 44, no. 7, pp. 521- 530, Jul. 1997.

[5] S. R. Norsworthy, R. Schreier, and G. C. Themes, Delta-Sigma Data Converters, Piscataway, NJ: IEEE Press, 1996.

[6] J. H. Nielsen, E. Bruun, "A low-power 10-bit continuous-time CMOS Sigma-Delta A/D converter," ISCAS Proceedings of the 2004 International Symposium on, Vol. 1 , May 2004 .

[7] J. A. Cherry, Theory, practice, and fundamental performance limits of high-speed data conversion using continuous-time delta-sigma modulator, Ph.D. thesis, Carleton University, Ottawa, Ontario, Canada, Nov. 1998.

[8] E. Farshidi, S. M. Sayedi, "A Second-order Low Power Current- Mode Continuous-Time Sigma-Delta Modulator," ASICON'07, Proceedings of the 7th IEEE International Conference on ASIC, Guilin, China, pp. 293-296, Oct. 2007.

[9] E. Farshidi, Analysis and Design of Current-Mode Companding Circuits, Examining their Nonlinear Behavior and Application in Data Converters, Ph.D. Thesis, Isfahan University of Technology, Iran, Mar. 2008.

[10] H. Aboushady and M. M. Louerat, "Low-power design of low-voltage current-mode integrators for continuous-time sigma-delta modulators," IEEE International Symposium on Circuits and Systems, ISCAS'01, Sydney, Australia, May 2001.

[11] C. C. Enz, F. Krummenacher, and E. A. Vittoz, "An analytical MOS transistor model valid in all regions of operation and dedicated to lowvoltage and low-current applications," Journal of Analog Integrated Circuits and Signal Processing, Kluwer Academic Publishers, vol. 8, no. 1, pp. 83-114, 1995.

[12] E. O. Rodriguez-villegas and H. Barnes, "Solution to trapped charge in FGMOS transistors," Electron. Lett. , vol. 39, pp. 1416-1417, Sep. 2003.

[13] E. Seevinck, "Companding current-mode integrator: A new circuit principle for continuous-time monolithic filters," Electron. Lett., vol. 26, no. 24, pp. 2046-2047, Nov. 1990.

[14] G. M. Sung D. A. Yao K. H. Chang S. R. Yao " A Second-Order Sigma-Delta Modulator with Switched-Current Memory Cell for Closed-Loop Motor Control System," 37th IEEE Publication International Symposium on Power Electronics Specialist Conference, PESC-06, Jeju, Korea, June 2006.

[15] J. Ramirez-Angulo, G. Gonzalez-Atamirano, S. C. Choi, "Modeling multiple-Input floating gate transistors for analog signal processing," in IEEE Int. Symp. Circuits Syst., ISCAS-97, vol. 4, pp. 2020-2023, 1997.

[16] D. Johns and K. Martin, "Analog Integrated Circuit Design", John Wiley & Sons, 1997.

[17] A. Agah, K. Vleugels, P. B. Griffin, M. Ronaghi, J. D. Plummer, and B. A.Wooley, "A high-resolution low-power oversampling ADC with extended- range for bio-sensor arrays," in 2007 IEEE VLSI Circuits Symp , pp. 244-245, Jun. 14-16, 2007.

[18] S. Y. Lee and C. J. Cheng, "A low-voltage and low-power adaptive switched-current sigma-delta ADC for bio-acquisition microsystems," IEEE Trans. Circuits Syst. I, Reg. Papers, vol. 53, no. 12, pp. 2628- 2636, Dec. 2006.

[19] H.-Y. Lee, C.-M. Hsu, S.-C. Huang, Y.-W. Shih, and C.-H. Luo, "Designing low power of sigma delta modulator for biomedical application," Biomed. Eng. Applicat., Basis, Commun., no. 18, pp. 181-185, August 2005.