Search results for: equivalent circuit

Authors: Vinay Agrawal, Suyash Garg, Ravindra Nagar, Vinay Chandwani

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Open ground storey with floating columns is a typical feature in the modern multistory constructions in urban India. Such features are very much undesirable in buildings built in seismically active areas. The present study proposes a feasible solution to mitigate the effects caused due to non-uniformity of stiffness and discontinuity in load path and to simultaneously hold the functional use of the open storey particularly under the floating column, through a combination of various lateral strengthening systems. An investigation is performed on an example building with nine different analytical models to bring out the importance of recognising the presence of open ground storey and floating columns. Two separate analyses on various models of the building namely, the equivalent static analysis and the response spectrum analysis as per IS: 1893-2002 were performed. Various measures such as incorporation of Chevron bracings and shear walls, strengthening the columns in the open ground storey, and their different combinations were examined. The analysis shows that, in comparison to two short ones separated by interconnecting beams, the structural walls are most effective when placed at the periphery of the buildings and used as one long structural wall. Further, it can be shown that the force transfer from floating columns becomes less horizontal when the Chevron Bracings are placed just below them, thereby reducing the shear forces in the beams on which the floating column rests.

Keywords: Equivalent static analysis, floating column, open ground storey, response spectrum analysis, shear wall, stiffness irregularity.

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Authors: Y. Zheng, W. Sun

Abstract:

This paper describes a new approach which can be used to interpret the experimental creep deformation data obtained from miniaturized thin plate bending specimen test to the corresponding uniaxial data based on an inversed application of the reference stress method. The geometry of the thin plate is fully defined by the span of the support, l, the width, b, and the thickness, d. Firstly, analytical solutions for the steady-state, load-line creep deformation rate of the thin plates for a Norton’s power law under plane stress (b→0) and plane strain (b→∞) conditions were obtained, from which it can be seen that the load-line deformation rate of the thin plate under plane-stress conditions is much higher than that under the plane-strain conditions. Since analytical solution is not available for the plates with random b-values, finite element (FE) analyses are used to obtain the solutions. Based on the FE results obtained for various b/l ratios and creep exponent, n, as well as the analytical solutions under plane stress and plane strain conditions, an approximate, numerical solutions for the deformation rate are obtained by curve fitting. Using these solutions, a reference stress method is utilised to establish the conversion relationships between the applied load and the equivalent uniaxial stress and between the creep deformations of thin plate and the equivalent uniaxial creep strains. Finally, the accuracy of the empirical solution was assessed by using a set of “theoretical” experimental data.

Keywords: Bending, Creep, Miniature Specimen, Thin Plate.

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Authors: S. K. Tomar, R. Prasad, S. Panda, C. Ardil

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Reduction of Single Input Single Output (SISO) discrete systems into lower order model, using a conventional and an evolutionary technique is presented in this paper. In the conventional technique, the mixed advantages of Modified Cauer Form (MCF) and differentiation are used. In this method the original discrete system is, first, converted into equivalent continuous system by applying bilinear transformation. The denominator of the equivalent continuous system and its reciprocal are differentiated successively, the reduced denominator of the desired order is obtained by combining the differentiated polynomials. The numerator is obtained by matching the quotients of MCF. The reduced continuous system is converted back into discrete system using inverse bilinear transformation. In the evolutionary technique method, Particle Swarm Optimization (PSO) is employed to reduce the higher order model. PSO method is based on the minimization of the Integral Squared Error (ISE) between the transient responses of original higher order model and the reduced order model pertaining to a unit step input. Both the methods are illustrated through numerical example.

Keywords: Discrete System, Single Input Single Output (SISO), Bilinear Transformation, Reduced Order Model, Modified CauerForm, Polynomial Differentiation, Particle Swarm Optimization, Integral Squared Error.

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Authors: Mohamed Fathy Heweage, Xiao Wen, Ayman Mokhtar, Ahmed Eldamarawy

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In this paper, we are interested in modeling, simulation, and measurement of the laser spot position with a quadrant detector. We enhance detection and tracking of semi-laser weapon decoding system based on microcontroller. The system receives the reflected pulse through quadrant detector and processes the laser pulses through a processing circuit, a microcontroller decoding laser pulse reflected by the target. The seeker accuracy will be enhanced by the decoding system, the laser detection time based on the receiving pulses number is reduced, a gate is used to limit the laser pulse width. The model is implemented based on Pulse Repetition Frequency (PRF) technique with two microcontroller units (MCU). MCU1 generates laser pulses with different codes. MCU2 decodes the laser code and locks the system at the specific code. The codes EW selected based on the two selector switches. The system is implemented and tested in Proteus ISIS software. The implementation of the full position determination circuit with the detector is produced. General system for the spot position determination was performed with the laser PRF for incident radiation and the mechanical system for adjusting system at different angles. The system test results show that the system can detect the laser code with only three received pulses based on the narrow gate signal, and good agreement between simulation and measured system performance is obtained.

Keywords: 4-quadrant detector, pulse code detection, laser guided weapons, pulse repetition frequency, ATmega 32 microcontrollers.

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Authors: Ioan Rusu

Abstract:

In the operation of power transformers of 110 kV/MV from substations, these are traveled by fault current resulting from MV line damage. Defect electrical contacts are heated when they are travelled from fault currents. In the case of high temperatures when 135 °C is reached, the electrical insulating oil in the vicinity of the electrical faults comes into contact with these contacts releases gases, and activates the electrical protection. To avoid auto-flammability of electro-insulating oil, we designed a security system thermal of electrical contact defects by pouring fire-resistant polyurethane foam, mastic or mortar fire inside a cardboard electro-insulating cylinder. From practical experience, in the exploitation of power transformers of 110 kV/MT in oil electro-insulating were recorded some passing disconnecting commanded by the gas protection at internal defects. In normal operation and in the optimal load, nominal currents do not require thermal secure contacts inside electrical transformers, contacts are made at the fabrication according to the projects or to repair by solder. In the case of external short circuits close to the substation, the contacts inside electrical transformers, even if they are well made in sizes of Rcontact = 10^‑6 Ω, are subjected to short-circuit currents of the order of 10 kA-20 kA which lead to the dissipation of some significant second-order electric powers, 100 W-400 W, on contact. At some internal or external factors which action on electrical contacts, including electrodynamic efforts at short-circuits, these factors could be degraded over time to values in the range of 10^-4 Ω to 10^-5 Ω and if the action time of protection is great, on the order of seconds, power dissipation on electrical contacts achieve high values of 1,0 kW to 40,0 kW. This power leads to strong local heating, hundreds of degrees Celsius and can initiate self-ignition and burning oil in the vicinity of electro-insulating contacts with action the gas relay. Degradation of electrical contacts inside power transformers may not be limited for the duration of their operation. In order to avoid oil burn with gas release near electrical contacts, at short-circuit currents 10 kA-20 kA, we have outlined the following solutions: covering electrical contacts in fireproof materials that would avoid direct burn oil at short circuit and transmission of heat from electrical contact along the conductors with heat dissipation gradually over time, in a large volume of cooling. Flame retardant materials are: polyurethane foam, mastic, cement (concrete). In the normal condition of operation of transformer, insulating of conductors coils is with paper and insulating oil. Ignition points of its two components respectively are approximated: 135 °C heat for oil and 200 ⁰C for paper. In the case of a faulty electrical contact, about 10^-3 Ω, at short-circuit; the temperature can reach for a short time, a value of 300 °C-400 °C, which ignite the paper and also the oil. By burning oil, there are local gases that disconnect the power transformer. Securing thermal electrical contacts inside the transformer, in cardboard tube with polyurethane foams, mastik or cement, ensures avoiding gas release and also gas protection working.

Keywords: Power transformer, oil insulatation, electric contacts, gases, gas relay.

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Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

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Fast delay estimation methods, as opposed to simulation techniques, are needed for incremental performance driven layout synthesis. On-chip inductive effects are becoming predominant in deep submicron interconnects due to increasing clock speed and circuit complexity. Inductance causes noise in signal waveforms, which can adversely affect the performance of the circuit and signal integrity. Several approaches have been put forward which consider the inductance for on-chip interconnect modelling. But for even much higher frequency, of the order of few GHz, the shunt dielectric lossy component has become comparable to that of other electrical parameters for high speed VLSI design. In order to cope up with this effect, on-chip interconnect has to be modelled as distributed RLCG line. Elmore delay based methods, although efficient, cannot accurately estimate the delay for RLCG interconnect line. In this paper, an accurate analytical delay model has been derived, based on first and second moments of RLCG interconnection lines. The proposed model considers both the effect of inductance and conductance matrices. We have performed the simulation in 0.18μm technology node and an error of as low as less as 5% has been achieved with the proposed model when compared to SPICE. The importance of the conductance matrices in interconnect modelling has also been discussed and it is shown that if G is neglected for interconnect line modelling, then it will result an delay error of as high as 6% when compared to SPICE.

Keywords: Delay Modelling; On-Chip Interconnect; RLCGInterconnect; Ramp Input; Damping; VLSI

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Authors: Juhi Faridi, Mohd. Ajmal Kafeel

Abstract:

The advancements in the field of Artificial Intelligence (AI) and technology has led to an evolution of an intelligent era. Neural networks, having the computational power and learning ability similar to the brain is one of the key AI technologies. Neuromorphic computing system (NCS) consists of the synaptic device, neuronal circuit, and neuromorphic architecture. Memristor are a promising candidate for neuromorphic computing systems, but when it comes to neuromorphic computing, the conductance behavior of the synaptic memristor or neuronal memristor needs to be studied thoroughly in order to fathom the neuroscience or computer science. Furthermore, there is a need of more simulation work for utilizing the existing device properties and providing guidance to the development of future devices for different performance requirements. Hence, development of NCS needs more simulation work to make use of existing device properties. This work aims to provide an insight to build neuronal circuits using memristors to achieve a Memristor based NCS.  Here we throw a light on the research conducted in the field of memristors for building analog and digital circuits in order to motivate the research in the field of NCS by building memristor based neural circuits for advanced AI applications. This literature is a step in the direction where we describe the various Key findings about memristors and its analog and digital circuits implemented over the years which can be further utilized in implementing the neuronal circuits in the NCS. This work aims to help the electronic circuit designers to understand how the research progressed in memristors and how these findings can be used in implementing the neuronal circuits meant for the recent progress in the NCS.

Keywords: Analog circuits, digital circuits, memristors, neuromorphic computing systems.

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Authors: N. Chegeni, M. J. Tahmasebi Birgani

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Nowadays, in most radiotherapy departments, the commercial treatment planning systems (TPS) used to calculate dose distributions needs to be verified; therefore, quick, easy-to-use and low cost dose distribution algorithms are desirable to test and verify the performance of the TPS. In this paper, we put forth an analytical method to calculate the phantom scatter contribution and depth dose on the central axis based on the equivalent square concept. Then, this method was generalized to calculate the profiles at any depth and for several field shapes regular or irregular fields under symmetry and asymmetry photon beam conditions. Varian 2100 C/D and Siemens Primus Plus Linacs with 6 and 18 MV photon beam were used for irradiations. Percentage depth doses (PDDs) were measured for a large number of square fields for both energies, and for 45^º wedges which were employed to obtain the profiles in any depth. To assess the accuracy of the calculated profiles, several profile measurements were carried out for some treatment fields. The calculated and measured profiles were compared by gamma-index calculation. All γ–index calculations were based on a 3% dose criterion and a 3 mm dose-to-agreement (DTA) acceptance criterion. The γ values were less than 1 at most points. However, the maximum γ observed was about 1.10 in the penumbra region in most fields and in the central area for the asymmetric fields. This analytical approach provides a generally quick and fairly accurate algorithm to calculate dose distribution for some treatment fields in conventional radiotherapy.

Keywords: Dose distribution, equivalent field, asymmetric field, irregular field.

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Authors: Seyed Saeid Tabaee, Omid Bahar

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Nowadays, energy dissipation devices are commonly used in structures. High rate of energy absorption during earthquakes is the benefit of using such devices, which results in damage reduction of structural elements, specifically columns. The hysteretic damping capacity of energy dissipation devices is the key point that it may adversely make analysis and design process complicated. This effect may be generally represented by Equivalent Viscous Damping (EVD). The equivalent viscous damping might be obtained from the expected hysteretic behavior regarding to the design or maximum considered displacement of a structure. In this paper, the hysteretic damping coefficient of a steel Moment Resisting Frame (MRF), which its performance is enhanced by a Buckling Restrained Brace (BRB) system has been evaluated. Having foresight of damping fraction between BRB and MRF is inevitable for seismic design procedures like Direct Displacement-Based Design (DDBD) method. This paper presents an approach to calculate the damping fraction for such systems by carrying out the dynamic nonlinear time history analysis (NTHA) under harmonic loading, which is tuned to the natural system frequency. Two MRF structures, one equipped with BRB and the other without BRB are simultaneously studied. Extensive analysis shows that proportion of each system damping fraction may be calculated by its shear story portion. In this way, contribution of each BRB in the floors and their general contribution in the structural performance may be clearly recognized, in advance.

Keywords: Buckling restrained brace, Direct displacement based design, Dual systems, Hysteretic damping, Moment resisting frames.

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Authors: Behzad Khademian, Mohammad Haeri

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In this paper, an effective sliding mode design is applied to chaos synchronization. The proposed controller can make the states of two identical modified Chua-s circuits globally asymptotically synchronized. Numerical results are provided to show the effectiveness and robustness of the proposed method.

Keywords: Sliding mode, Chaos synchronization, Modified Chua's circuit.

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Authors: M. N. Zelenin, V. S. Mikhailov, R. P. Zhivotovsky

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It is known that residual welding deformations give negative effect to processability and operational quality of welded structures, complicating their assembly and reducing strength. Therefore, selection of optimal technology, ensuring minimum welding deformations, is one of the main goals in developing a technology for manufacturing of welded structures. Through years, JSC SSTC has been developing a theory for estimation of welding deformations and practical activities for reducing and compensating such deformations during welding process. During long time a methodology was used, based on analytic dependence. This methodology allowed defining volumetric changes of metal due to welding heating and subsequent cooling. However, dependences for definition of structures deformations, arising as a result of volumetric changes of metal in the weld area, allowed performing calculations only for simple structures, such as units, flat sections and sections with small curvature. In case of complex 3D structures, estimations on the base of analytic dependences gave significant errors. To eliminate this shortage, it was suggested to use finite elements method for resolving of deformation problem. Here, one shall first calculate volumes of longitudinal and transversal shortenings of welding joints using method of analytic dependences and further, with obtained shortenings, calculate forces, which action is equivalent to the action of active welding stresses. Further, a finiteelements model of the structure is developed and equivalent forces are added to this model. Having results of calculations, an optimal sequence of assembly and welding is selected and special measures to reduce and compensate welding deformations are developed and taken.

Keywords: Finite elements method, modeling, expected welding deformations, welding, assembling.

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Authors: C. Matiz C., N. Olarte L., A. Rubiano F.

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This paper presents the design related to the electronic system design of the respiratory signal, including phases for processing, followed by the transmission and reception of this signal and finally display. The processing of this signal is added to the ECG and temperature sign, put up last year. Under this scheme is proposed that in future also be conditioned blood pressure signal under the same final printed circuit and worked.

Keywords: Conditioning, Respiratory Signal, Storage, Teleconsultation.

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Authors: Annamária Käferné Rácz, Bence Jáger, Balázs Kövesdi, László Dunai

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Due to the numerous advantages of steel corrugated web girders, its application field is growing for bridges as well as for buildings. The global stability behavior of such girders is significantly larger than those of conventional I-girders with flat web, thus the application of the structural steel material can be significantly reduced. Design codes and specifications do not provide clear and complete rules or recommendations for the determination of the lateral torsional buckling (LTB) resistance of corrugated web girders. Therefore, the authors made a thorough investigation regarding the LTB resistance of the corrugated web girders. Finite element (FE) simulations have been performed to develop new design formulas for the determination of the LTB resistance of trapezoidally corrugated web girders. FE model is developed considering geometrical and material nonlinear analysis using equivalent geometric imperfections (GMNI analysis). The equivalent geometric imperfections involve the initial geometric imperfections and residual stresses coming from rolling, welding and flame cutting. Imperfection sensitivity analysis was performed to determine the necessary magnitudes regarding only the first eigenmodes shape imperfections. By the help of the validated FE model, an extended parametric study is carried out to investigate the LTB resistance for different trapezoidal corrugation profiles. First, the critical moment of a specific girder was calculated by FE model. The critical moments from the FE calculations are compared to the previous analytical calculation proposals. Then, nonlinear analysis was carried out to determine the ultimate resistance. Due to the numerical investigations, new proposals are developed for the determination of the LTB resistance of trapezoidally corrugated web girders through a modification factor on the design method related to the conventional flat web girders.

Keywords: Critical moment, FE modeling, lateral torsional buckling, trapezoidally corrugated web girders.

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Authors: B. Sathyanandhi, P. M. Balasubramaniam

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This paper presents Buck-Boost converter topology to maintain the input power factor by using the power factor stage control and regulation stage control. Suppose, if we are using the RL load the power factor will be reduced due to the presence of total harmonic distortion in the current wave. To improve the power factor the current waveform should follow the fundamental component of the voltage waveform. These can be achieved by using the high -frequency power converter. Based on the resonant circuit the converter is able to perform the function of Buck, Boost, and buck-boost converter. Here ,we have used Buck-Boost converter, because, the buck-boost converter has more advantages than the boost converter. Here the switching action of the power converter can  take place by using the external zero comparator PFC stage control. The power converter consisting of the resonant  circuit which is used to control the output voltage gain of the converter. The power converter is operated at a very high switching frequency in the range of 400KHz in order to overcome the switching losses of the power converter. Due to  presence of high switching frequency, the power factor will improve. Therefore, the total harmonics distortion present in the current waveform has also reduced. These results has generated in the form of simulation by using MATLAB/SIMULINK software.  Similar to the Buck and Boost converters, the operation of the Buck-Boost has best understood, in terms of the inductor's "reluctance" for allowing rapid change in current, which also reduces the Total Harmonic Distortion (THD) in the input current waveform, which can improve the input Power factor, based on the type of load used.

Keywords: Buck-boost converter, High switching frequency, Power factor correction, power factor correction stage Regulation stage, Total harmonic distortion (THD).

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Authors: Cecília Reis, J. A. Tenreiro Machado, J. Boaventura Cunha

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This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. The experiments reveal superior results in terms of speed and convergence to achieve a solution.

Keywords: Circuit design, fractional-order systems, genetic algorithms, logic circuits.

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Authors: Dalibor Biolek, Viera Biolková, Zden─øk Kolka

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A universal current-mode biquad is described which represents an economical variant of well-known KHN (Kerwin, Huelsman, Newcomb) voltage-mode filter. The circuit consists of two multiple-output OTAs and of two grounded capacitors. Utilizing simple splitter of the input current and a pair of jumpers, all the basic 2nd-order transfer functions can be implemented. The principle is verified by Spice simulation on the level of a CMOS structure of OTAs.

Keywords: Biquad, current mode, OTA.

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Authors: Tarek M. Alguhane, Ayman H. Khalil, M. N. Fayed, Ayman M. Ismail

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This paper deals with different modeling aspects of masonry infill: no infill model, Layered shell infill model, and strut infill model. These models consider the complicated behavior of the in-filled plane frames under lateral load similar to an earthquake load. Three strut infill models are used: NBCC (2005) strut infill model, ASCE/SEI 41-06 strut infill model and proposed strut infill model based on modification to Canadian, NBCC (2005) strut infill model. Pushover and modal analyses of a masonry infill concrete frame with a single storey and an existing 5-storey RC building have been carried out by using different models for masonry infill. The corresponding hinge status, the value of base shear at target displacement as well as their dynamic characteristics have been determined and compared. A validation of the structural numerical models for the existing 5-storey RC building has been achieved by comparing the experimentally measured and the analytically estimated natural frequencies and their mode shapes. This study shows that ASCE/SEI 41-06 equation underestimates the values for the equivalent properties of the diagonal strut while Canadian, NBCC (2005) equation gives realistic values for the equivalent properties. The results indicate that both ASCE/SEI 41-06 and Canadian, NBCC (2005) equations for strut infill model give over estimated values for dynamic characteristic of the building. Proposed modification to Canadian, NBCC (2005) equation shows that the fundamental dynamic characteristic values of the building are nearly similar to the corresponding values using layered shell elements as well as measured field results.

Keywords: Masonry infill, framed structures, RC buildings, non-structural elements.

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Authors: Cecília Reis, J. A. Tenreiro Machado, J. Boaventura Cunha

Abstract:

This paper analyses the performance of a genetic algorithm using a new concept, namely a fractional-order dynamic fitness function, for the synthesis of combinational logic circuits. The experiments reveal superior results in terms of speed and convergence to achieve a solution.

Keywords: Circuit design, fractional-order systems, genetic algorithms, logic circuits

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Authors: Muhammad Yasir Wadood, Fatemeh Babaeian

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By developing ultra-wideband (UWB) systems, there is a high demand for UWB filters with low insertion loss, wide bandwidth, and having a planar structure which is compatible with other components of the UWB system. A microstrip interdigital filter is a great option for designing UWB filters. However, the presence of via holes in this structure creates difficulties in the fabrication procedure of the filter. Especially in the higher frequency band, any misalignment of the drilled via hole with the Microstrip stubs causes large errors in the measurement results compared to the desired results. Moreover, in this case (high-frequency designs), the line width of the stubs are very narrow, so highly precise small via holes are required to be implemented, which increases the cost of fabrication significantly. Also, in this case, there is a risk of having fabrication errors. To combat this issue, in this paper, a via-less UWB microstrip filter is proposed which is designed based on a modification of a conventional inter-digital bandpass filter. The novel approaches in this filter design are 1) replacement of each via hole with a quarter-wavelength open circuit stub to avoid the complexity of manufacturing, 2) using a bend structure to reduce the unwanted coupling effects and 3) minimising the size. Using the proposed structure, a UWB filter operating in the frequency band of 3.9-6.6 GHz (1-dB bandwidth) is designed and fabricated. The promising results of the simulation and measurement are presented in this paper. The selected substrate for these designs was Rogers RO4003 with a thickness of 20 mils. This is a common substrate in most of the industrial projects. The compact size of the proposed filter is highly beneficial for applications which require a very miniature size of hardware.

Keywords: Band-pass filters, inter-digital filter, microstrip, via-less.

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Authors: Padmanabhan Balasubramanian, Karthik Anantha

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Structural representation and technology mapping of a Boolean function is an important problem in the design of nonregenerative digital logic circuits (also called combinational logic circuits). Library aware function manipulation offers a solution to this problem. Compact multi-level representation of binary networks, based on simple circuit structures, such as AND-Inverter Graphs (AIG) [1] [5], NAND Graphs, OR-Inverter Graphs (OIG), AND-OR Graphs (AOG), AND-OR-Inverter Graphs (AOIG), AND-XORInverter Graphs, Reduced Boolean Circuits [8] does exist in literature. In this work, we discuss a novel and efficient graph realization for combinational logic circuits, represented using a NAND-NOR-Inverter Graph (NNIG), which is composed of only two-input NAND (NAND2), NOR (NOR2) and inverter (INV) cells. The networks are constructed on the basis of irredundant disjunctive and conjunctive normal forms, after factoring, comprising terms with minimum support. Construction of a NNIG for a non-regenerative function in normal form would be straightforward, whereas for the complementary phase, it would be developed by considering a virtual instance of the function. However, the choice of best NNIG for a given function would be based upon literal count, cell count and DAG node count of the implementation at the technology independent stage. In case of a tie, the final decision would be made after extracting the physical design parameters. We have considered AIG representation for reduced disjunctive normal form and the best of OIG/AOG/AOIG for the minimized conjunctive normal forms. This is necessitated due to the nature of certain functions, such as Achilles- heel functions. NNIGs are found to exhibit 3.97% lesser node count compared to AIGs and OIG/AOG/AOIGs; consume 23.74% and 10.79% lesser library cells than AIGs and OIG/AOG/AOIGs for the various samples considered. We compare the power efficiency and delay improvement achieved by optimal NNIGs over minimal AIGs and OIG/AOG/AOIGs for various case studies. In comparison with functionally equivalent, irredundant and compact AIGs, NNIGs report mean savings in power and delay of 43.71% and 25.85% respectively, after technology mapping with a 0.35 micron TSMC CMOS process. For a comparison with OIG/AOG/AOIGs, NNIGs demonstrate average savings in power and delay by 47.51% and 24.83%. With respect to device count needed for implementation with static CMOS logic style, NNIGs utilize 37.85% and 33.95% lesser transistors than their AIG and OIG/AOG/AOIG counterparts.

Keywords: AND-Inverter Graph, OR-Inverter Graph, DirectedAcyclic Graph, Low power design, Delay optimization.

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Authors: Karama M. AL-Tamimi, Munir A. Al-Absi

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A new OTA-based logarithmic-control variable gain current amplifier (LCCA) is presented. It consists of two Operational Transconductance Amplifier (OTA) and two PMOS transistors biased in weak inversion region. The circuit operates from 0.6V DC power supply and consumes 0.6 μW. The linear-dB controllable output range is 43 dB with maximum error less than 0.5dB. The functionality of the proposed design was confirmed using HSPICE in 0.35μm CMOS process technology.

Keywords: LCCA, OTA, Logarithmic, VGA, Weak inversion, Current-mode

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Authors: ER. Yashpaul Singh, A. Swarup

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This research paper evaluates and compares the performance of equal cost adaptive multi-path routing algorithms taking the transport protocols TCP (Transmission Control Protocol) and UDP (User Datagram Protocol) using network simulator ns2 and concludes which one is better.

Keywords: Multi-path routing algorithm, Datagram, Virtual Circuit, Throughput, Network services.

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Authors: N. Kumaresan , J. Kavikumar, Kuru Ratnavelu

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In this paper, solution of fuzzy differential equation under general differentiability is obtained by simulink. The simulink solution is equivalent or very close to the exact solution of the problem. Accuracy of the simulink solution to this problem is qualitatively better. An illustrative numerical example is presented for the proposed method.

Keywords: Fuzzy differential equation, Generalized differentiability, H-difference and Simulink.

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Authors: T. Abdelkrim, K. Ben seddik, B. Bezza, K. Benamrane, Aeh. Benkhelifa

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This paper proposes an implementation of boost converter for a resistive load using photovoltaic energy as a source. The model of photovoltaic cell and operating principle of boost converter are presented. A PIC microcontroller is used in the close loop control to generate pulses for controlling the converter circuit. To performance evaluation of boost converter, a variation of output voltage of PV panel is done by shading one and two cells.

Keywords: Boost converter, Microcontroller, Photovoltaic power generation, Shading cells.

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Authors: Nasser Ghassembaglou, Armin Rahmatfam, Faramarz Ranjbar

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Using cold EGR method with variable venturi and turbocharger has a very significant effect on reduction of NOX and grime simultaneously. EGR cooler is one of the most important parts in the cold EGR circuit. In this paper optimum design of cooler for working in different percentages of EGR and for determining optimum temperature of exhausted gases, growth of efficiency, reduction of weight, dimension, expenditures, sediment and also optimum performance by using gasoil which has significant amounts of brimstone are investigated and optimized.

Keywords: Cold EGR, NOX, Cooler.

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Authors: M. Lenzhofer, D. Holzmann, A. Tortschanoff

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In this paper we present a new multichannel high voltage driver box to connect up to six MOEMS mirror devices to it that have resonant and also quasistatically driven actuating electrodes. It is possible to drive all resonant axes synchronously while the amplitude of them can individually be controlled by separate microcontrollers that also operate the quasistatic axes. Circuit simulations are compared with the measurements done on the real system and also show the robust driving performance of a MOEMS mirror.

Keywords: MOEMS, scanner mirror, electrostatic driver.

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Authors: Shashank Gautam, Pramod Sharma

Abstract:

In present era, development of digital circuits, signal processors and other integrated circuits, magnitude comparators are challenged by large area and more power consumption. Comparator is most basic circuit that performs comparison. This paper presents a technique to design a two bit comparator which consumes less area and power. DSCH and MICROWIND version 3 are used to design the schematic and design the layout of the schematic, observe the performance parameters at different nanometer technologies respectively.

Keywords: Chip design, consumed power, layout area, two bit comparator.

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Authors: S. Ben Said, K. Ben Saad, M. Benrejeb

Abstract:

This paper deals with bifurcation analyses in current programmed DC/DC Boost converter and exhibition of chaotic behavior. This phenomenon occurs due to variation of a set of the studied circuit parameters (input voltage and a reference current). Two different types of bifurcation paths have been observed as part as part of another bifurcation arising from variation of suitable chosen parameter.

Keywords: Bifurcation, Chaos, Boost converter, Current- programmed control, Initial parameters.

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Authors: Gianluca Cornetta, David J. Santos, Balwant Godara

Abstract:

A 1.2 V, 0.61 mA bias current, low noise amplifier (LNA) suitable for low-power applications in the 2.4 GHz band is presented. Circuit has been implemented, laid out and simulated using a UMC 130 nm RF-CMOS process. The amplifier provides a 13.3 dB power gain a noise figure NF< 2.28 dB and a 1-dB compression point of -15.69 dBm, while dissipating 0.74 mW. Such performance make this design suitable for wireless sensor networks applications such as ZigBee.

Keywords: Current Reuse, IEEE 802.15.4 (ZigBee), Low NoiseAmplifiers, Wireless Sensor Networks.

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Authors: Mahdi Ebrahimzadeh

Abstract:

In this paper we introduce an ultra low power CMOS LC oscillator and analyze a method to design a low power low phase noise complementary CMOS LC oscillator. A 1.8GHz oscillator is designed based on this analysis. The circuit has power supply equal to 1.1 V and dissipates 0.17 mW power. The oscillator is also optimized for low phase noise behavior. The oscillator phase noise is -126.2 dBc/Hz and -144.4 dBc/Hz at 1 MHz and 8 MHz offset respectively.

Keywords: LC oscillator, Low Power, Low Phase Noise

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