Search results for: Short circuit currents

Authors: Hossein Ramezani Ali-Akbari

Abstract:

This paper presents an innovative method to control the rotational speed of a satellite solar panel during its deployment phase. A brushed DC motor has been utilized in the passive spring driven deployment mechanism to reduce the deployment speed. In order to use the DC motor as a damper, its connector terminals have been connected with an external resistance in a closed circuit. It means that, in this approach, there is no external power supply in the circuit. The working principle of this method is based on the back electromotive force (or back EMF) of the DC motor when an external torque (here the torque produced by the torsional springs) is coupled to the DC motor’s shaft. In fact, the DC motor converts to an electric generator and the current flows into the circuit and then produces the back EMF. Based on Lenz’s law, the generated current produced a torque which acts opposite to the applied external torque, and as a result, the deployment speed of the solar panel decreases. The main advantage of this method is to set an intended damping coefficient to the system via changing the external resistance. To produce the sufficient current, a gearbox has been assembled to the DC motor which magnifies the number of turns experienced by the DC motor. The coupled electro-mechanical equations of the system have been derived and solved, then, the obtained results have been presented. A full-scale prototype of the deployment mechanism has been built and tested. The potential application of brushed DC motors as a rotational speed damper has been successfully demonstrated.

Keywords: Back electromotive force, brushed DC motor, rotational speed damper, satellite solar panel deployment mechanism.

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Authors: Nora Taghavi, Ali Sadr

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System identification is the process of creating models of dynamic process from input- output signals. The aim of system identification can be identified as “ to find a model with adjustable parameters and then to adjust them so that the predicted output matches the measured output". This paper presents a method of modeling and simulating with system identification to achieve the maximum fitness for transformation function. First by using optimized KLM equivalent circuit for PVDF piezoelectric transducer and assuming different inputs including: sinuside, step and sum of sinusides, get the outputs, then by using system identification toolbox in MATLAB, we estimate the transformation function from inputs and outputs resulted in last program. Then compare the fitness of transformation function resulted from using ARX,OE(Output- Error) and BJ(Box-Jenkins) models in system identification toolbox and primary transformation function form KLM equivalent circuit.

Keywords: PVDF modeling, ARX, BJ(Box-Jenkins), OE(Output-Error), System Identification.

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Authors: Yeon-kug Moon, Kang-Yoon Lee, Yun-Jae Won, Seung-Ok Lim

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This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2.

Keywords: component ; Channel selection filters, DC offset, programmable gain amplifier, tuning circuit

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Authors: B. Nasri, M. Bensaada

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We present a simulation and realization of a battery charge regulator (BCR) in microsatellite earth observation. The tests were performed on battery pack 12volt, capacity 24Ah and the solar array open circuit voltage of 100 volt and optimum power of about 250 watt. The battery charge is made by solar module. The principle is to adapt the output voltage of the solar module to the battery by using the technique of pulse width modulation (PWM). Among the different techniques of charge battery, we opted for the technique of the controller ON/OFF is a standard technique and simple, it-s easy to be board executed validation will be made by simulation "Proteus Isis Professional software ". The circuit and the program of this prototype are based on the PIC16F877 microcontroller, a serial interface connecting a PC is also realized, to view and save data and graphics in real time, for visualization of data and graphs we develop an interface tool “visual basic.net (VB)--.

Keywords: Battery Charge Regulator, Batteries, Buck converter, Power System, Power Conditioning, Power Distribution, Solar arrays.

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Authors: Hisham Md Suhadi, Faaizah Shahbodin, Jamaluddin Hashim

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The study is the way to identify the problems that occur in organizing short course’s lifelong learning in the information and communication technology (ICT) education which are faced by the lecturer and staff at the Mara Skill Institute and Industrial Training Institute in Pahang Malaysia. The important aspects of these issues are classified to five which are selecting the courses administrative. Fifty lecturers and staff were selected as a respondent. The sample is selected by using the non-random sampling method purpose sampling. The questionnaire is used as a research instrument and divided into five main parts. All the data that gain from the questionnaire are analyzed by using the SPSS in term of mean, standard deviation and percentage. The findings showed, there are the problems occur in organizing the short course for lifelong learning in ICT education.

Keywords: Lifelong education, information and communication technology (ICT), short course, ICT education, courses administrative.

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Authors: Sheroz Khan, A. H. M. Zahirul Alam, Othman O. Khalifa, Mohd Rafiqul Islam, Zuraidah Zainudin, Muzna S. Khan, Nurul Iman Muhamad Pauzi

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The study of soil for agriculture purposes has remained the main focus of research since the beginning of civilization as humans- food related requirements remained closely linked with the soil. The study of soil has generated an interest among the researchers for very similar other reasons including transmission, reflection and refraction of signals for deploying wireless underground sensor networks or for the monitoring of objects on (or in ) soil in the form of better understanding of soil electromagnetic characteristics properties. The moisture content has been very instrumental in such studies as it decides on the resistance of the soil, and hence the attenuation on signals traveling through soil or the attenuation the signals may suffer upon their impact on soil. This work is related testing and characterizing a measurement circuit meant for the detection of moisture level content in soil.

Keywords: Analog–digital Conversion, Bridge Circuits, Intelligent sensors, Pulse Time Modulation, Relaxation Oscillator

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Authors: Azam Beg, P. W. Chandana Prasad, S.M.N.A Senenayake

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When binary decision diagrams are formed from uniformly distributed Monte Carlo data for a large number of variables, the complexity of the decision diagrams exhibits a predictable relationship to the number of variables and minterms. In the present work, a neural network model has been used to analyze the pattern of shortest path length for larger number of Monte Carlo data points. The neural model shows a strong descriptive power for the ISCAS benchmark data with an RMS error of 0.102 for the shortest path length complexity. Therefore, the model can be considered as a method of predicting path length complexities; this is expected to lead to minimum time complexity of very large-scale integrated circuitries and related computer-aided design tools that use binary decision diagrams.

Keywords: Monte Carlo circuit simulation data, binary decision diagrams, neural network modeling, shortest path length estimation

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Authors: V. Suresh Babu, Haseena P. S., Varun P. Gopi, M. R. Baiju

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In this paper a scheme is proposed for generating a programmable current reference which can be implemented in the CMOS technology. The current can be varied over a wide range by changing an external voltage applied to one of the control gates of FGMOS (Floating Gate MOSFET). For a range of supply voltages and temperature, CMOS current reference is found to be dependent, this dependence is compensated by subtracting two current outputs with the same dependencies on the supply voltage and temperature. The system performance is found to improve with the use of FGMOS. Mathematical analysis of the proposed circuit is done to establish supply voltage and temperature independence. Simulation and performance evaluation of the proposed current reference circuit is done using TANNER EDA Tools. The current reference shows the supply and temperature dependencies of 520 ppm/V and 312 ppm/oC, respectively. The proposed current reference can operate down to 0.9 V supply.

Keywords: Floating Gate MOSFET, current reference, self bias scheme, temperature independency, supply voltage independency.

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Authors: Mawahib Gafare Abdalrahman Ahmed, Abdallah Belal Adam, John Ojur Dennis

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Air bubbles have been detected in human circulation of end-stage renal disease patients who are treated by hemodialysis. The consequence of air embolism, air bubbles, is under recognized and usually overlooked in daily practice. This paper shows results of a capacitor based detection method that capable of detecting the presence of air bubbles in the blood stream in different frequencies. The method is based on a parallel plates capacitor made of platinum with an area of 1.5 cm2 and a distance between the two plates is 1cm. The dielectric material used in this capacitor is Dextran70 solution which mimics blood rheology. Simulations were carried out using RC circuit at two frequencies 30Hz and 3 kHz and results compared with experiments and theory. It is observed that by injecting air bubbles of different diameters into the device, there were significant changes in the capacitance of the capacitor. Furthermore, it is observed that the output voltage from the circuit increased with increasing air bubble diameter. These results demonstrate the feasibility of this approach in improving air bubble detection in Hemodialysis.

Keywords: Air bubbles, Hemodialysis, Capacitor, Dextran70, Air bubbles diameters.

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Authors: Aye Sandar Win

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This paper demonstrates design and construction of microcontroller-based telephone exchange system and the aims of this paper is to study telecommunication, connection with PIC16F877A and DTMF MT8870D. In microcontroller system, PIC 16F877 microcontroller is used to control the call processing. Dial tone, busy tone and ring tone are provided during call progress. Instead of using ready made tone generator IC, oscillator based tone generator is used. The results of this telephone exchange system are perfect for homes and small businesses needing the extensions. It requires the phone operation control system, the analog interface circuit and the switching circuit. This exchange design will contain eight channels. It is the best low cost, good quality telephone exchange for today-s telecommunication needs. It offers the features available in much more expensive PBX units without using high-priced phones. It is for long distance telephone services.

Keywords: Control software, DTMF receiver and decoder, hooksensing, microcontroller system, power supply, ring generator andoscillator based tone generator.

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Authors: Görkem Arslan Kılınç

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Due to the high construction, operation, and maintenance costs of tall buildings, quantification of the area in the plan layout which provides a financial return is an important design criterion. The area of the “core and the structural system elements” does not provide financial return but must exist in the plan layout. Some characteristic items of tall office buildings affect the size of these areas. From this point of view, 15 tall office buildings were systematically investigated. The typical office floor plans of these buildings were re-produced digitally. The area of the “core and the structural system elements” in each building and the characteristic items of each building were calculated. These characteristic items are the size of the long and short plan edge, plan length/width ratio, size of the core long and short edge, core length/width ratio, core area, slenderness, building height, number of floors, and floor height. These items were analyzed by correlation and regression analyses. Results of this paper put forward that; characteristic items which affect the area of "core and structural system elements" are plan long and short edge size, core short edge size, building height, and the number of floors. A one-unit increase in plan short side size increases the area of the "core and structural system elements" in the plan by 12,378 m2. An increase in core short edge size increases the area of the core and structural system elements in the plan by 25,650 m2. Subsequent studies can be conducted by expanding the sample of the study and considering the geographical location of the building.

Keywords: Core area, correlation analysis, floor area, regression analysis, space efficiency, tall office buildings.

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Authors: M.Hosseinghadiry, H. Mohammadi, M.Nadisenejani

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with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Keywords: Full adder, XNOR, Low power, High performance, Very Large Scale Integrated Circuit.

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Authors: Vinod Kumar Khera, R. K. Sharma, A. K. Gupta

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Power dissipation increases exponentially during test mode as compared to normal operation of the circuit. In extreme cases, test power is more than twice the power consumed during normal operation mode. Test vector generation scheme is key component in deciding the power hungriness of a circuit during testing. Test vector count and consequent leakage current are functions of test vector generation scheme. Fault based test vector count optimization has been presented in this work. It helps in reducing test vector count and the leakage current. In the presented scheme, test vectors have been reduced by extracting essential child vectors. The scheme has been tested experimentally using stuck at fault models and results ensure the reduction in test vector count.

Keywords: Low power VLSI testing, independent fault, essential faults, test vector reduction.

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Authors: Guang Sun, Yong Li, Yuanyuan Zhang, Shijun Lin, Li Su, Depeng Jin, Lieguang zeng

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Network on Chip (NoC) has emerged as a promising on chip communication infrastructure. Three Dimensional Integrate Circuit (3D IC) provides small interconnection length between layers and the interconnect scalability in the third dimension, which can further improve the performance of NoC. Therefore, in this paper, a hierarchical cluster-based interconnect architecture is merged with the 3D IC. This interconnect architecture significantly reduces the number of long wires. Since this architecture only has approximately a quarter of routers in 3D mesh-based architecture, the average number of hops is smaller, which leads to lower latency and higher throughput. Moreover, smaller number of routers decreases the area overhead. Meanwhile, some dual links are inserted into the bottlenecks of communication to improve the performance of NoC. Simulation results demonstrate our theoretical analysis and show the advantages of our proposed architecture in latency, throughput and area, when compared with 3D mesh-based architecture.

Keywords: Network on Chip (NoC), interconnect architecture, performance, area, Three Dimensional Integrate Circuit (3D IC).

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Authors: Ioannis Binas, Marios Moschakis

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Electrical faults in transmission and distribution networks can have great impact on the electrical equipment used. Fault effects depend on the characteristics of the fault as well as the network itself. It is important to anticipate the network’s behavior during faults when planning a new equipment installation, as well as troubleshooting. Moreover, working backwards, we could be able to estimate the characteristics of the fault when checking the perceived effects. Different transformer winding connections dominantly used in the Greek power transfer and distribution networks and the effects of 1-phase to neutral, phase-to-phase, 2-phases to neutral and 3-phase faults on different locations of the network were simulated in order to present voltage sag characteristics. The study was performed on a generic network with three steps down transformers on two voltage level buses (one 150 kV/20 kV transformer and two 20 kV/0.4 kV). We found that during faults, there are significant changes both on voltage magnitudes and on phase angles. The simulations and short-circuit analysis were performed using the PSCAD simulation package. This paper presents voltage characteristics calculated for the simulated network, with different approaches on the transformer winding connections during symmetrical and asymmetrical faults on various locations.

Keywords: Phase angle shift, power quality, transformer winding connections, voltage sag propagation.

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Authors: Fatemeh Karimi, Morteza Fathipour, Hamdam Ghanatian, Vala Fathipour

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In this paper we investigate the electrical characteristics of a new structure of gate all around strained silicon nanowire field effect transistors (FETs) with dual dielectrics by changing the radius (RSiGe) of silicon-germanium (SiGe) wire and gate dielectric. Indeed the effect of high-κ dielectric on Field Induced Barrier Lowering (FIBL) has been studied. Due to the higher electron mobility in tensile strained silicon, the n-type FETs with strained silicon channel have better drain current compare with the pure Si one. In this structure gate dielectric divided in two parts, we have used high-κ dielectric near the source and low-κ dielectric near the drain to reduce the short channel effects. By this structure short channel effects such as FIBL will be reduced indeed by increasing the RSiGe, ID-VD characteristics will be improved. The leakage current and transfer characteristics, the threshold-voltage (Vt), the drain induced barrier height lowering (DIBL), are estimated with respect to, gate bias (VG), RSiGe and different gate dielectrics. For short channel effects, such as DIBL, gate all around strained silicon nanowire FET have similar characteristics with the pure Si one while dual dielectrics can improve short channel effects in this structure.

Keywords: SNWT (silicon nanowire transistor), Tensile Strain, high-κ dielectric, Field Induced Barrier Lowering (FIBL), cylindricalnano wire (CW), drain induced barrier lowering (DIBL).

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Authors: Adamu Mudi, Fawole Wahab Ibrahim, Abubakar Abba Kolo

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In this paper, we present a microcontroller-based liquid level controller which identifies the various levels of a liquid, carries out certain actions and is capable of communicating with the human being and other devices through the GSM network. This project is useful in ensuring that a liquid is not wasted. It also contributes to the internet of things paradigm, which is the future of the internet. The method used in this work includes designing the circuit and simulating it. The circuit is then implemented on a solderless breadboard after which it is implemented on a strip board. A C++ computer program is developed and uploaded into the microcontroller. This program instructs the microcontroller on how to carry out its actions. In other to determine levels of the liquid, an ultrasonic wave is sent to the surface of the liquid similar to radar or the method for detecting the level of sea bed. Message is sent to the phone of the user similar to the way computers send messages to phones of GSM users. It is concluded that the routine of observing the levels of a liquid in a tank, refilling the tank when the liquid level is too low can be entirely handled by a programmable device without wastage of the liquid or bothering a human being with such tasks.

Keywords: Arduino Uno, HC-SR04 ultrasonic sensor, Internet of Things, IoT, SIM900 GSM Module.

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Authors: G. S. Ayyappan, Srinivas Kota, Jaffer R. C. Sheriff, C. Prakash Chandra Joshua

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In the present scenario of energy crises, energy conservation in the electrical machines is very important in the industries. In order to conserve energy, one needs to monitor the performance of an induction motor on-site and in-situ. The instruments available for this purpose are very meager and very expensive. This paper deals with the design and development of induction motor performance analyser on-line, on-site, and in-situ. The system measures only few electrical input parameters like input voltage, line current, power factor, frequency, powers, and motor shaft speed. These measured data are coupled to name plate details and compute the operating efficiency of induction motor. This system employs the method of computing motor losses with the help of equivalent circuit parameters. The equivalent circuit parameters of the concerned motor are estimated using the developed algorithm at any load conditions and stored in the system memory. The developed instrument is a reliable, accurate, compact, rugged, and cost-effective one. This portable instrument could be used as a handy tool to study the performance of both slip ring and cage induction motors. During the analysis, the data can be stored in SD Memory card and one can perform various analyses like load vs. efficiency, torque vs. speed characteristics, etc. With the help of the developed instrument, one can operate the motor around its Best Operating Point (BOP). Continuous monitoring of the motor efficiency could lead to Life Cycle Assessment (LCA) of motors. LCA helps in taking decisions on motor replacement or retaining or refurbishment.

Keywords: Energy conservation, equivalent circuit parameters, induction motor efficiency, life cycle assessment, motor performance analysis.

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Authors: M. M. Hlakola, E. Golovins, D. V. Nicolae

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The field of instrumentation electronics is undergoing an explosive growth, due to its wide range of applications. The proliferation of electrical devices in a close working proximity can negatively influence each other’s performance. The degradation in the performance is due to electromagnetic interference (EMI). This paper investigates the negative effects of electromagnetic interference originating in the General Purpose Interface Bus (GPIB) control-network of the AC-DC transfer measurement system. Remedial measures of reducing measurement errors and failure of range of industrial devices due to EMI have been explored. The ACDC transfer measurement system was analysed for the commonmode (CM) EMI effects. Further investigation of coupling path as well as much accurate identification of noise propagation mechanism has been outlined. To prevent the occurrence of common-mode (ground loops) which was identified between the GPIB system control circuit and the measurement circuit, a microcontroller-driven GPIB switching isolator device was designed, prototyped, programmed and validated. This mitigation technique has been explored to reduce EMI effectively.

Keywords: CM, EMI, GPIB, ground loops.

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Authors: Halil Fidan

Abstract:

In this work, the autoregressive vectors are used to know dynamics of the Agricultural export and import, and the real effective exchange rate (REER). In order to analyze the interactions, the impulse- response function is used in decomposition of variance, causality of Granger as well as the methodology of Johansen to know the relations co integration. The REER causes agricultural export and import in the sense of Granger. The influence displays the innovations of the REER on the agricultural export and import is not very great and the duration of the effects is short. It displays that REER has an immediate positive effect, after the tenth year it displays smooth results on the agricultural export. Evidence of a vector exists co integration, In short run, REER has smaller effects on export and import, compared to the long-run effects.

Keywords: Agricultural import, agricultural export, autoregressive causality of granger, impulse-response function, long run, short run.

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Authors: W. Swiderski

Abstract:

Composite materials are one answer to the growing demand for materials with better parameters of construction and exploitation. Composite materials also permit conscious shaping of desirable properties to increase the extent of reach in the case of metals, ceramics or polymers. In recent years, composite materials have been used widely in aerospace, energy, transportation, medicine, etc. Fiber-reinforced composites including carbon fiber, glass fiber and aramid fiber have become a major structural material. The typical defect during manufacture and operation is delamination damage of layered composites. When delamination damage of the composites spreads, it may lead to a composite fracture. One of the many methods used in non-destructive testing of composites is active infrared thermography. In active thermography, it is necessary to deliver energy to the examined sample in order to obtain significant temperature differences indicating the presence of subsurface anomalies. To detect possible defects in composite materials, different methods of thermal stimulation can be applied to the tested material, these include heating lamps, lasers, eddy currents, microwaves or ultrasounds. The use of a suitable source of thermal stimulation on the test material can have a decisive influence on the detection or failure to detect defects. Samples of multilayer structure carbon composites were prepared with deliberately introduced defects for comparative purposes. Very thin defects of different sizes and shapes made of Teflon or copper having a thickness of 0.1 mm were screened. Non-destructive testing was carried out using the following sources of thermal stimulation, heating lamp, flash lamp, ultrasound and eddy currents. The results are reported in the paper.

Keywords: Non-destructive testing, IR thermography, composite material, thermal stimulation.

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Authors: Eduardo P. Wiechmann, Jorge A. Henríquez, Pablo E. Aqueveque, Luis G. Muñoz

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PV energy prices are declining rapidly. To take advantage of the benefits of those prices and lower the carbon footprint, operational practices must be modified. Undoubtedly, it challenges the electrowinning practice to operate at constant current throughout the day. This work presents a technology that contributes in providing modulation capacity to the electrode current distribution system. This is to raise the day time dc current and lower it at night. The system is a triple intercell bar that operates in current-source mode. The design is a capping board free dogbone type of bar that ensures an operation free of short circuits, hot swapability repairs and improved current balance. This current-source system eliminates the resetting currents circulating in equipotential bars. Twin auxiliary connectors are added to the main connectors providing secure current paths to bypass faulty or impaired contacts. All system conductive elements are positioned over a baseboard offering a large heat sink area to the ventilation of a facility. The system works with lower temperature than a conventional busbar. Of these attributes, the cathode current balance property stands out and is paramount for day/night modulation and the use of photovoltaic energy. A design based on a 3D finite element method model predicting electric and thermal performance under various industrial scenarios is presented. Preliminary results obtained in an electrowinning facility with industrial prototypes are included.

Keywords: Electrowinning, intercell bars, PV energy, current modulation.

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Authors: Valentina Koliskina

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Change in impedance of an encircling coil is obtained in the present paper for the case where the electric conductivity and magnetic permeability of a metal cylindrical tube depend on the radial coordinate. The system of equations for the vector potential is solved by means of the Fourier cosine transform. The solution is expressed in terms of improper integral containing modified Bessel functions of complex order.

Keywords: Eddy currents, magnetic permeability, Besselfunctions

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

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According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: Radosveta Sokullu, Engin Karatepe

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In the last couple of years Bluetooth has gained a large share in the market of home and personal appliances. It is now a well established technology a short range supplement to the wireless world of 802.11. The two main trends of research that have sprung from these developments are directed towards the coexistence and performance issues of Bluetooth and 802.11 as well as the co-existence in the very short range of multiple Bluetooth devices. Our work aims at thoroughly investigating different aspects of co-channel interference and effects of transmission power, distance and 802.11 interference on Bluetooth connections.

Keywords: Bluetooth, co-channel interference, 802.11, performance analysis

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Authors: Moorthi S., Meganathan D., Janarthanan D., Praveen Kumar P., J. Raja paul perinbam

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An efficient architecture for low jitter All Digital Phase Locked Loop (ADPLL) suitable for high speed SoC applications is presented in this paper. The ADPLL is designed using standard cells and described by Hardware Description Language (HDL). The ADPLL implemented in a 90 nm CMOS process can operate from 10 to 200 MHz and achieve worst case frequency acquisition in 14 reference clock cycles. The simulation result shows that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps at 100MHz. Since the digitally controlled oscillator (DCO) can achieve both high resolution and wide frequency range, it can meet the demands of system-level integration. The proposed ADPLL can easily be ported to different processes in a short time. Thus, it can reduce the design time and design complexity of the ADPLL, making it very suitable for System-on-Chip (SoC) applications.

Keywords: All Digital Phase Locked Loop (ADPLL), Systemon-Chip (SoC), Phase Locked Loop (PLL), Very High speedIntegrated Circuit (VHSIC) Hardware Description Language(VHDL), Digitally Controlled Oscillator (DCO), Phase frequencydetector (PFD) and Voltage Controlled Oscillator (VCO).

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

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Evolvable hardware (EHW) refers to a selfreconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). A lot of research has been done in this area several different EA have been introduced. Every time a specific EA is chosen for solving a particular problem, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade a lot of research has been carried out in order to identify the best parameters for the EA-s components for different “test-problems". However different researchers propose different solutions. In this paper the behaviour of mutation rate on (1+λ) evolution strategy (ES) for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies values of the logic cell inputs, the cell type (for example from AND to NOR) and the circuit output. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates used for the evolved circuits. The experimental results found provide the behaviour of the mutation rate to be used during evolution for the design and optimization of logic circuits. The researches on the best mutation rate during the last 40 years are also summarized.

Keywords: Evolvable hardware, mutation rate, evolutionarycomputation, design of logic circuit.

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Authors: Sui Xin, Li Chunsheng, Tian Di

Abstract:

Short message integrated distributed monitoring systems (SM-DMS) are growing rapidly in wireless communication applications in various areas, such as electromagnetic field (EMF) management, wastewater monitoring, and air pollution supervision, etc. However, delay in short messages often makes the data embedded in SM-DMS transmit unreliably. Moreover, there are few regulations dealing with this problem in SMS transmission protocols. In this study, based on the analysis of the command and data requirements in the SM-DMS, we developed a processing model for the control center to solve the delay problem in data transmission. Three components of the model: the data transmission protocol, the receiving buffer pool method, and the timer mechanism were described in detail. Discussions on adjusting the threshold parameter in the timer mechanism were presented for the adaptive performance during the runtime of the SM-DMS. This model optimized the data transmission reliability in SM-DMS, and provided a supplement to the data transmission reliability protocols at the application level.

Keywords: Delay, SMS, reliability, distributed monitoringsystem (DMS), wireless communication.

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Authors: Yue-Der Lin, Ya-Hsueh Chien, Yen-Ting Lin, Shih-Fan Wang, Cheng-Lun Tsai, Ching-Che Tsai

Abstract:

Capacitive electrocardiogram (ECG) measurement is an attractive approach for long-term health monitoring. However, there is little literature available on its implementation, especially for multichannel system in standard ECG leads. This paper begins from the design criteria for capacitive ECG measurement and presents a multichannel limb-lead capacitive ECG system with conductive fabric tapes pasted on a double layer PCB as the capacitive sensors. The proposed prototype system incorporates a capacitive driven-body (CDB) circuit to reduce the common-mode power-line interference (PLI). The presented prototype system has been verified to be stable by theoretic analysis and practical long-term experiments. The signal quality is competitive to that acquired by commercial ECG machines. The feasible size and distance of capacitive sensor have also been evaluated by a series of tests. From the test results, it is suggested to be greater than 60 cm2 in sensor size and be smaller than 1.5 mm in distance for capacitive ECG measurement.

Keywords: capacitive driven-body (CDB) circuit, capacitive electrocardiogram (ECG) measurement, capacitive sensor, conductive fabric tape, power-line interference (PLI).

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Authors: Faris Tarlochan, Siva Mahesh Tangutooru

Abstract:

Lateral Geniculate Nucleus (LGN) is the relay center in the visual pathway as it receives most of the input information from retinal ganglion cells (RGC) and sends to visual cortex. Low threshold calcium currents (IT) at the membrane are the unique indicator to characterize this firing functionality of the LGN neurons gained by the RGC input. According to the LGN functional requirements such as functional mapping of RGC to LGN, the morphologies of the LGN neurons were developed. During the neurological disorders like glaucoma, the mapping between RGC and LGN is disconnected and hence stimulating LGN electrically using deep brain electrodes can restore the functionalities of LGN. A computational model was developed for simulating the LGN neurons with three predominant morphologies each representing different functional mapping of RGC to LGN. The firings of action potentials at LGN neuron due to IT were characterized by varying the stimulation parameters, morphological parameters and orientation. A wide range of stimulation parameters (stimulus amplitude, duration and frequency) represents the various strengths of the electrical stimulation with different morphological parameters (soma size, dendrites size and structure). The orientation (0-1800) of LGN neuron with respect to the stimulating electrode represents the angle at which the extracellular deep brain stimulation towards LGN neuron is performed. A reduced dendrite structure was used in the model using Bush–Sejnowski algorithm to decrease the computational time while conserving its input resistance and total surface area. The major finding is that an input potential of 0.4 V is required to produce the action potential in the LGN neuron which is placed at 100 μm distance from the electrode. From this study, it can be concluded that the neuroprostheses under design would need to consider the capability of inducing at least 0.4V to produce action potentials in LGN.

Keywords: Lateral geniculate nucleus, visual cortex, finite element, glaucoma, neuroprostheses.

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