Search results for: SCR (Silicon Controlled Rectifier)

Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo

Abstract:

In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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Authors: Yong Seo Koo, Jong Ho Nam, Yong Nam Choi, Dae Yeol Yoo, Jung Woo Han

Abstract:

This paper presents a silicon controller rectifier (SCR) based ESD protection circuit for IC. The proposed ESD protection circuit has low trigger voltage and high holding voltage compared with conventional SCR ESD protection circuit. Electrical characteristics of the proposed ESD protection circuit are simulated and analyzed using TCAD simulator. The proposed ESD protection circuit verified effective low voltage ESD characteristics with low trigger voltage and high holding voltage.

Keywords: ESD (Electro-Static Discharge), SCR (Silicon Controlled Rectifier), holding Voltage.

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Authors: P. Nammalvar, P. Meganathan

Abstract:

This paper presents a hybrid three phase rectifier for high power factor application. This rectifier is composed by zero voltage transition (ZVT) and zero current transition (ZCT) boost converter with three phase diode bridge rectifier, in parallel with a six pulse three phase pulse width modulation (PWM) controlled rectifier. The proposed topology is capable of high power factor with DC output voltage regulation by providing sinusoidal input. Also, it increases the overall efficiency of the new hybrid rectifier to 94.56% and the total harmonic distortion of the hybrid structure varies from 0% to 16% at nominal output power. This topology was simulated in MATLAB/SIMULINK environment and the output waveforms presented with experimental result.

Keywords: Hybrid Rectifier, Total Harmonic Distortion, Power Quality, Pulse Width Modulation (PWM), Unidirectional Rectifier.

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Authors: Lei Yao, Jia Hao Cheong, Rui-Feng Xue, Minkyu Je

Abstract:

A closed-loop controlled wireless power transmission circuit block for implantable biomedical applications is described in this paper. The circuit consists of one front-end rectifier, power management sub-block including bandgap reference and low drop-out regulators (LDOs) as well as transmission power detection / feedback circuits. Simulation result shows that the front-end rectifier achieves 80% power efficiency with 750-mV single-end peak-to-peak input voltage and 1.28-V output voltage under load current of 4 mA. The power management block can supply 1.8mA average load current under 1V consuming only 12μW power, which is equivalent to 99.3% power efficiency. The wireless power transmission block described in this paper achieves a maximum power efficiency of 80%. The wireless power transmission circuit block is designed and implemented using UMC 65-nm CMOS/RF process. It occupies 1 mm × 1.2 mm silicon area.

Keywords: Implantable biomedical devices, wireless power transfer, LDO, rectifier, closed-loop power control

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Authors: P. Ruttanee, K-N. Areerak, K-L. Areerak

Abstract:

Dynamic models of power converters are normally time-varying because of their switching actions. Several approaches are applied to analyze the power converters to achieve the timeinvariant models suitable for system analysis and design via the classical control theory. The paper presents how to derive dynamic models of the power system consisting of a three-phase controlled rectifier feeding an uncontrolled buck converter by using the combination between the well known techniques called the DQ and the generalized state-space averaging methods. The intensive timedomain simulations of the exact topology model are used to support the accuracies of the reported model. The results show that the proposed model can provide good accuracies in both transient and steady-state responses.

Keywords: DQ method, Generalized state-space averaging method, Three-phase controlled rectifier, Uncontrolled buck converter, Averaging model, Modeling, Simulation.

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Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Yuan-Jhen Siao

Abstract:

A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.

Keywords: Bridgeless boost, boost converter, power factor correction, hold-up time.

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Authors: Yong Seo Koo, Dong Su Kim, Byung Seok Lee, Won Suk Park, Bo Bea Song

Abstract:

This paper presents a SCR-based ESD protection devices for I/O clamp and power rail clamp, respectably. These devices have a low trigger voltage and high holding voltage characteristics than conventional SCR device. These devices are fabricated by using 0.35um BCD (Bipolar-CMOS-DMOS) processes. These devices were validated using a TLP system. From the experimental results, the device for I/O ESD clamp has a trigger voltage of 5.8V. Also, the device for power rail ESD clamp has a holding voltage of 7.7V.

Keywords: ESD (Electro-Static Discharge), ESD protection device, SCR (Silicon Controlled Rectifier), Latch-up

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Authors: Ashot Navasardian, Mariam Vardanian, Vladik Vardanian

Abstract:

The photovoltaic and the semiconductor industries are in growth and it is necessary to supply a large amount of silicon to maintain this growth. Since silicon is still the best material for the manufacturing of solar cells and semiconductor components so the pure silicon like solar grade and semiconductor grade materials are demanded. There are two main routes for silicon production: metallurgical and chemical. In this article, we reviewed the electrotecnological installations and systems for semiconductor manufacturing. The main task is to design the installation which can produce SOG Silicon from river sand by one work unit.

Keywords: Metallurgical grade silicon, solar grade silicon, impurity, refining, plasma.

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Authors: Sikder Mohammad Faruk, Mir Mofajjal Hossain, Muhibul Haque Bhuyan

Abstract:

In this investigative research paper, we have presented the simulation results of a three-phase rectifier circuit to improve the input side current using the passive filters, such as capacitors and inductors at the output and input terminals of the rectifier circuit respectively. All simulation works were performed in a personal computer using the PSPICE simulator software, which is a virtual circuit design and simulation software package. The output voltages and currents were measured across a resistive load of 1 k. We observed that the output voltage levels, input current wave shapes, harmonic contents through the harmonic spectrum, and total harmonic distortion improved due to the use of such filters.

Keywords: input current wave, three-phase rectifier, passive filter, PSPICE Simulation

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Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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Authors: Hussein A. Kazem, Abdulhakeem Abdullah Albaloshi, Ali Said Ali Al-Jabri, Khamis Humaid AlSaidi

Abstract:

This paper proposes different methods for estimation of the harmonic currents of the single-phase diode bridge rectifier. Both simple and advanced methods are compared and the models are put into a context of practical use for calculating the harmonic distortion in a typical application. Finally, the different models are compared to measurements of a real application and convincing results are achieved.

Keywords: Single-phase rectifier, line side Harmonics

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Authors: S. Ali Al-Mawsawi, Fadhel A. Albasri

Abstract:

The paper presents a simple and an accurate formula that has been developed for the conduction angle (δ) of a single phase half-wave or full-wave controlled rectifier with RL load. This formula can be also used for calculating the conduction angle (δ) in case of A.C. voltage regulator with inductive load under discontinuous current mode. The simulation results shows that the conduction angle calculated from the developed formula agree very well with that obtained from the exact solution arrived from the iterative method. Applying the developed formula can reduce the computational time and reduce the time for manual classroom calculation. In addition, the proposed formula is attractive for real time implementations.

Keywords: Conduction Angle, Firing Angle, Excitation Angle, Load Angle.

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Authors: Shiyang Zhu, G. Q. Lo, D. L. Kwong

Abstract:

Silicon photonics has generated an increasing interest in recent years mainly for optical communications optical interconnects in microelectronic circuits or bio-sensing applications. The development of elementary passive and active components (including detectors and modulators), which are mainly fabricated on the silicon on insulator platform for CMOS-compatible fabrication, has reached such a performance level that the integration challenge of silicon photonics with microelectronic circuits should be addressed. Since crystalline silicon can only be grown from another silicon crystal, making it impossible to deposit in this state, the optical devices are typically limited to a single layer. An alternative approach is to integrate a photonic layer above the CMOS chip using back-end CMOS fabrication process. In this paper, various materials, including silicon nitride, amorphous silicon, and polycrystalline silicon, for this purpose are addressed.

Keywords: Silicon photonics, CMOS, Integration.

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Authors: W. L. Liong, Srimala Sreekantan, Sabar D. Hutagalung

Abstract:

The effect of concentration of reduction agent of sodium borohydrate (NaBH4) on the properties of silicon nanoparticles synthesized via microemulsion route is reported. In this work, the concentration of the silicon tetrachloride (SiCl4) that served as silicon source with sodium hydroxide (NaOH) and polyethylene glycol (PEG) as stabilizer and surfactant, respectively, are keep fixed. Four samples with varied concentration of NaBH4 from 0.05 M to 0.20 M were synthesized. It was found that the lowest concentration of NaBH4 gave better formation of silicon nanoparticles.

Keywords: Microelmusion, nanoparticles, reduction, silicon

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Authors: Alexey P. Antropov, Alexander V. Ragutkin, Nicolay A. Yashtulov

Abstract:

The original controlled technology for power active nanocomposite membrane-electrode assembly engineering on the basis of porous silicon is presented. The functional nanocomposites were studied by electron microscopy and cyclic voltammetry methods. The application possibility of the obtained nanocomposites as high performance renewable energy sources for micro-power electronic devices is demonstrated.

Keywords: Cyclic voltammetry, electron microscopy, nanotechnology, platinum-palladium nanocomposites, porous silicon, power activity, renewable energy sources.

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Authors: C. Chanapromma, T. Worachak, P. Silapan

Abstract:

This paper presents positive and negative full-wave rectifier. The proposed structure is based on OTA using commercially available ICs (LT1228). The features of the proposed circuit are that: it can rectify and amplify voltage signal with controllable output magnitude via input bias current: the output voltage is free from temperature variation. The circuit description merely consists of 1 single ended and 3 fully differential OTAs. The performance of the proposed circuit are investigated though PSpice. They show that the proposed circuit can function as positive/negative full-wave rectifier, where the voltage input wide-dynamic range from -5V to 5V. Furthermore, the output voltage is slightly dependent on the temperature variations.

Keywords: Full-wave rectifier, Positive/negative, OTA, Electronically controllable, Wide-dynamic range

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Authors: T. Mohammed Chikouche, K. Hartani

Abstract:

In order to solve the instantaneous power ripple and achieve better performance of direct power control (DPC) for a three-phase PWM rectifier, a control method is proposed in this paper. This control method is applied to overcome the instantaneous power ripple, to eliminate line current harmonics and therefore reduce the total harmonic distortion and to improve the power factor. A switching table is based on the analysis on the change of instantaneous active and reactive power, to select the optimum switching state of the three-phase PWM rectifier. The simulation result shows feasibility of this control method.

Keywords: Power quality, direct power control, power ripple, switching table, unity power factor.

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Authors: P. Ram Mohan, M. Vijaya Kumar, O. V. Raghava Reddy

Abstract:

This paper deals with the simulation of a Boost Power Factor Correction (PFC) Converter with Electro Magnetic Interference (EMI) Filter. The diode rectifier with output capacitor gives poor power factor. The Boost Converter of PFC Circuit is analyzed and then simulated with diode rectifier. The Boost PFC Converter with EMI Filter is simulated for resistive load. The power factor is improved using the proposed converter.

Keywords: Boost Converter, Power Factor Correction, Electro Magnetic Interference, Diode Rectifier

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Authors: Hyun-Young Kim, Chung-Kwang Lee, Han-Hee Cho, Sang-Woon Cho, Yong-Seo Koo

Abstract:

In this paper, we proposed a novel SCR (Silicon Controlled Rectifier) - based ESD (Electrostatic Discharge) protection device for I/O and power clamp. The proposed device has a higher holding voltage characteristic than conventional SCR. These characteristics enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. The proposed device was analyzed to figure out electrical characteristics and tolerance robustness in term of individual design parameters (D1, D2, D3). They are investigated by using the Synopsys TCAD simulator. As a result of simulation, holding voltage increased with different design parameters. The holding voltage of the proposed device changes from 3.3V to 7.9V. Also, N-Stack structure ESD device with the high holding voltage is proposed. In the simulation results, 2-stack has holding voltage of 6.8V and 3-stack has holding voltage of 10.5V. The simulation results show that holding voltage of stacking structure can be larger than the operation voltage of high-voltage application.

Keywords: ESD, SCR, holding voltage, stack, power clamp.

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Authors: M. R. Gad El- Kareem, A. M. K. Abdel Aal, A. Y. Mohamed

Abstract:

During 2011 and 2012 seasons, Zaghloul date palms received four sprays of silicon (Si) at 0.05 to 0.1% and selenium (Se) at 0.01 to 0.02%. Growth, nutritional status, yield as well as physical and chemical characteristics of the fruits in response to application of silicon and selenium were investigated. Single and combined applications of silicon at 0.05 to 0.1% and selenium at 0.01 to 0.02% was very effective in enhancing the leaf area, total chlorophylls, percentages of N, P and K in the leaves, yield, bunch weight as well as physical and chemical characteristics of the fruits in relative to the check treatment. Silicon was superior to selenium in this respect. Combined application was favorable than using each alone in this connection. Treating Zaghloul date palms four times with a mixture of silicon at 0.05% + selenium at 0.01% resulted in an economical yield and producing better fruit quality.

Keywords: Date Palms, Zaghloul, Silicon, Selenium, leaf area.

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Authors: Luc Conti, Dimitry Dumont-Fillon, Harald van Lintel, Eric Chappel

Abstract:

Flow control valves comprise a silicon flexible membrane that deflects against a substrate, usually made of glass, containing pillars, an outlet hole, and anti-stiction features. However, there is a strong interest in using silicon instead of glass as substrate material, as it would simplify the process flow by allowing the use of well controlled anisotropic etching. Moreover, specific devices demanding a bending of the substrate would also benefit from the inherent outstanding mechanical strength of monocrystalline silicon. Unfortunately, direct Si-Si bonding is not easily achieved with highly structured wafers since residual stress may prevent the good adhesion between wafers. Using a thermoplastic polymer, such as parylene, as intermediate layer is not well adapted to this design as the wafer-to-wafer alignment is critical. An alternative anodic bonding method using an intermediate borosilicate layer has been successfully tested. This layer has been deposited onto the silicon substrate. The bonding recipe has been adapted to account for the presence of the SOI buried oxide and intermediate glass layer in order not to exceed the breakdown voltage. Flow control valves dedicated to infusion of viscous fluids at very high pressure have been made and characterized. The results are compared to previous data obtained using the standard anodic bonding method.

Keywords: Anodic bonding, evaporated glass, microfluidic valve, drug delivery.

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Authors: A. Ould-Abbas, M. Bouchaour, , M. Madani, D. Trari, O. Zeggai, M. Boukais, N.-E.Chabane-Sari

Abstract:

The porous silicon (PS), formed from the anodization of a p+ type substrate silicon, consists of a network organized in a pseudo-column as structure of multiple side ramifications. Structural micro-topology can be interpreted as the fraction of the interconnected solid phase contributing to thermal transport. The reduction of dimensions of silicon of each nanocristallite during the oxidation induced a reduction in thermal conductivity. Integration of thermal sensors in the Microsystems silicon requires an effective insulation of the sensor element. Indeed, the low thermal conductivity of PS consists in a very promising way in the fabrication of integrated thermal Microsystems.In this work we are interesting in the measurements of thermal conductivity (on the surface and in depth) of PS by the micro-Raman spectroscopy. The thermal conductivity is studied according to the parameters of anodization (initial doping and current density. We also, determine porosity of samples by spectroellipsometry.

Keywords: micro-Raman spectroscopy, mono-crysatl silicon, porous silicon, thermal conductivity

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Authors: N. I. Kargin, G. K. Safaraliev, A. S. Gusev, A. O. Sultanov, N. V. Siglovaya, S. M. Ryndya, A. A. Timofeev

Abstract:

In this paper, an experimental and theoretical study of the processes of mesoporous silicon carbonization during the formation of buffer layers for the subsequent epitaxy of 3C-SiC films and related wide-band-gap semiconductors is performed. Experimental samples were obtained by the method of chemical vapor deposition and investigated by scanning electron microscopy. Analytic expressions were obtained for the effective diffusion factor and carbon atoms diffusion length in a porous system. The proposed model takes into account the processes of Knudsen diffusion, coagulation and overgrowing of pores during the formation of a silicon carbide layer.

Keywords: Silicon carbide, porous silicon, carbonization, electrochemical etching, diffusion.

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Authors: Shahrazed Medeghri, Saad Hamzaoui, Mokhtar Zerdali

Abstract:

The metallurgical grade silicon (MG-Si) is obtained from the reduction of silica (SiO₂) in an induction furnace or an electric arc furnace. Impurities inherent in reduction process also depend on the quality of the raw material used. Among the applications of the silicon, it is used as a substrate for the photovoltaic conversion of solar energy and this conversion is wider as the purity of the substrate is important. Research is being done where the purpose is looking for new methods of manufacturing and purification of silicon, as well as new materials that can be used as substrates for the photovoltaic conversion of light energy. In this research, the technique of production of silicon in an induction furnace, using a high vacuum for fusion. Diatomaceous Silica (SiO2) used is 99 mass% initial purities, the carbon used is 6N of purity and the particle size of 63μm as starting materials. The final achieved purity of the material was above 50% by mass. These results demonstrate that this method is a technically reliable, and allows obtaining a better return on the amount 50% of silicon.

Keywords: Induction, amorphous silica, carbon microstructure, silicon.

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Authors: Rohollah. Abdollahi, Alireza. Jalilian

Abstract:

This paper presents a pulse doubling technique in a 12-pulse ac-dc converter which supplies direct torque controlled motor drives (DTCIMD-s) in order to have better power quality conditions at the point of common coupling. The proposed technique increases the number of rectification pulses without significant changes in the installations and yields in harmonic reduction in both ac and dc sides. The 12-pulse rectified output voltage is accomplished via two paralleled six-pulse ac-dc converters each of them consisting of three-phase diode bridge rectifier. An autotransformer is designed to supply the rectifiers. The design procedure of magnetics is in a way such that makes it suitable for retrofit applications where a six-pulse diode bridge rectifier is being utilized. Independent operation of paralleled diode-bridge rectifiers, i.e. dc-ripple re-injection methodology, requires a Zero Sequence Blocking Transformer (ZSBT). Finally, a tapped interphase reactor is connected at the output of ZSBT to double the pulse numbers of output voltage up to 24 pulses. The aforementioned structure improves power quality criteria at ac mains and makes them consistent with the IEEE-519 standard requirements for varying loads. Furthermore, near unity power factor is obtained for a wide range of DTCIMD operation. A comparison is made between 6- pulse, 12-pulse, and proposed converters from view point of power quality indices. Results show that input current total harmonic distortion (THD) is less than 5% for the proposed topology at various loads.

Keywords: AC–DC converter, star-connected autotransformer, power quality, 24 pulse rectifier, Pulse Doubling, direct torquecontrolled induction motor drive (DTCIMD).

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Authors: Li Long, Thomas Ortlepp

Abstract:

The transport properties of carriers in polycrystalline silicon film affect the performance of polycrystalline silicon-based devices. They depend strongly on the grain structure, grain boundary trap properties and doping concentration, which in turn are determined by the film deposition and processing conditions. Based on the properties of charge carriers, phonons, grain boundaries and their interactions, the thermoelectric properties of polycrystalline silicon are analyzed with the relaxation time approximation of the Boltzmann transport equation. With this approach, thermal conductivity, electrical conductivity and Seebeck coefficient as a function of grain size, trap properties and doping concentration can be determined. Experiment on heavily doped polycrystalline silicon is carried out and measurement results are compared with the model.

Keywords: Conductivity, polycrystalline silicon, relaxation time approximation, Seebeck coefficient, thermoelectric property.

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Authors: Qing Fang, Lianxi Jia, JunFeng Song, Xiaoguang Tu, Mingbin Yu, Andy Eu-jin Lim, Guo Qiang Lo

Abstract:

The first pn-type carrier-induced silicon Bragg-grating filter is demonstrated. The extinction-ratio modulations are 11.5 dB and 10 dB with reverse and forward biases, respectively. 8-Gpbs data rate is achieved with a reverse bias.

Keywords: Silicon photonics, Waveguide grating, Carrier-induced, Extinction-ratio modulation.

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Authors: Isao Tomita

Abstract:

The principle of all-silicon Raman lasers for an output wavelength of 1.3 μm is presented, which employs quasi-phase-matched structures and resonators to enhance the output power. 1.3-μm laser beams for GE-PONs in FTTH systems generated from a silicon device are very important because such a silicon device can be monolithically integrated with the silicon planar lightwave circuits (Si PLCs) used in the GE-PONs. This reduces the device fabrication processes and time and also optical losses at the junctions between optical waveguides of the Si PLCs and Si laser devices when compared with 1.3-μm III-V semiconductor lasers set on the Si PLCs employed at present. We show that the quasi-phase-matched Si Raman laser with resonators can produce about 174 times larger laser power at 1.3 μm (at maximum) than that without resonators for a Si waveguide of Raman gain 20 cm/GW and optical loss 1.2 dB/cm, pumped at power 10 mW, where the length of the waveguide is 3 mm and its cross-section is (1.5 μm)2.

Keywords: All-silicon raman laser, FTTH, GE-PON, quasi-phase-matched structure, resonator.

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Authors: Bo Bae Song, Byung Seok Lee, Hyun Young Kim, Chung Kwang Lee, Yong Seo Koo

Abstract:

This paper proposed a silicon controller rectifier (SCR) based ESD protection device to protect low voltage ESD for integrated circuit. The proposed ESD protection device has low trigger voltage and high holding voltage compared with conventional SCR-based ESD protection devices. The proposed ESD protection circuit is verified and compared by TCAD simulation. This paper verified effective low voltage ESD characteristics with low trigger voltage of 5.79V and high holding voltage of 3.5V through optimization depending on design variables (D1, D2, D3 and D4).

Keywords: ESD, SCR, Holding voltage, Latch-up.

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Authors: Qing Fang, Lianxi Jia, Junfeng Song, Chao Li, Xianshu Luo, Mingbin Yu, Guoqiang Lo

Abstract:

In this paper, we demonstrated a 1 × 4 silicon photonic cascaded arrayed waveguide grating, which is fabricated on a SOI wafer with a 220 nm top Si layer and a 2µm buried oxide layer. The measured on-chip transmission loss of this cascaded arrayed waveguide grating is ~ 5.6 dB, including the fiber-to-waveguide coupling loss. The adjacent crosstalk is 33.2 dB. Compared to the normal single silicon photonic arrayed waveguide grating with a crosstalk of ~ 12.5 dB, the crosstalk of this device has been dramatically increased.

Keywords: Silicon photonic, arrayed waveguide grating, high-crosstalk, cascaded structure.

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