Search results for: NAND Flash based SSD

Authors: Sorcha Bennett, Joe Sullivan

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Triple-Level Cell (TLC) NAND Flash memory at, and below, 20nm (nanometer) is still largely unexplored by researchers, and with the ever more commonplace existence of Flash in consumer and enterprise applications there is a need for such gaps in knowledge to be filled. At the time of writing, there was little published data or literature on TLC, and more specifically reliability testing, with a further emphasis on both endurance and retention. This paper will give an introduction to NAND Flash memory, followed by an overview of the relevant current research on the reliability of Flash memory, along with the planned future work which will provide results to help characterise the reliability of TLC memory.

Keywords: TLC NAND flash memory, reliability, endurance, retention, trade-off, raw flash, patterns.

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Authors: Won-Hee Cho, GeunHyung Lee, Deok-Hwan Kim

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The flash memory has many advantages such as low power consumption, strong shock resistance, fast I/O and non-volatility. And it is increasingly used in the mobile storage device. The YAFFS, one of the NAND flash file system, is widely used in the embedded device. However, the existing YAFFS takes long time to mount the file system because it scans whole spare areas in all pages of NAND flash memory. In order to solve this problem, we propose a new content-based flash file system using a mounting time reduction technique. The proposed method only scans partial spare areas of some special pages by using content-based block management. The experimental results show that the proposed method reduces the average mounting time by 87.2% comparing with JFFS2 and 69.9% comparing with YAFFS.

Keywords: NAND Flash Memory, Mounting Time, YAFFS, JFFS2, Content-based Block management

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Authors: Sungjoon Sim, Soongyu Kwon, Dongjae Song, Jong Tae Kim

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Flash memory has become an important storage device in many embedded systems because of its high performance, low power consumption and shock resistance. Multi-level cell (MLC) is developed as an effective solution for reducing the cost and increasing the storage density in recent years. However, most of flash file system cannot handle the error correction sufficiently. To correct more errors for MLC, we implement Reed-Solomon (RS) code to YAFFS, what is widely used for flash-based file system. RS code has longer computing time but the correcting ability is much higher than that of Hamming code.

Keywords: Reed-Solomon, NAND flash memory, YAFFS, ErrorCorrecting Code, Flash File System

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Authors: M. Geetha Priya, K. Baskaran, S. Srinivasan

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Digital systems are said to be constructed using basic logic gates. These gates are the NOR, NAND, AND, OR, EXOR & EXNOR gates. This paper presents a robust three transistors (3T) based NAND and NOR gates with precise output logic levels, yet maintaining equivalent performance than the existing logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic (PTL). The new universal logic gates are characterized by better speed and lower power dissipation which can be straightforwardly fabricated as memory ICs for high performance computer networks. The simulation tests were performed using standard BPTM 22nm process technology using SYNOPSYS HSPICE. The 3T NAND gate is evaluated using C17 benchmark circuit and 3T NOR is gate evaluated using a D-Latch. According to HSPICE simulation in 22 nm CMOS BPTM process technology under given conditions and at room temperature, the proposed 3T gates shows an improvement of 88% less power consumption on an average over conventional CMOS logic gates. The devices designed with 3T gates will make longer battery life by ensuring extremely low power consumption.

Keywords: Low power, CMOS, pass-transistor, flash memory, logic gates.

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Authors: Kyoung Hoon Kim, Chul Ho Han

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Organic Flash Cycle (OFC) has potential of improving efficiency for recovery of low temperature heat sources mainly due to reducing temperature mismatch in the heat exchanger. In this work exergetical performance analysis of ORC is conducted for recovery of low grade heat source. Effects of system parameters such as flash evaporation temperature or heating temperature are theoretically investigated on the exergy destructions (anergies) at various components of the system as well as exergy efficiency. Results show that exergy efficiency has a peak with respect to the flash temperature, and the optimum flash temperature increases with the heating temperature. The component where the largest exergy destruction occurs varies with the flash temperature or heating temperature.

Keywords: Organic flash cycle (OFC), low grade heat source, exergy, anergy, flash temperature.

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Authors: Yngvar Berg, Omid Mirmotahari

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In this paper we ultra low-voltage and high speed CMOS domino logic. For supply voltages below 500mV the delay for a ultra low-voltage NAND2 gate is aproximately 10% of a complementary CMOS inverter. Furthermore, the delay variations due to mismatch is much less than for conventional CMOS. Differential domino gates for AND/NAND and OR/NOR operation are presented.

Keywords: Low-voltage, high-speed, NAND, NOR, CMOS.

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Authors: Zviad Ghadua, Biswa Bhattacharya

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The Flash Flood Guidance (FFG) provides the rainfall amount of a given duration necessary to cause flooding. The approach is based on the development of rainfall-runoff curves, which helps us to find out the rainfall amount that would cause flooding. An alternative approach, mostly experimented with Italian Alpine catchments, is based on determining threshold discharges from past events and on finding whether or not an oncoming flood has its magnitude more than some critical discharge thresholds found beforehand. Both approaches suffer from large uncertainties in forecasting flash floods as, due to the simplistic approach followed, the same rainfall amount may or may not cause flooding. This uncertainty leads to the question whether a probabilistic model is preferable over a deterministic one in forecasting flash floods. We propose the use of a Bayesian probabilistic approach in flash flood forecasting. A prior probability of flooding is derived based on historical data. Additional information, such as antecedent moisture condition (AMC) and rainfall amount over any rainfall thresholds are used in computing the likelihood of observing these conditions given a flash flood has occurred. Finally, the posterior probability of flooding is computed using the prior probability and the likelihood. The variation of the computed posterior probability with rainfall amount and AMC presents the suitability of the approach in decision making in an uncertain environment. The methodology has been applied to the Posina basin in Italy. From the promising results obtained, we can conclude that the Bayesian approach in flash flood forecasting provides more realistic forecasting over the FFG.

Keywords: Flash flood, Bayesian, flash flood guidance, FFG, forecasting, Posina.

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Authors: Shobha Sharma, Amita Dev

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Data driven dynamic logic is the high speed dynamic circuit with low area. The clock of the dynamic circuit is removed and data drives the circuit instead of clock for precharging purpose. This data driven dynamic nand gate is given static forward substrate biasing of Vsupply/2 as well as the substrate bias is connected to the input data, resulting in dynamic substrate bias. The dynamic substrate bias gives the shortest propagation delay with a penalty on the power dissipation. Propagation delay is reduced by 77.8% compared to the normal reverse substrate bias Data driven dynamic nand. Also dynamic substrate biased D3nand’s propagation delay is reduced by 31.26% compared to data driven dynamic nand gate with static forward substrate biasing of Vdd/2. This data driven dynamic nand gate with dynamic body biasing gives us the highest speed with no area penalty and finds its applications where power penalty is acceptable. Also combination of Dynamic and static Forward body bias can be used with reduced propagation delay compared to static forward biased circuit and with comparable increase in an average power. The simulations were done on hspice simulator with 22nm High-k metal gate strained Si technology HP models of Arizona State University, USA.

Keywords: Data driven nand gate, dynamic substrate biasing, nand gate, static substrate biasing.

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Authors: Le Xuan Cau

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Flash flood is occurred in short time rainfall interval: from 1 hour to 12 hours in small and medium basins. Flash floods typically have two characteristics: large water flow and big flow velocity. Flash flood is occurred at hill valley site (strip of lowland of terrain) in a catchment with large enough distribution area, steep basin slope, and heavy rainfall. The risk of flash floods is determined through Gridded Basin Flash Flood Potential Index (GBFFPI). Flash Flood Potential Index (FFPI) is determined through terrain slope flash flood index, soil erosion flash flood index, land cover flash floods index, land use flash flood index, rainfall flash flood index. Determining GBFFPI, each cell in a map can be considered as outlet of a water accumulation basin. GBFFPI of the cell is determined as basin average value of FFPI of the corresponding water accumulation basin. Based on GIS, a tool is developed to compute GBFFPI using ArcObjects SDK for .NET. The maps of GBFFPI are built in two types: GBFFPI including rainfall flash flood index (real time flash flood warning) or GBFFPI excluding rainfall flash flood index. GBFFPI Tool can be used to determine a high flash flood potential site in a large region as quick as possible. The GBFFPI is improved from conventional FFPI. The advantage of GBFFPI is that GBFFPI is taking into account the basin response (interaction of cells) and determines more true flash flood site (strip of lowland of terrain) while conventional FFPI is taking into account single cell and does not consider the interaction between cells. The GBFFPI Map of QuangNam, QuangNgai, DaNang, Hue is built and exported to Google Earth. The obtained map proves scientific basis of GBFFPI.

Keywords: ArcObjects SDK for .NET, Basin average value of FFPI, Gridded basin flash flood potential index, GBFFPI map.

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Authors: Sami Mutair, Yasuyuki Ikegami

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This paper reports on the results of experimental investigations of flash evaporation from superheated jet issues vertically upward from a round straight nozzle of 81.3 mm diameter. For the investigated range of jet superheat degree and velocity, it was shown that flash evaporation enhances with initial temperature increase. Due to the increase of jet inertia and subsequently the delay of jet shattering, increase of jet velocity was found to result in increase of evaporation "delay period". An empirical equation predicts the jet evaporation completion height was developed, this equation is thought to be useful in designing the flash evaporation chamber. In attempts for enhancement of flash evaporation, use of steel wire mesh located at short distance downstream was found effective with no consequent pressure drop.

Keywords: Enhancement; Flash Evaporation; OTEC; superheated jet

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Authors: Jaechun No

Abstract:

This paper focuses on I/O optimizations of N-hybrid (New-Form of hybrid), which provides a hybrid file system space constructed on SSD and HDD. Although the promising potentials of SSD, such as the absence of mechanical moving overhead and high random I/O throughput, have drawn a lot of attentions from IT enterprises, its high ratio of cost/capacity makes it less desirable to build a large-scale data storage subsystem composed of only SSDs. In this paper, we present N-hybrid that attempts to integrate the strengths of SSD and HDD, to offer a single, large hybrid file system space. Several experiments were conducted to verify the performance of N-hybrid.

Keywords: SSD, data section, I/O optimizations.

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Authors: Omid Mirmotahari, Yngvar Berg

Abstract:

In this paper we promote the Ultra Low Voltage (ULV) NAND gate to replace either partly or entirely the encryption block of a design to withstand power analysis attack.

Keywords: Differential Power Analysis (DPA), Low Voltage (LV), Ultra Low Voltage (ULV), Floating-Gate (FG), supply current analysis.

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Authors: Satyasen Panda, Urmila Bhanja

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In this paper, we have presented and analyzed three-dimensional (3-D) matrices of wavelength/time/space code for optical code division multiple access (OCDMA) networks with NAND subtraction detection technique. The 3-D codes are constructed by integrating a two-dimensional modified quadratic congruence (MQC) code with one-dimensional modified prime (MP) code. The respective encoders and decoders were designed using fiber Bragg gratings and optical delay lines to minimize the bit error rate (BER). The performance analysis of the 3D-OCDMA system is based on measurement of signal to noise ratio (SNR), BER and eye diagram for a different number of simultaneous users. Also, in the analysis, various types of noises and multiple access interference (MAI) effects were considered. The results obtained with NAND detection technique were compared with those obtained with OR and AND subtraction techniques. The comparison results proved that the NAND detection technique with 3-D MQC\MP code can accommodate more number of simultaneous users for longer distances of fiber with minimum BER as compared to OR and AND subtraction techniques. The received optical power is also measured at various levels of BER to analyze the effect of attenuation.

Keywords: Cross correlation, three-dimensional optical code division multiple access, spectral amplitude coding optical code division multiple access, multiple access interference, phase induced intensity noise, three-dimensional modified quadratic congruence/modified prime code.

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Authors: Mohamad Sukeri Khalid, Che Su Mustaffa, Mohd Najib Marzuki, Mohd Fo’ad Sakdan, Sapora Sipon, Mohd Taib Ariffin, Shazwani Shafiai

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This paper describes the issues relating to the role of the flash flood early warning system provided by the Malaysian Government to the communities in Malaysia, specifically during the flash flood disaster in the Cameron Highlands, Malaysia. Normally, flash flood disasters can occur as a result of heavy rainfall in an area, and that water may possibly cause flooding via streams or narrow channels. The focus of this study is the flash flood disaster which occurred on 23 October 2013 in the Cameron Highlands, and as a result the Sungai Bertam overflowed after the release of water from the Sultan Abu Bakar Dam. This release of water from the dam caused flash flooding which led to damage to properties and also the death of residents and livestock in the area. Therefore, the effort of this study is to identify the perceptions of the flash flood victims on the role of the flash flood early warning system. For the purposes of this study, data were gathered through face-to-face interviews from those flood victims who were willing to participate in this study. This approach helped the researcher to glean in-depth information about their feelings and perceptions of the role of the flash flood early warning system offered by the government. The data were analysed descriptively and the findings show that the respondents of 22 flood victims believe strongly that the flash flood early warning system was confusing and dysfunctional, and communities had failed to response positively to it. Therefore, most of the communities were not well prepared for the releasing of water from the dam which caused property damage, and 3 people were killed in the Cameron Highland flash flood disaster.

Keywords: Communities affected, disaster management, early warning system, flash flood disaster.

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Authors: D. Pinto, L. Castro, M.L. Cruzat, S. Barros, J. Gironás, C. Oberli, M. Torres, C. Escauriaza, A. Cipriano

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Flash Floods, together with landslides, are a common natural threat for people living in mountainous regions and foothills. One way to deal with this constant menace is the use of Early Warning Systems, which have become a very important mitigation strategy for natural disasters. In this work we present our proposal for a pilot Flash Flood Early Warning System for Santiago, Chile, the first stage of a more ambitious project that in a future stage shall also include early warning of landslides. To give a context for our approach, we first analyze three existing Flash Flood Early Warning Systems, focusing on their general architectures. We then present our proposed system, with main focus on the decision support system, a system that integrates empirical models and fuzzy expert systems to achieve reliable risk estimations.

Keywords: Decision Support System, Early Warning Systems, Flash Flood, Natural Hazard.

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Authors: Moustafa S. El-Sammany

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Flash floods are considered natural disasters that can cause casualties and demolishing of infra structures. The problem is that flash floods, particularly in arid and semi arid zones, take place in very short time. So, it is important to forecast flash floods earlier to its events with a lead time up to 48 hours to give early warning alert to avoid or minimize disasters. The flash flood took place over Wadi Watier - Sinai Peninsula, in October 24th, 2008, has been simulated, investigated and analyzed using the state of the art regional weather model. The Weather Research and Forecast (WRF) model, which is a reliable short term forecasting tool for precipitation events, has been utilized over the study area. The model results have been calibrated with the real data, for the same date and time, of the rainfall measurements recorded at Sorah gauging station. The WRF model forecasted total rainfall of 11.6 mm while the real measured one was 10.8 mm. The calibration shows significant consistency between WRF model and real measurements results.

Keywords: Early warning system, Flash floods forecasting, WadiWatier, WRF model.

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Authors: Jae Young Park, Hwansu Jung, Jong Tae Kim

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In the Solid-State-Drive (SSD) performance, whether the data has been well parallelized is an important factor. SSD parallelization is affected by allocation scheme and it is directly connected to SSD performance. There are dynamic allocation and static allocation in representative allocation schemes. Dynamic allocation is more adaptive in exploiting write operation parallelism, while static allocation is better in read operation parallelism. Therefore, it is hard to select the appropriate allocation scheme when the workload is mixed read and write operations. We simulated conditions on a few mixed data patterns and analyzed the results to help the right choice for better performance. As the results, if data arrival interval is long enough prior operations to be finished and continuous read intensive data environment static allocation is more suitable. Dynamic allocation performs the best on write performance and random data patterns.

Keywords: Dynamic allocation, NAND Flash based SSD, SSD parallelism, static allocation.

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Authors: Keonwoo Kim, Dowon Hong, Kyoil Chung, Jae-Cheol Ryou

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Cell phone forensics to acquire and analyze data in the cellular phone is nowadays being used in a national investigation organization and a private company. In order to collect cellular phone flash memory data, we have two methods. Firstly, it is a logical method which acquires files and directories from the file system of the cell phone flash memory. Secondly, we can get all data from bit-by-bit copy of entire physical memory using a low level access method. In this paper, we describe a forensic tool to acquire cell phone flash memory data using a logical level approach. By our tool, we can get EFS file system and peek memory data with an arbitrary region from Korea CDMA cell phone.

Keywords: Forensics, logical method, acquisition, cell phone, flash memory.

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Authors: Esra Bukova-Güzel, Berna Cantürk-Günhan

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The purpose of the study is to determine secondary prospective mathematics teachers- views related to using flash animations in mathematics lessons and to reveal how the sample presentations towards different mathematical concepts altered their views. This is a case study involving three secondary prospective mathematics teachers from a state university in Turkey. The data gathered from two semi-structural interviews. Findings revealed that these animations help understand mathematics meaningfully, relate mathematics and real world, visualization, and comprehend the importance of mathematics. The analysis of the data indicated that the sample presentations enhanced participants- views about using flash animations in mathematics lessons.

Keywords: Instructional technology, animations, prospective mathematics teachers.

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Authors: Gautam Sarkar, Anjan Rakshit, Amitava Chatterjee, Kesab Bhattacharya

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The present paper describes the development of a low cost, highly accurate low capacitance measurement system that can be used over a range of 0 – 400 pF with a resolution of 1 pF. The range of capacitance may be easily altered by a simple resistance or capacitance variation of the measurement circuit. This capacitance measurement system uses quad two-input NAND Schmitt trigger circuit CD4093B with hysteresis for the measurement and this system is integrated with PIC 18F2550 microcontroller for data acquisition purpose. The microcontroller interacts with software developed in the PC end through USB architecture and an attractive graphical user interface (GUI) based system is developed in the PC end to provide the user with real time, online display of capacitance under measurement. The system uses a differential mode of capacitance measurement, with reference to a trimmer capacitance, that effectively compensates lead capacitances, a notorious error encountered in usual low capacitance measurements. The hysteresis provided in the Schmitt-trigger circuits enable reliable operation of the system by greatly minimizing the possibility of false triggering because of stray interferences, usually regarded as another source of significant error. The real life testing of the proposed system showed that our measurements could produce highly accurate capacitance measurements, when compared to cutting edge, high end digital capacitance meters.

Keywords: Capacitance measurement, NAND Schmitt trigger, microcontroller, GUI, lead compensation, hysteresis.

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Authors: Omer Farooq, Salman Ahmed Khan, Sadaf Khalid

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Modern day stock markets have almost entirely became automated. Even though it means increased profits for the investors by algorithms acting upon the slightest price change in order of microseconds, it also has given birth to many ethical dilemmas in the sense that slightest mistake can cause people to lose all of their livelihoods. This paper reviews one such event that happened on May 06, 2010 in which $1 trillion dollars disappeared from the Dow Jones Industrial Average. We are going to discuss its various aspects and the ethical dilemmas that have arisen due to it.

Keywords: Flash Crash, Market Crash, Stock Market, Stock Market Crash.

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Authors: Padmanabhan Balasubramanian, Karthik Anantha

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Structural representation and technology mapping of a Boolean function is an important problem in the design of nonregenerative digital logic circuits (also called combinational logic circuits). Library aware function manipulation offers a solution to this problem. Compact multi-level representation of binary networks, based on simple circuit structures, such as AND-Inverter Graphs (AIG) [1] [5], NAND Graphs, OR-Inverter Graphs (OIG), AND-OR Graphs (AOG), AND-OR-Inverter Graphs (AOIG), AND-XORInverter Graphs, Reduced Boolean Circuits [8] does exist in literature. In this work, we discuss a novel and efficient graph realization for combinational logic circuits, represented using a NAND-NOR-Inverter Graph (NNIG), which is composed of only two-input NAND (NAND2), NOR (NOR2) and inverter (INV) cells. The networks are constructed on the basis of irredundant disjunctive and conjunctive normal forms, after factoring, comprising terms with minimum support. Construction of a NNIG for a non-regenerative function in normal form would be straightforward, whereas for the complementary phase, it would be developed by considering a virtual instance of the function. However, the choice of best NNIG for a given function would be based upon literal count, cell count and DAG node count of the implementation at the technology independent stage. In case of a tie, the final decision would be made after extracting the physical design parameters. We have considered AIG representation for reduced disjunctive normal form and the best of OIG/AOG/AOIG for the minimized conjunctive normal forms. This is necessitated due to the nature of certain functions, such as Achilles- heel functions. NNIGs are found to exhibit 3.97% lesser node count compared to AIGs and OIG/AOG/AOIGs; consume 23.74% and 10.79% lesser library cells than AIGs and OIG/AOG/AOIGs for the various samples considered. We compare the power efficiency and delay improvement achieved by optimal NNIGs over minimal AIGs and OIG/AOG/AOIGs for various case studies. In comparison with functionally equivalent, irredundant and compact AIGs, NNIGs report mean savings in power and delay of 43.71% and 25.85% respectively, after technology mapping with a 0.35 micron TSMC CMOS process. For a comparison with OIG/AOG/AOIGs, NNIGs demonstrate average savings in power and delay by 47.51% and 24.83%. With respect to device count needed for implementation with static CMOS logic style, NNIGs utilize 37.85% and 33.95% lesser transistors than their AIG and OIG/AOG/AOIG counterparts.

Keywords: AND-Inverter Graph, OR-Inverter Graph, DirectedAcyclic Graph, Low power design, Delay optimization.

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Authors: Anitha Narasimhan, Aarthy Anandan, Madhan Karky, C. N. Subalalitha

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Games can be the excellent tools for teaching a language. There are few e-learning games in Indian languages like word scrabble, cross word, quiz games etc., which were developed mainly for educational purposes. This paper proposes a Tamil word game called, “Porul”, which focuses on education as well as on players’ thinking and decision-making skills. Porul is a multiple choice based quiz game, in which the players attempt to answer questions correctly from the given multiple options that are generated using a unique algorithm called the Option Selection algorithm which explores the semantics of the question in various dimensions namely, synonym, rhyme and Universal Networking Language semantic category. This kind of semantic exploration of the question not only increases the complexity of the game but also makes it more interesting. The paper also proposes a Scoring Algorithm which allots a score based on the popularity score of the question word. The proposed game has been tested using 20,000 Tamil words.

Keywords: Porul game, Tamil word game, option selection, flash card, scoring, algorithm.

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Authors: Loai Nasrat, Mervat S. Hassan

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Bentonitic material from South Aswan, Egypt was evaluated in terms of mineral-ogy and chemical composition as bleaching clay in refining of transformer oil before and after acid activation and thermal treatment followed by acid leaching using HCl and H2SO4 for different contact times. Structural modification and refining power of bento-nite were investigated during modification by means of X-ray diffraction and infrared spectroscopy. The results revealed that the activated bentonite could be used for refining of transformer oil. The oil parameters such as; dielectric strength, viscosity and flash point had been improved. The dielectric breakdown strength of used oil increased from 29 kV for used oil treated with unactivated bentonite to 74 kV after treatment with activated bentonite. Kinematic Viscosity changed from 19 to 11 mm2 /s after treatment with activated bentonite. However, flash point achieved 149 ºC.

Keywords: Dielectric strength, unactivated bentonite, X-ray diffraction, SEM image

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Authors: Md Abid Khan

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A recognized engineering challenge is related to personnel protection from fatal arc flash incident energy in the line side of the 480-volt switchgears incomer breakers during maintenance activities. The incident energy is typically high due to slow fault clearance and it can be higher than the available personnel protective equipment (PPE) ratings. A fault on the line side of the 480 Volt breaker is cleared by breakers or fuses in the upstream higher voltage system (4160 Volt or higher). The current reflection in the higher voltage upstream system for a fault in the 480-volt switchgear is low, the clearance time is slower and the inversely proportional incident energy is hence higher. The installation of overcurrent protection at 480-volt system upstream of the incomer breaker will operate fast enough and trips the upstream higher voltage breaker when a fault develops at the incomer breaker. Therefore, fault current reduction as reflected in the upstream higher voltage system is eliminated. Since the fast overcurrent protection is permanently installed, it is always functional, do not require human interventions and eliminates exposure to human errors. It is installed at the maintenance activity location and its operations can be locally monitored by craftsmen during maintenance activities.

Keywords: Arc flash, mitigation, maintenance switch, energy level.

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Authors: Martin Klaumünzer, Jakob Hübner, Denis Spitzer

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Within this paper, latest results on processing of energetic nanomaterials by means of the Spray Flash Evaporation technique are presented. This technology constitutes a highly effective and continuous way to prepare fascinating materials on the nano- and micro-scale. Within the process, a solution is set under high pressure and sprayed into an evacuated atomization chamber. Subsequent ultrafast evaporation of the solvent leads to an aerosol stream, which is separated by cyclones or filters. No drying gas is required, so the present technique should not be confused with spray dying. Resulting nanothermites, insensitive explosives or propellants and compositions are foreseen to replace toxic (according to REACH) and very sensitive matter in military and civil applications. Diverse examples are given in detail: nano-RDX (n-Cyclotrimethylentrinitramin) and nano-aluminum based systems, mixtures (n-RDX/n-TNT - trinitrotoluene) or even cocrystalline matter like n-CL-20/HMX (Hexanitrohexaazaisowurtzitane/ Cyclotetra-methylentetranitramin). These nanomaterials show reduced sensitivity by trend without losing effectiveness and performance. An analytical study for material characterization was performed by using Atomic Force Microscopy, X-Ray Diffraction, and combined techniques as well as spectroscopic methods. As a matter of course, sensitivity tests regarding electrostatic discharge, impact, and friction are provided.

Keywords: Continuous synthesis, energetic material, nanoscale, nanothermite, nanoexplosive.

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Authors: M. E. Marwan, A. R. Madar, N. Fuad

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Mobile learning (m-learning) is a new method in teaching and learning process which combines technology of mobile device with learning materials. It can enhance student's engagement in learning activities and facilitate them to access the learning materials at anytime and anywhere. In Kolej Poly-Tech Mara (KPTM), this method is seen as an important effort in teaching practice and to improve student learning performance. The aim of this paper is to discuss the development of m-learning application called Mobile EEF Learning System (MEEFLS) to be implemented for Electric and Electronic Fundamentals course using Flash, XML (Extensible Markup Language) and J2ME (Java 2 micro edition). System Development Life Cycle (SDLC) was used as an application development approach. It has three modules in this application such as notes or course material, exercises and video. MEELFS development is seen as a tool or a pilot test for m-learning in KPTM.

Keywords: Flash, mobile device, mobile learning, teaching and learning, SDLC, XML.

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Authors: Hema Sandhya Jagarlamudi, Mousumi Saha, Pavan Kumar Jagarlamudi

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The use of Quantum dots is a promising emerging Technology for implementing digital system at the nano level. It is effecient for attractive features such as faster speed , smaller size and low power consumption than transistor technology. In this paper, various Combinational and sequential logical structures - HALF ADDER, SR Latch and Flip-Flop, D Flip-Flop preceding NAND, NOR, XOR,XNOR are discussed based on QCA design, with comparatively less number of cells and area. By applying these layouts, the hardware requirements for a QCA design can be reduced. These structures are designed and simulated using QCA Designer Tool. By taking full advantage of the unique features of this technology, we are able to create complete circuits on a single layer of QCA. Such Devices are expected to function with ultra low power Consumption and very high speeds.

Keywords: QCA, QCA Designer, Clock, Majority Gate

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Authors: Antonis Skouloudis, Georgios Deligiannakis, Panagiotis Vouros, Konstantinos Evangelinos, Ioannis Nikolaou

Abstract:

On November 15th, 2017, a catastrophic flash flood devastated the city of Mandra in Central Greece, resulting in 24 fatalities and extensive damages to the built environment and infrastructure. It was Greece’s deadliest and most destructive flood event for the past 40 years. In this paper, we examine the consequences of this event to small and medium-sized enterprises (SMEs) operating in Mandra during the flood event, which were affected by the floodwaters to varying extents. In this context, we conducted semi-structured interviews with business owners-managers of 45 SMEs located in flood inundated areas and are still active nowadays, based on an interview guide that spanned 27 topics. The topics pertained to the disaster experience of the business and business owners-managers, knowledge and attitudes towards climate change and extreme weather, aspects of disaster preparedness and related assistance needs. Our findings reveal that the vast majority of the affected businesses experienced heavy damages in equipment and infrastructure or total destruction, which resulted in business interruption from several weeks up to several months. Assistance from relatives or friends helped for the damage repairs and business recovery, while state compensations were deemed insufficient compared to the extent of the damages. Most interviewees pinpoint flooding as one of the most critical risks, and many connect it with the climate crisis. However, they are either not willing or unable to apply property-level prevention measures in their businesses due to cost considerations or complex and cumbersome bureaucratic processes. In all cases, the business owners are fully aware of the flood hazard implications, and since the recovery from the event, they have engaged in basic mitigation measures and contingency plans in case of future flood events. Such plans include insurance contracts whenever possible (as the vast majority of the affected SMEs were uninsured at the time of the 2017 event) as well as simple relocations of critical equipment within their property. The study offers fruitful insights on latent drivers and barriers of SMEs’ resilience capacity to flash flooding. In this respect, findings such as ours, highlighting tensions that underpin behavioural responses and experiences, can feed into: a) bottom-up approaches for devising actionable and practical guidelines, manuals and/or standards on business preparedness to flooding, and, ultimately, b) policy-making for an enabling environment towards a flood-resilient SME sector.

Keywords: Flash flood, small and medium-sized enterprises, organisational resilience capacity, disaster preparedness, qualitative study.

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Authors: Parma Nand, S.C. Sharma

Abstract:

The Mobile Ad-hoc Network (MANET) is a collection of self-configuring and rapidly deployed mobile nodes (routers) without any central infrastructure. Routing is one of the potential issues. Many routing protocols are reported but it is difficult to decide which one is best in all scenarios. In this paper on demand routing protocols DSR and DYMO based on IEEE 802.11 DCF MAC protocol are examined and characteristic summary of these routing protocols is presented. Their performance is analyzed and compared on performance measuring metrics throughput, dropped packets due to non availability of routes, duplicate RREQ generated for route discovery and normalized routing load by varying CBR data traffic load using QualNet 5.0.2 network simulator.

Keywords: Adhoc networks, wireless networks, CBR, routingprotocols, route discovery, simulation, performance evaluation, MAC, IEEE 802.11.

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