Proposal for a Ultra Low Voltage NAND gate to withstand Power Analysis Attacks

Authors: Omid Mirmotahari, Yngvar Berg

Abstract:

In this paper we promote the Ultra Low Voltage (ULV) NAND gate to replace either partly or entirely the encryption block of a design to withstand power analysis attack.

Keywords: Differential Power Analysis (DPA), Low Voltage (LV), Ultra Low Voltage (ULV), Floating-Gate (FG), supply current analysis.

Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1071424

References:

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