Search results for: Very Large Scale Integrated Circuit.

Authors: Dipankar Dhabak, Soumya Pandit

Abstract:

This paper presents an adaptive technique for generation of data required for construction of artificial neural network-based performance model of nano-scale CMOS inverter circuit. The training data are generated from the samples through SPICE simulation. The proposed algorithm has been compared to standard progressive sampling algorithms like arithmetic sampling and geometric sampling. The advantages of the present approach over the others have been demonstrated. The ANN predicted results have been compared with actual SPICE results. A very good accuracy has been obtained.

Keywords: CMOS Inverter, Nano-scale, Adaptive Sampling, ArtificialNeural Network

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Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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Authors: Dong Ming, Chen Haipeng

Abstract:

POS (also been called DGPS/IMU) technique can obtain the Exterior Orientation Elements of aerial photo, so the triangulation and DLG production using POS can save large numbers of ground control points (GCP), and this will improve the produce efficiency of DLG and reduce the cost of collecting GCP. This paper mainly research on POS technique in production of 1:10 000 scale DLG on GCP distribution. We designed 23 kinds of ground control points distribution schemes, using integrated sensor direction method to do the triangulation experiments, based on the results of triangulation, we produce a map with the scale of 1:10 000 and test its accuracy. This paper put forward appropriate GCP distributing schemes by experiments and research above, and made preparations for the application of POS technique on photogrammetry 4D data production.

Keywords: POS, IMU, DGPS, DLG, ground control point, triangulation

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Authors: Muhibul Haque Bhuyan, Md. Refat Sarder

Abstract:

If a person can monitor his/her oxygen saturation level intermittently then he/she can identify his/her condition early and thus he/she can seek a doctor’s help. This paper reports the design, simulation, and implementation of a low-cost pulse oxygen saturation measurement device based on a reflective photoplethysmography (PPG) system using an integrated circuit sensor as the fundamental component of this health status checking device. The measurement of the physiological parameter is the blood oxygen saturation level (SpO₂) in the peripheral capillary. This work has been implemented using an Arduino Uno R3 microcontroller along with this sensor integrated circuit (IC). The system is designed in the Proteus environment and then simulated to check its performance. After that, the hardware implementation is performed. We used a clipping type optical sensor to sense the arterial oxygen saturation level of blood signal from the fingertips of an individual and then transformed it into the digital data in the microcontroller through its programming its instruction. The designed system was tested by measuring the SpO₂ level for several people of different ages, from 12 to 57 years of age. Besides, the same people were tested using a standard machine purchased from the market. Test results were found very satisfactory as the average percentage of error was very low, 1.59% only.

Keywords: Digital pulse oxygen saturation level, oximeter, measurement, design, simulation, implementation, proteus, Arduino Uno microcontroller.

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Authors: Tatjana Eitrich, Bruno Lang

Abstract:

This work deals with aspects of support vector learning for large-scale data mining tasks. Based on a decomposition algorithm that can be run in serial and parallel mode we introduce a data transformation that allows for the usage of an expensive generalized kernel without additional costs. In order to speed up the decomposition algorithm we analyze the problem of working set selection for large data sets and analyze the influence of the working set sizes onto the scalability of the parallel decomposition scheme. Our modifications and settings lead to improvement of support vector learning performance and thus allow using extensive parameter search methods to optimize classification accuracy.

Keywords: Support Vector Machines, Shared Memory Parallel Computing, Large Data

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Authors: Aakash Subramanian, Vansh Pal Singh Makh, Abhijit Mitra

Abstract:

A new digital transceiver circuit for asynchronous frame detection is proposed where both the transmitter and receiver contain all digital components, thereby avoiding possible use of conventional devices like monostable multivibrators with unstable external components such as resistances and capacitances. The proposed receiver circuit, in particular, uses a combinational logic block yielding an output which changes its state as soon as the start bit of a new frame is detected. This, in turn, helps in generating an efficient receiver sampling clock. A data latching circuit is also used in the receiver to latch the recovered data bits in any new frame. The proposed receiver structure is also extended from 4- bit information to any general n data bits within a frame with a common expression for the output of the combinational logic block. Performance of the proposed hardware design is evaluated in terms of time delay, reliability and robustness in comparison with the standard schemes using monostable multivibrators. It is observed from hardware implementation that the proposed circuit achieves almost 33 percent speed up over any conventional circuit.

Keywords: Asynchronous Communication, Digital Detector, Combinational logic output, Sampling clock generator, Hardwareimplementation.

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Authors: Wisuwat Plodpradista

Abstract:

Tubular linear induction motor (TLIM) can be used as a capsule pump in a large pneumatic capsule pipeline (PCP) system. Parametric performance evaluation of the designed 1-meter diameter PCP-TLIM system yields encouraging results for practical implementation. The capsule thrust and speed inside the TLIM pump can be calculated from the combination of the PCP fluid mechanics and the TLIM equations. The TLIM equivalent circuits derived from those of the conventional three-phase induction motor are used as a model to predict the static test results of a small-scale PCP-TLIM system. In this paper, additional dynamic tests are performed on the same small-scale PCP-TLIM system with two capsules of different diameters. The behaviors of the capsule inside the pump are observed and analyzed. The dynamic performances from the dynamic tests are compared with the theoretical predictions based on the TLIM equivalent circuit model.

Keywords: Pneumatic capsule pipeline, Tubular linear induction motor

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Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza

Abstract:

This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.

Keywords: Divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver.

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Authors: M.Nafar, A.H.Gheisari, A.Alesaadi

Abstract:

Since large power transformers are the most expensive and strategically important components of any power generator and transmission system, their reliability is crucially important for the energy system operation. Also, Circuit breakers are very important elements in the power transmission line so monitoring the events gives a knowledgebase to determine time to the next maintenance. This paper deals with the introduction of the comparative method of the state estimation of transformers and Circuit breakers using continuous monitoring of voltage, current. This paper gives details a new method based on wavelet to apparatus insulation monitoring. In this paper to insulation monitoring of transformer, a new method based on wavelet transformation and neutral point analysis is proposed. Using the EMTP tools, fault in transformer winding and the detailed transformer winding model were simulated. The current of neutral point of winding was analyzed by wavelet transformation. It is shown that the neutral current of the transformer winding has useful information about fault in insulation of the transformer.

Keywords: Wavelet, Power Transformer, EMTP, CircuitBreaker, Monitoring

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Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar

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The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.

Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.

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Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

Abstract:

A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.

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Authors: G. Renuka Devi

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This paper analyzes the experimental investigation of indirect field oriented control of Field Programmable Gate Array (FPGA) based five-phase induction motor drive. A detailed d-q modeling and Space Vector Pulse Width Modulation (SVPWM) technique of 5-phase drive is elaborated in this paper. In the proposed work, the prototype model of 1 hp 5-phase Voltage Source Inverter (VSI) fed drive is implemented in hardware. SVPWM pulses are generated in FPGA platform through Very High Speed Integrated Circuit Hardware Description Language (VHDL) coding. The experimental results are observed under different loading conditions and compared with simulation results to validate the simulation model.

Keywords: Five-phase induction motor drive, field programmable gate array, indirect field oriented control, multi-phase, space vector pulse width modulation, voltage source inverter, very high speed integrated circuit hardware description language.

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Authors: N. Ahmed, A.J. Day, J.L. Victory L. Zeall, B. Young

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The manufacture of large-scale precision aerospace components using CNC requires a highly effective maintenance strategy to ensure that the required accuracy can be achieved over many hours of production. This paper reviews a strategy for a maintenance management system based on Failure Mode Avoidance, which uses advanced techniques and technologies to underpin a predictive maintenance strategy. It is shown how condition monitoring (CM) is important to predict potential failures in high precision machining facilities and achieve intelligent and integrated maintenance management. There are two distinct ways in which CM can be applied. One is to monitor key process parameters and observe trends which may indicate a gradual deterioration of accuracy in the product. The other is the use of CM techniques to monitor high status machine parameters enables trends to be observed which can be corrected before machine failure and downtime occurs. It is concluded that the key to developing a flexible and intelligent maintenance framework in any precision manufacturing operation is the ability to evaluate reliably and routinely machine tool condition using condition monitoring techniques within a framework of Failure Mode Avoidance.

Keywords: Maintenance, Condition Monitoring, CNC, Machining, Accuracy, Capability, Key Process Parameters, Critical Parameters

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Authors: Roland Pusch, Richard Weston

Abstract:

The scale dependence of the strength of virtually homogeneous rock is usually considered to be insignificant but the spectrum of discontinuities plays a very important role for the strength of differently sized rock elements and also controls the rock creep strain. Large-scale load tests comprised recording of the creep strain rate that was found to be strongly retarded and negligible for stresses lower than about 1/3 of the failure load. For higher stresses creep took place according to a log time law representing secondary creep that ultimately changed to tertiary creep and failure.

Keywords: Impact of scale, rock strength.

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Authors: A. Kojah, A. Nacaroğlu

Abstract:

Single phase transmission lines are used to transfer data or energy between two users. Transient conditions such as switching operations and short circuit faults cause the generation of the fluctuation on the waveform to be transmitted. Spatial voltage distribution on the single phase transmission line may change owing to the position and duration of the short circuit fault in the system. In this paper, the state space representation of the single phase transmission line for short circuit fault and for various types of terminations is given. Since the transmission line is modeled in time domain using distributed parametric elements, the mathematical representation of the event is given in state space (time domain) differential equation form. It also makes easy to solve the problem because of the time and space dependent characteristics of the voltage variations on the distributed parametrically modeled transmission line.

Keywords: Energy transmission, transient effects, transmission line, transient voltage, RLC short circuit, single phase.

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Authors: S. P. Singh

Abstract:

This paper measures technical and scale efficiencies of 40 Indian sugar companies for the period from 2004-05 to 2013-14. The efficiencies are estimated through input-oriented DEA models using one output variable—value of output (VOP) and five input variables—capital cost (CA), employee cost (EMP), raw material (RW), energy & fuel (E&F) and other manufacturing expenses (OME). The sugar companies are classified into integrated and non-integrated categories to know which one achieves higher level of efficiency. Sources of inefficiency in the industry are identified through decomposing the overall technical efficiency (TE) into pure technical efficiency (PTE) and scale efficiency (SE). The paper also estimates input-reduction targets for relatively inefficient companies and suggests measures to improve their efficiency level. The findings reveal that the TE does not evince any trend rather it shows fluctuations across years, largely due to erratic and cyclical pattern of sugar production. Further, technical inefficiency in the industry seems to be driven more by the managerial inefficiency than the scale inefficiency, which implies that TE can be improved through better conversion of inputs into output.

Keywords: Sugar industry, companies, technical efficiency, data envelopment analysis, targets.

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Authors: Azlin M. Azmi, T. Zhou, A. Rinoshika, L. Cheng

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The turbulent structures in the wake (x/d =10 to 60) of a screen cylinder have been educed to understand the roles of the various structures as evolving downstream by comparing with those obtained in a solid circular cylinder wake at Reynolds number, Re of 7000. Using a wavelet multiresolution technique, the flow structures are decomposed into a number of wavelet components based on their central frequencies. It is observed that in the solid cylinder wake, large-scale structures (of frequencyf₀ and 1.2 f₀) make the largest contribution to the Reynolds stresses although they start to lose their roles significantly at x/d> 20. In the screen cylinder wake, the intermediate-scale structures (2f₀ and 4f₀) contribute the most to the Reynolds stresses atx/d =10 before being taken over by the large-scale structures (f₀) further downstream.

Keywords: Turbulent structure, screen cylinder, vortex, wavelet multiresolution analysis.

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Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Yuan-Jhen Siao

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A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.

Keywords: Bridgeless boost, boost converter, power factor correction, hold-up time.

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Authors: Yukinari Minagi , Akinori Kanasugi

Abstract:

This paper describes about dynamic reconfiguration to miniaturize arithmetic circuits in general-purpose processor. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operation. The proposed arithmetic circuit performs floating-point arithmetic which is frequently used in science and technology. The data format is floating-point based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.

Keywords: dynamic reconfiguration, floating-point arithmetic, double precision, FPGA

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Authors: Intan Izafina Idrus, Mardina Abdullah, Alina Marie Hasbi, Asnawi Husin

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This paper presents the result of large-scale traveling ionospheric disturbance (LSTID) observation during moderate magnetic storm event on 25 October 2011 with SYM-H ~ -160 nT and Kp ~ 7 over Peninsular Malaysia at equatorial region using vertical total electron content (VTEC) from the Global Positioning System (GPS) observation measurement. The propagation of the LSTID signatures in the TEC measurements over Peninsular Malaysia was also investigated using VTEC map. The LSTID was found to propagate equatorward during this event. The results showed that the LSTID propagated with an average phase velocity of 526.41 m/s and average periods of 140 min. The occurrence of this LSTID was also found to be the subsequent effects of substorm activities in the auroral region.

Keywords: Global Positioning System (GPS), large-scale traveling ionospheric disturbance (LSTID), moderate geomagnetic storm, vertical total electron content (VTEC).

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Authors: Sanaz Haddadian, Rahele Hedayati

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A 10bit, 40 MSps, sample and hold, implemented in 0.18-μm CMOS technology with 3.3V supply, is presented for application in the front-end stage of an analog-to-digital converter. Topology selection, biasing, compensation and common mode feedback are discussed. Cascode technique has been used to increase the dc gain. The proposed opamp provides 149MHz unity-gain bandwidth (wu), 80 degree phase margin and a differential peak to peak output swing more than 2.5v. The circuit has 55db Total Harmonic Distortion (THD), using the improved fully differential two stage operational amplifier of 91.7dB gain. The power dissipation of the designed sample and hold is 4.7mw. The designed system demonstrates relatively suitable response in different process, temperature and supply corners (PVT corners).

Keywords: Analog Integrated Circuit Design, Sample & Hold Amplifier and CMOS Technology.

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Authors: Wenlong Feng, Zhenchun Du, Jianguo Yang

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To decrease the grating scale thermal expansion error, a novel method which based on multiple temperature detection is proposed. Several temperature sensors are installed on the grating scale and the temperatures of these sensors are recorded. The temperatures of every point on the grating scale are calculated by interpolating between adjacent sensors. According to the thermal expansion principle, the grating scale thermal expansion error model can be established by doing the integral for the variations of position and temperature. A novel compensation method is proposed in this paper. By applying the established error model, the grating scale thermal expansion error is decreased by 90% compared with no compensation. The residual positioning error of the grating scale is less than 15μm/10m and the accuracy of the machine tool is significant improved.

Keywords: Thermal expansion error of grating scale, error compensation, machine tools, integral method.

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Authors: Andrey A. Chernousov, Ben Y. B. Chan

Abstract:

The thermal behavior of a large-scale, phase change material (PCM) enhanced building envelope system was studied in regard to the need for pre-fabricated construction in subtropical regions. The proposed large-scale envelope consists of a reinforced aluminum skin, insulation core, phase change material and reinforced gypsum board. The PCM impact on an energy efficiency of an enveloped room was resolved by validation of the EnergyPlus numerical scheme and optimization of a smart material location in the core. The PCM location was optimized by a minimization method of a cooling energy demand. It has been shown that there is good agreement between the test and simulation results. The optimal location of the PCM layer in Hong Kong summer conditions has been then recomputed for core thicknesses of 40, 60 and 80 mm. A non-dimensional value of the optimal PCM location was obtained to be same for all the studied cases and the considered external and internal conditions.

Keywords: Thermal performance, phase change material, energy efficiency, PCM optimization.

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Authors: Arup K. George, Wai Pan Chan, Zhi Hui Kong, Minkyu Je

Abstract:

This paper describes a low-power second-order filter for a continuous-time chopper stabilized capacitive sensor interface, integrated with a fully differential post-CMOS surface-micromachined MEMS pressure sensor. The circuit uses a single-ended folded-cascode operational amplifier and two GM-C filters connected in cascade. The circuit is realized in a 0.18 μm CMOS process and offers differential to single-ended conversion. The novelty of the scheme is the cascade of two GM-C filters to achieve a second-order filter while minimizing power dissipation. The simulated filter cutoff frequency is 1.14 kHz at common-mode voltage 1.65 V, operating from a 3.3 V supply while dissipating 172μW of power. The filter achieves an operating range of 1V for an output load of 1MOhm and 10pF.

Keywords: Chopper Stabilization, MEMS, Pressure Sensors, Low Pass Filter

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Authors: Ki-Jin Kim, Sanghoon Park, K. H. Ahn

Abstract:

This paper presents the 20-GHz fractional PLL (Phase Locked Loop) circuit for the next generation Wi-Fi by using 90 nm TSMC process. The newly suggested millimeter wave 16/17 pre-scalar is designed and verified by measurement to make the fractional PLL having a low quantization noise. The operational bandwidth of the 60 GHz system is 15 % of the carrier frequency which requires large value of Kv (VCO control gain) resulting in degradation of phase noise. To solve this problem, this paper adopts AFC (Automatic Frequency Controller) controlled 4-bit millimeter wave VCO with small value of Kv. Also constant Kv is implemented using 4-bit varactor bank. The measured operational bandwidth is 18.2 ~ 23.2 GHz which is 25 % of the carrier frequency. The phase noise of -58 and -96.2 dBc/Hz at 100 KHz and 1 MHz offset is measured respectively. The total power consumption of the PLL is only 30 mW.

Keywords: Millimeter Wave Fractional PLL, Wide band VCO, WPAN Transceiver.

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Authors: Brandon Foggo, Nanpeng Yu

Abstract:

Power distribution circuits undergo frequent network topology changes that are often left undocumented. As a result, the documentation of a circuit’s connectivity becomes inaccurate with time. The lack of reliable circuit connectivity information is one of the biggest obstacles to model, monitor, and control modern distribution systems. To enhance the reliability and efficiency of electric power distribution systems, the circuit’s connectivity information must be updated periodically. This paper focuses on one critical component of a distribution circuit’s topology - the secondary transformer to phase association. This topology component describes the set of phase lines that feed power to a given secondary transformer (and therefore a given group of power consumers). Finding the documentation of this component is call Phase Identification, and is typically performed with physical measurements. These measurements can take time lengths on the order of several months, but with supervised learning, the time length can be reduced significantly. This paper compares several such methods applied to Phase Identification for a large range of real distribution circuits, describes a method of training data selection, describes preprocessing steps unique to the Phase Identification problem, and ultimately describes a method which obtains high accuracy (> 96% in most cases, > 92% in the worst case) using only 5% of the measurements typically used for Phase Identification.

Keywords: Distribution network, machine learning, network topology, phase identification, smart grid.

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Authors: Christina G. Siontorou

Abstract:

This paper presents an integrated knowledge-based approach to multi-scale modeling of aquatic systems, with a view to enhancing predictive power and aiding environmental management and policy-making. The basic phases of this approach have been exemplified in the case of a bay in Saronicos Gulf (Attiki, Greece). The results showed a significant problem with rising phytoplankton blooms linked to excessive microbial growth, arisen mostly due to increased nitrogen inflows; therefore, the nitrification/denitrification processes of the benthic and water column sub-systems have provided the quality variables to be monitored for assessing environmental status. It is thereby demonstrated that the proposed approach facilitates modeling choices and implementation option decisions, while it provides substantial support for knowledge and experience capitalization in long-term water management.

Keywords: Aquatic ecosystem, integrated modeling, multi-scale modeling, ontological platform.

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Authors: Kwa-Sur Tam

Abstract:

This paper reviews various approaches that have been used for the modeling and simulation of large-scale engineering systems and determines their appropriateness in the development of a RICS modeling and simulation tool. Bond graphs, linear graphs, block diagrams, differential and difference equations, modeling languages, cellular automata and agents are reviewed. This tool should be based on linear graph representation and supports symbolic programming, functional programming, the development of noncausal models and the incorporation of decentralized approaches.

Keywords: Interdisciplinary, dynamic, functional programming, object-oriented.

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Authors: Hossein Sahoolizadeh, Alishir Moradi Kordalivand, Zargham Heidari

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In first stage of each microwave receiver there is Low Noise Amplifier (LNA) circuit, and this stage has important rule in quality factor of the receiver. The design of a LNA in Radio Frequency (RF) circuit requires the trade-off many importance characteristics such as gain, Noise Figure (NF), stability, power consumption and complexity. This situation Forces desingners to make choices in the desing of RF circuits. In this paper the aim is to design and simulate a single stage LNA circuit with high gain and low noise using MESFET for frequency range of 5 GHz to 6 GHz. The desing simulation process is down using Advance Design System (ADS). A single stage LNA has successfully designed with 15.83 dB forward gain and 1.26 dB noise figure in frequency of 5.3 GHz. Also the designed LNA should be working stably In a frequency range of 5 GHz to 6 GHz.

Keywords: Advance Design System, Low Noise Amplifier, Radio Frequency, Noise Figure.

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Authors: AL.AL, M. B. I. Reaz, S. M. A. Motakabber, Mohd Alauddin Mohd Ali

Abstract:

Nowadays it is a trend for electronic circuit designers to integrate all system components on a single-chip. This paper proposed the design of a single-chip proportional to absolute temperature (PTAT) sensor including a voltage reference circuit using CEDEC 0.18m CMOS Technology. It is a challenge to design asingle-chip wide range linear response temperature sensor for many applications. The channel widths between the compensation transistor and the reference transistor are critical to design the PTAT temperature sensor circuit. The designed temperature sensor shows excellent linearity between -100°C to 200° and the sensitivity is about 0.05mV/°C. The chip is designed to operate with a single voltage source of 1.6V.

Keywords: PTAT, single-chip circuit, linear temperature sensor, CMOS technology.

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