Search results for: Floating Gate MOSFET

Authors: Santanu Santra, Utpal Roy

Abstract:

The most important mathematical operation for any computing system is addition. An efficient adder can be of greater assistance in designing of any arithmetic circuits. Quantum-dot Cellular Automata (QCA) is a promising nanotechnology to create electronic circuits for computing devices and suitable candidate for next generation of computing systems. The article presents a modest approach to implement a novel XOR gate. The gate is simple in structure and powerful in terms of implementing digital circuits. By applying the XOR gate, the hardware requirement for a QCA circuit can be decrease and circuits can be simpler in level, clock phase and cell count. In order to verify the functionality of the proposed device some implementation of Half Adder (HA) and Full Adder (FA) is checked by means of computer simulations using QCA-Designer tool. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.

Keywords: Clock, Computing system, Majority gate, QCA, QCA Designer.

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Authors: Liu Shengnan, Sun Liping, Zhu Jianxun

Abstract:

Based on three dimensional potential flow theory and hinged rigid body motion equations, structure RAOs of Pelamis wave energy converter is analyzed. Analysis of numerical simulation is carried out on Pelamis in the irregular wave conditions, and the motion response of structures and total generated power is obtained. The paper analyzes influencing factors on the average power including diameter of floating body, section form of floating body, draft, hinged stiffness and damping. The optimum parameters are achieved in Zhejiang Province. Compared with the results of the pelamis experiment made by Glasgow University, the method applied in this paper is feasible.

Keywords: Pelamis, Hinge, Floating multibody, Wave energy

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Authors: Abhijit Mitra

Abstract:

we propose a new normalized LMS (NLMS) algorithm, which gives satisfactory performance in certain applications in comaprison with con-ventional NLMS recursion. This new algorithm can be treated as a block based simplification of NLMS algorithm with significantly reduced number of multi¬ply and accumulate as well as division operations. It is also shown that such a recursion can be easily implemented in block floating point (BFP) arithmetic, treating the implementational issues much efficiently. In particular, the core challenges of a BFP realization to such adaptive filters are mainly considered in this regard. A global upper bound on the step size control parameter of the new algorithm due to BFP implementation is also proposed to prevent overflow in filtering as well as weight updating operations jointly.

Keywords: Adaptive algorithm, Block floating point arithmetic, Implementation issues, Normalized least mean square methods

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Authors: Yasuhiro Sato, Kodai Noma, Kenta Sawada, Kazumasa Adachi, Yoshinori Matruura, Saori Iwanaga

Abstract:

RFID system is used to identify objects such as passenger identification in public transportation, instead of linear or 2-dimensional barcodes. Key advantages of RFID system are to identify objects without physical contact, and to write arbitrary information into RFID tag. These advantages may help to improve maritime safety and efficiency of activity on the sea. However, utilization of RFID system for maritime scenes has not been considered. In this paper, we evaluate the availability of a generic RFID system operating on the sea. We measure RSSI between RFID tag floating on the sea and RFID antenna, and check whether a RFID reader can access a tag or not, while the distance between a floating buoy and the ship, and the angle are changed. Finally, we discuss the feasibility and the applicability of RFID system on the sea through the results of our preliminary experiment.

Keywords: RFID, Experimental Evaluation, RSSI, Maritime use.

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Authors: P. Jelodarian , E. Farshidi

Abstract:

In this paper, a new approach for design of a fully differential second order current mode continuous-time sigma-delta modulator is presented. For circuit implementation, square root domain (SRD) translinear loop based on floating-gate MOS transistors that operate in saturation region is employed. The modulator features, low supply voltage, low power consumption (8mW) and high dynamic range (55dB). Simulation results confirm that this design is suitable for data converters.

Keywords: Sigma-delta, current-mode, translinear loop, geometric mean, squarer/divider.

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Authors: Attila Balogh, Eszter Varga, István Varjasi

Abstract:

Nowadays there are several grid connected converter in the grid system. These grid connected converters are generally the converters of renewable energy sources, industrial four quadrant drives and other converters with DC link. These converters are connected to the grid through a three phase bridge. The standards prescribe the maximal harmonic emission which could be easily limited with high switching frequency. The increased switching losses can be reduced to the half with the utilization of the wellknown Flat-top modulation. The suggested control method is the expansion of the Flat-top modulation with which the losses could be also reduced to the half compared to the Flat-top modulation. Comparing to traditional control these requirements can be simultaneously satisfied much better with the DLF (DC Link Floating) method.

Keywords: DC link floating, high efficiency, PV converter, control method.

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Authors: Po-Hsieh Lin, Jyi-Tsong Lin

Abstract:

A vertical SOI-based MOSFET with trench body structure operated as 1T DRAM cell at various temperatures has been studied and investigated. Different operation temperatures are assigned for the device for its performance comparison, thus the thermal stability is carefully evaluated for the future memory device applications. Based on the simulation, the vertical SOI-based MOSFET with trench body structure demonstrates the electrical characteristics properly and possess conspicuous kink effect at various operation temperatures. Transient characteristics were also performed to prove that its programming window values and retention time behaviors are acceptable when the new 1T DRAM cell is operated at high operation temperature.

Keywords: SOI, 1T DRAM, thermal stability.

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Authors: P. H. Le, J. Molina, S. Hirai

Abstract:

In this work, we propose the application of Japanese “Origami” art for a floating function of a small aerial vehicle such as a hexarotor. A preliminary experiment was conducted using Origami magic balls mounted under a hexarotor. This magic ball can expand and shrink using an air pump during free flying. Using this interesting and functional concept, it promises to reduce the resistance of wind as well as reduce the energy consumption when the Origami balls are deflated. This approach can be particularly useful in rescue emergency situations. Furthermore, there are many unexpected reasons that may cause the multi-rotor has to land on the surface of water due to problems with the communication between the aircraft and the ground station. In addition, a complementary experiment was designed to prove that the hexarotor can fly maintaining the stability and also, takes off and lands on the surface of water using air balloons.

Keywords: Helicopter, Japanese Origami ball, Floating, Aerial Robots, Rescue.

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Authors: Alan Crowle, Philpp Thies

Abstract:

s the floating offshore wind turbine industry continues to develop and grow, the capabilities of established port facilities need to be assessed as to their ability to support the expanding construction and installation requirements. This paper assesses current infrastructure requirements and projected changes to port facilities that may be required to support the floating offshore wind industry. Understanding the infrastructure needs of the floating offshore renewable industry will help to identify the port-related requirements. Floating offshore wind turbines can be installed further out to sea and in deeper waters than traditional fixed offshore wind arrays, meaning it can take advantage of stronger winds. Separate ports are required for substructure construction, fit-out of the turbines, moorings, subsea cables and maintenance. Large areas are required for the laydown of mooring equipment, inter array cables, turbine blades and nacelles. The capabilities of established port facilities to support floating wind farms are assessed by evaluation of size of substructures, height of wind turbine with regards to the cranes for fitting of blades, distance to offshore site and offshore installation vessel characteristics. The paper will discuss the advantages and disadvantages of using large land based cranes, inshore floating crane vessels or offshore crane vessels at the fit-out port for the installation of the turbine. Water depths requirements for import of materials and export of the completed structures will be considered. There are additional costs associated with any emerging technology. However, part of the popularity of Floating Offshore Wind Turbines stems from the cost savings against permanent structures like fixed wind turbines. Floating Offshore Wind Turbine developers can benefit from lighter, more cost effective equipment which can be assembled in port and towed to site rather than relying on large, expensive installation vessels to transport and erect fixed bottom turbines. The ability to assemble Floating Offshore Wind Turbines equipment on shore means minimising highly weather dependent operations like offshore heavy lifts and assembly, saving time and costs and reducing safety risks for offshore workers. Maintenance might take place in safer onshore conditions for barges and semi submersibles. Offshore renewables, such as floating wind, can take advantage of this wealth of experience, while oil and gas operators can deploy this experience at the same time as entering the renewables space. The floating offshore wind industry is in the early stages of development and port facilities are required for substructure fabrication, turbine manufacture, turbine construction and maintenance support. The paper discusses the potential floating wind substructures as this provides a snapshot of the requirements at the present time, and potential technological developments required for commercial development. Scaling effects of demonstration-scale projects will be addressed; however the primary focus will be on commercial-scale (30+ units) device floating wind energy farms.

Keywords: Floating offshore wind turbine, port logistics, installation, construction.

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Authors: E. Farshidi

Abstract:

This paper presents the design of a low power second-order continuous-time sigma-delta modulator for low power applications. The loop filter of this modulator has been implemented based on the nonlinear transconductance-capacitor (Gm-C) by employing current-mode technique. The nonlinear transconductance uses floating gate MOS (FG-MOS) transistors that operate in weak inversion region. The proposed modulator features low power consumption (<80uW), low supply voltage (1V) and 62dB dynamic range. Simulation results by HSPICE confirm that it is very suitable for low power biomedical instrumentation designs.

Keywords: Sigma-delta, modulator, Current-mode, Nonlinear Transconductance, FG-MOS.

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Authors: Akinori Ozaki

Abstract:

In this study, in order to clarify wind-induced phenomena, especially vertical mixing of density stratification in a closed water area with floating-leaved plants, we conducted hydraulic experiments on wind flow characteristics, wind wave characteristics, entrainment phenomena and turbulent structure by using a wind tunnel test tank and simulated floating-leaved plants. From the experimental results of wind flow and wind wave characteristics, we quantified the impact of the occupancy rate of the plants on their resistance characteristics. From the experimental results of entrainment phenomena, we defined the parameter that could explain the magnitude of mixing between the density stratifications, and quantified the impact of the occupancy rate on vertical mixing between stratifications. From the experimental results of the turbulent structure of the upper layer, we clarified the differences in small-scale turbulence components at each occupancy rate and quantified the impact of the occupancy rate on the turbulence characteristics. For a summary of this study, we theoretically quantified wind-induced entrainment phenomena in a closed water area with luxuriant growth of floating-leaved plants. The results indicated that the impact of luxuriant growth of floating-leaved plants in a closed water body could be seen in the difference in small-scale fluid characteristics, and these characteristics could be expressed using the small-scale turbulent components.

Keywords: Density Stratification, Floating-leaved Plant, Wind-induced Entrainment Phenomenon, Turbulent Structure

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Authors: Fatemeh Karimi, Morteza Fathipour, Hamdam Ghanatian, Vala Fathipour

Abstract:

In this paper we investigate the electrical characteristics of a new structure of gate all around strained silicon nanowire field effect transistors (FETs) with dual dielectrics by changing the radius (RSiGe) of silicon-germanium (SiGe) wire and gate dielectric. Indeed the effect of high-κ dielectric on Field Induced Barrier Lowering (FIBL) has been studied. Due to the higher electron mobility in tensile strained silicon, the n-type FETs with strained silicon channel have better drain current compare with the pure Si one. In this structure gate dielectric divided in two parts, we have used high-κ dielectric near the source and low-κ dielectric near the drain to reduce the short channel effects. By this structure short channel effects such as FIBL will be reduced indeed by increasing the RSiGe, ID-VD characteristics will be improved. The leakage current and transfer characteristics, the threshold-voltage (Vt), the drain induced barrier height lowering (DIBL), are estimated with respect to, gate bias (VG), RSiGe and different gate dielectrics. For short channel effects, such as DIBL, gate all around strained silicon nanowire FET have similar characteristics with the pure Si one while dual dielectrics can improve short channel effects in this structure.

Keywords: SNWT (silicon nanowire transistor), Tensile Strain, high-κ dielectric, Field Induced Barrier Lowering (FIBL), cylindricalnano wire (CW), drain induced barrier lowering (DIBL).

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Authors: Kittipong Tripetch

Abstract:

This paper proposes a study of input impedance of 2 types of CMOS active inductors. It derives 2 input impedance formulas. The first formula is the input impedance of the grounded active inductor. The second formula is the input impedance of the floating active inductor. After that, these formulas can be used to simulate magnitude and phase response of input impedance as a function of current consumption with MATLAB. Common mode rejection ratio (CMRR) of the fully differential bandpass amplifier is derived based on superposition principle. CMRR as a function of input frequency is plotted as a function of current consumption. 

Keywords: Grounded active inductor, floating active inductor, Fully differential bandpass amplifier.

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Authors: Abhijit Mitra

Abstract:

This paper proposes an efficient finite precision block floating point (BFP) treatment to the fixed coefficient finite impulse response (FIR) digital filter. The treatment includes effective implementation of all the three forms of the conventional FIR filters, namely, direct form, cascaded and par- allel, and a roundoff error analysis of them in the BFP format. An effective block formatting algorithm together with an adaptive scaling factor is pro- posed to make the realizations more simple from hardware view point. To this end, a generic relation between the tap weight vector length and the input block length is deduced. The implementation scheme also emphasises on a simple block exponent update technique to prevent overflow even during the block to block transition phase. The roundoff noise is also investigated along the analogous lines, taking into consideration these implementational issues. The simulation results show that the BFP roundoff errors depend on the sig- nal level almost in the same way as floating point roundoff noise, resulting in approximately constant signal to noise ratio over a relatively large dynamic range.

Keywords: Finite impulse response digital filters, Cascade structure, Parallel structure, Block floating point arithmetic, Roundoff error.

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Authors: Ahmet Turer

Abstract:

Middle-gate is located in Hasankeyf, Batman dating back to 1800 BC and is one of the important historical structures in Turkey. The ancient structure has suffered major structural cracks due to aging as well as lateral pressure of a cracked rock which is predicted to be about 100 tons. The existing support system was found to be inadequate to support the load especially after a recent rock fall in the close vicinity. Concerns were increased since the existing support system that is integral with a damaged and cracked gate wall needed to be replaced by a new support system. The replacement process must be carefully monitored by crackmeters and control mechanisms should be integrated to prevent cracks to expand while the same crack width needs to be maintained after the operation. The control system and actions taken during the intervention are explained in this paper.

Keywords: structural control, crack width, replacement, support

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Authors: Srinivasan Chandrasekaran, Shihas A. Khader

Abstract:

Motion response of floating structures is of great concern in marine engineering. Nonlinearity is an inherent property of any floating bodies subjected to irregular waves. These floating structures are continuously subjected to environmental loadings from wave, current, wind etc. This can result in undesirable motions of the vessel which may challenge the operability. For a floating body to remain in its position, it should be able to induce a restoring force when displaced. Mooring is provided to enable this restoring force. This paper discusses the hydrodynamic performance and motion characteristics of an 8 point spread mooring system applied to a pipe laying barge operating in the West African sea. The modelling of the barge is done using a computer aided-design (CAD) software RHINOCEROS. Irregular waves are generated using a suitable wave spectrum. Both frequency domain and time domain analysis is done. Numerical simulations based on potential theory are carried out to find the responses and hydrodynamic performance of the barge in both free floating as well as moored conditions. Initially, potential flow frequency domain analysis is done to obtain the Response Amplitude Operator (RAO) which gives an idea about the structural motion in free floating state. RAOs for different wave headings are analyzed. In the following step, a time domain analysis is carried out to obtain the responses of the structure in the moored condition. In this study, wave induced motions are only taken into consideration. Wind and current loads are ruled out and shall be included in further studies. For the current study, 2000 seconds simulation is taken. The results represent wave induced motion responses, mooring line tensions and identify critical mooring lines.

Keywords: Irregular wave, moored barge, time domain analysis, numerical simulation.

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Authors: Fasil Endalamaw

Abstract:

Digital magnitude comparators based on Gate Diffusion Input (GDI) implementation technique are high speed and area-efficient, and they consume less power as compared to other implementation techniques. However, they are less efficient for some logic gates and have no full voltage swing. In this paper, we made a performance comparison between the GDI implementation technique and other implementation methods, such as Static CMOS, Pass Transistor Logic (PTL), and Transmission Gate (TG) in 90 nm, 120 nm, and 180 nm CMOS technologies using BSIM4 MOS model. We proposed a methodology (hybrid implementation) of implementing digital magnitude comparators which significantly improved the power, speed, area, and voltage swing requirements. Simulation results revealed that the hybrid implementation of digital magnitude comparators show a 10.84% (power dissipation), 41.6% (propagation delay), 47.95% (power-delay product (PDP)) improvement compared to the usual GDI implementation method. We used Microwind & Dsch Version 3.5 as well as the Tanner EDA 16.0 tools for simulation purposes.

Keywords: Efficient, gate diffusion input, high speed, low power, CMOS.

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Authors: Shuvro Chowdhury, Esmat Farzana, Rizvi Ahmed, A. T. M. Golam Sarwar, M. Ziaur Rahman Khan

Abstract:

The threshold voltage and capacitance voltage characteristics of ultra-thin Silicon-on-Insulator MOSFET are greatly influenced by the thickness and doping concentration of the silicon film. In this work, the capacitance voltage characteristics and threshold voltage of the device have been analyzed with quantum mechanical effects using the Self-Consistent model. Reduction of channel thickness and adding doping impurities cause an increase in the threshold voltage. Moreover, the temperature effects cause a significant amount of threshold voltage shift. The temperature dependence of threshold voltage has also been observed with Self- Consistent approach which are well supported from experimental performance of practical devices.

Keywords: C-V characteristics, Self-Consistent Analysis, Siliconon-Insulator, Ultra-thin film.

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Authors: Shubhajit Roy Chowdhury, Aritra Banerjee, Aniruddha Roy, Hiranmay Saha

Abstract:

The paper proposes the novel design of a 3T XOR gate combining complementary CMOS with pass transistor logic. The design has been compared with earlier proposed 4T and 6T XOR gates and a significant improvement in silicon area and power-delay product has been obtained. An eight transistor full adder has been designed using the proposed three-transistor XOR gate and its performance has been investigated using 0.15um and 0.35um technologies. Compared to the earlier designed 10 transistor full adder, the proposed adder shows a significant improvement in silicon area and power delay product. The whole simulation has been carried out using HSPICE.

Keywords: XOR gate, full adder, improvement in speed, area minimization, transistor count minimization.

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Authors: E. Farshidi

Abstract:

In this paper, based on a novel synthesis, a set of new simplified circuit design to implement the linguistic-hedge operations for adjusting the fuzzy membership function set is presented. The circuits work in current-mode and employ floating-gate MOS (FGMOS) transistors that operate in weak inversion region. Compared to the other proposed circuits, these circuits feature severe reduction of the elements number, low supply voltage (0.7V), low power consumption (<200nW), immunity from body effect and wide input dynamic range (>60dB). In this paper, a set of fuzzy linguistic hedge circuits, including absolutely, very, much more, more, plus minus, more or less and slightly, has been implemented in 0.18 mm CMOS process. Simulation results by Hspice confirm the validity of the proposed design technique and show high performance of the circuits.

Keywords: Current-mode, Linguistic-Hedge, Fuzzy Logic, lowpower

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Authors: Kariyappa B. S., Hariprasad S. A., R. Nagaraj

Abstract:

In this paper, a new method of controlling position of AC Servomotor using Field Programmable Gate Array (FPGA). FPGA controller is used to generate direction and the number of pulses required to rotate for a given angle. Pulses are sent as a square wave, the number of pulses determines the angle of rotation and frequency of square wave determines the speed of rotation. The proposed control scheme has been realized using XILINX FPGA SPARTAN XC3S400 and tested using MUMA012PIS model Alternating Current (AC) servomotor. Experimental results show that the position of the AC Servo motor can be controlled effectively. KeywordsAlternating Current (AC), Field Programmable Gate Array (FPGA), Liquid Crystal Display (LCD).

Keywords: Alternating Current (AC), Field Programmable Gate Array (FPGA), Liquid Crystal Display (LCD).

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Authors: K. B. Cullen, G. C. M. Silvestre, N. J. Hurley

Abstract:

This paper presents software tools that convert the C/Cµ floating point source code for a DSP algorithm into a fixedpoint simulation model that can be used to evaluate the numericalperformance of the algorithm on several different fixed pointplatforms including microprocessors, DSPs and FPGAs. The tools use a novel system for maintaining binary point informationso that the conversion from floating point to fixed point isautomated and the resulting fixed point algorithm achieves maximum possible precision. A configurable architecture is used during the simulation phase so that the algorithm can produce a bit-exact output for several different target devices.

Keywords: DSP devices, DSP algorithm, simulation model, software

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Authors: Chungkuk Jin, Moohyun Kim, Woo Chul Chung

Abstract:

This paper presents global performance and dynamic behaviors of a discrete-pontoon-type floating bridge with mooring lines in time domain under wind and wave excitations. The structure is designed for long-distance and deep-water crossing and consists of the girder, columns, pontoons, and mooring lines. Their functionality and behaviors are investigated by using elastic-floater/mooring fully-coupled dynamic simulation computer program. Dynamic wind, first- and second-order wave forces, and current loads are considered as environmental loads. Girder’s dynamic responses and mooring tensions are analyzed under different analysis methods and environmental conditions. Girder’s lateral responses are highly influenced by the second-order wave and wind loads while the first-order wave load mainly influences its vertical responses.

Keywords: Floating bridge, elastic dynamic response, coupled dynamics, mooring line, pontoon, wave/wind excitation, resonance, second-order effect.

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: Abdelmalek Fermas, Adel Belouchrani, Otmane Ait Mohamed

Abstract:

In Blind Source Separation (BSS) processing, taking advantage of scaling factor indetermination and based on the floatingpoint representation, we propose a scaling technique applied to the separation matrix, to avoid the saturation or the weakness in the recovered source signals. This technique performs an Automatic Gain Control (AGC) in an on-line BSS environment. We demonstrate the effectiveness of this technique by using the implementation of a division free BSS algorithm with two input, two output. This technique is computationally cheaper and efficient for a hardware implementation.

Keywords: Automatic Gain Control, Blind Source Separation, Floating-Point Representation, FPGA Implementation.

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Authors: Mehdi Moayyedian, Kazem Abhary, Romeo Marian

Abstract:

This paper presents an evaluation of a plastic defect in injection molding before it occurs in the process; it is known as the short shot defect. The evaluation of different parameters which affect the possibility of short shot defect is the aim of this paper. The analysis of short shot possibility is conducted via SolidWorks Plastics and Taguchi method to determine the most significant parameters. Finite Element Method (FEM) is employed to analyze two circular flat polypropylene plates of 1 mm thickness. Filling time, part cooling time, pressure holding time, melt temperature and gate type are chosen as process and geometric parameters, respectively. A methodology is presented herein to predict the possibility of the short-shot occurrence. The analysis determined melt temperature is the most influential parameter affecting the possibility of short shot defect with a contribution of 74.25%, and filling time with a contribution of 22%, followed by gate type with a contribution of 3.69%. It was also determined the optimum level of each parameter leading to a reduction in the possibility of short shot are gate type at level 1, filling time at level 3 and melt temperature at level 3. Finally, the most significant parameters affecting the possibility of short shot were determined to be melt temperature, filling time, and gate type.

Keywords: Injection molding, plastic defects, short shot, Taguchi method.

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Authors: Indre Brazauskaite, Vilte Auruskeviciene

Abstract:

The paper explores the Stage-Gate framework application for innovation maturity among small and medium-sized enterprises (SMEs). Innovation management becomes an essential business survival process for all sizes of organizations that can be evaluated and audited systemically. This research systemically defines and assesses the innovation process from the perspective of the company’s top management. Empirical research explores attitudes and existing practices of innovation management in SMEs in Baltic countries. It structurally investigates the current innovation management practices, level of standardization, and potential challenges in the area. Findings allow to structure of existing practices based on an institutionalized model and contribute to a more advanced understanding of the innovation process among SMEs. Practically, findings contribute to advanced decision-making and business planning in the process.

Keywords: innovation measure, innovation process, small and medium-sized enterprises, SMEs, stage-gate framework.

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Authors: Nur Syarafina Binti Othman, Tsubasa Jindo, Makato Yamada, Miho Tsuyama, Hitoshi Nakano

Abstract:

A novel method to produce a fast high voltage solid states switch using Insulated Gate Bipolar Transistors (IGBTs) is presented for discharge-pumped gas lasers. The IGBTs are connected in series to achieve a high voltage rating. An avalanche transistor is used as the gate driver. The fast pulse generated by the avalanche transistor quickly charges the large input capacitance of the IGBT, resulting in a switch out of a fast high-voltage pulse. The switching characteristic of fast-high voltage solid state switch has been estimated in the multi-stage series-connected IGBT with the applied voltage of several tens of kV. Electrical circuit diagram and the mythology of fast-high voltage solid state switch as well as experimental results obtained are presented.

Keywords: High voltage, IGBT, Solid states switch.

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Authors: S.K. Mazloomi, Nasri b. Sulaiman

Abstract:

By analyzing the sources of energy and power loss in PWM (Pulse Width Modulation) controlled drivers of water electrolysis cells, it is possible to reduce the power dissipation and enhance the efficiency of such hydrogen production units. A PWM controlled power driver is based on a semiconductor switching element where its power dissipation might be a remarkable fraction of the total power demand of an electrolysis system. Power dissipation in a semiconductor switching element is related to many different parameters which could be fitted into two main categories: switching losses and conduction losses. Conduction losses are directly related to the built, structure and capabilities of a switching device itself and indeed the conditions in which the element is handling the switching application such as voltage, current, temperature and of course the fabrication technology. On the other hand, switching losses have some other influencing variables other than the mentioned such as control system, switching method and power electronics circuitry of the PWM power driver. By analyzings the characteristics of recently developed power switching transistors from different families of Bipolar Junction Transistors (BJT), Metal Oxide Semiconductor Field Effect Transistors (MOSFET) and Insulated Gate Bipolar Transistors (IGBT), some recommendations are made in this paper which are able to lead to achieve higher hydrogen production efficiency by utilizing PWM controlled water electrolysis cells.

Keywords: Power switch, PWM, Semiconductor switch, Waterelectrolysis

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Authors: Jong-Bae Lee, Seongsoo Lee

Abstract:

Local interconnect network (LIN) is a communication protocol that combines sensors, actuators, and processors to a functional module in automotive applications. In this paper, a LIN ver. 2.2A controller was designed in Verilog hardware description language (Verilog HDL) and implemented in field-programmable gate array (FPGA). Its operation was verified by making full-scale LIN network with the presented FPGA-implemented LIN controller, commercial LIN transceivers, and commercial processors. When described in Verilog HDL and synthesized in 0.18 μm technology, its gate size was about 2,300 gates.

Keywords: Local interconnect network, controller, transceiver, processor.

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