Search results for: Power Delay Product

Authors: Myeongjin Park, Ohmin Kwon, Juhyun Park, Sangmoon Lee

Abstract:

This paper proposes improved delay-dependent stability conditions of the linear time-delay systems of neutral type. The proposed methods employ a suitable Lyapunov-Krasovskii’s functional and a new form of the augmented system. New delay-dependent stability criteria for the systems are established in terms of Linear matrix inequalities (LMIs) which can be easily solved by various effective optimization algorithms. Numerical examples showed that the proposed method is effective and can provide less conservative results.

Keywords: Neutral systems, Time-delay, Stability, Lyapunovmethod, LMI.

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Authors: Jonah Gamba

Abstract:

In this paper the problem of estimating the time delay between two spatially separated noisy sinusoidal signals by system identification modeling is addressed. The system is assumed to be perturbed by both input and output additive white Gaussian noise. The presence of input noise introduces bias in the time delay estimates. Normally the solution requires a priori knowledge of the input-output noise variance ratio. We utilize the cascade of a self-tuned filter with the time delay estimator, thus making the delay estimates robust to input noise. Simulation results are presented to confirm the superiority of the proposed approach at low input signal-to-noise ratios.

Keywords: LMS algorithm, Self-tuned filter, Systemidentification, Time delay estimation, .

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Authors: Yun Won Chung

Abstract:

The energy consumption of home femto base stations (BSs) can be reduced, by turning off the Wi-Fi radio interface when there is no mobile station (MS) under the coverage of the BSs or MSs do not transmit or receive data packet for long time, especially in late night. In the energy-efficient home femto BSs, if MSs have any data packet to transmit and the Wi-Fi radio interface in off state, MSs wake up the Wi-Fi radio interface of home femto BSs by using additional low power radio interface. In this paper, the performance of the energy-efficient home femto BSs from the aspect of energy consumption and cumulative average delay, and show the effect of various parameters on energy consumption and cumulative average delay. From the results, the tradeoff relationship between energy consumption and cumulative average delay is shown and thus, appropriate operation should be needed to balance the tradeoff.

Keywords: energy consumption, power saving, femto base station.

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Authors: Yingguo Li

Abstract:

In this paper, we consider a discrete Gompertz model with time delay. Firstly, the stability of the equilibrium of the system is investigated by analyzing the characteristic equation. By choosing the time delay as a bifurcation parameter, we prove that Neimark- Sacker bifurcations occur when the delay passes a sequence of critical values. The direction and stability of the Neimark-Sacker are determined by using normal forms and centre manifold theory. Finally, some numerical simulations are given to verify the theoretical analysis.

Keywords: Gompertz system, Neimark-Sacker bifurcation, stability, time delay.

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Authors: Mohsen Maadani, Seyed Ahmad Motamedi

Abstract:

The use of wireless technology in industrial networks has gained vast attraction in recent years. In this paper, we have thoroughly analyzed the effect of contention window (CW) size on the performance of IEEE 802.11-based industrial wireless networks (IWN), from delay and reliability perspective. Results show that the default values of CWmin, CWmax, and retry limit (RL) are far from the optimum performance due to the industrial application characteristics, including short packet and noisy environment. In this paper, an adaptive CW algorithm (payload-dependent) has been proposed to minimize the average delay. Finally a simple, but effective CW and RL setting has been proposed for industrial applications which outperforms the minimum-average-delay solution from maximum delay and jitter perspective, at the cost of a little higher average delay. Simulation results show an improvement of up to 20%, 25%, and 30% in average delay, maximum delay and jitter respectively.

Keywords: Average Delay, Contention Window, Distributed Coordination Function (DCF), Jitter, Industrial Wireless Network (IWN), Maximum Delay, Reliability, Retry Limit.

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Authors: R. Farkh, K. Laabidi, M. Ksouri

Abstract:

In this paper, we consider the control of time delay system by Proportional-Integral (PI) controller. By Using the Hermite- Biehler theorem, which is applicable to quasi-polynomials, we seek a stability region of the controller for first order delay systems. The essence of this work resides in the extension of this approach to second order delay system, in the determination of its stability region and the computation of the PI optimum parameters. We have used the genetic algorithms to lead the complexity of the optimization problem.

Keywords: Genetic algorithm, Hermit-Biehler theorem, optimization, PI controller, second order delay system, stability region.

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Authors: M.J. Park, K.H. Kim, O.M. Kwon

Abstract:

This paper proposes a delay-dependent leader-following consensus condition of multi-agent systems with both communication delay and probabilistic self-delay. The proposed methods employ a suitable piecewise Lyapunov-Krasovskii functional and the average dwell time approach. New consensus criterion for the systems are established in terms of linear matrix inequalities (LMIs) which can be easily solved by various effective optimization algorithms. Numerical example showed that the proposed method is effective.

Keywords: Multi-agent systems, probabilistic self-delay, consensus, Lyapunov method, LMI.

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Authors: Kostas Siozios, Dimitrios Soudris, Antonios Thanailakis

Abstract:

Modern applications realized onto FPGAs exhibit high connectivity demands. Throughout this paper we study the routing constraints of Virtex devices and we propose a systematic methodology for designing a novel general-purpose interconnection network targeting to reconfigurable architectures. This network consists of multiple segment wires and SB patterns, appropriately selected and assigned across the device. The goal of our proposed methodology is to maximize the hardware utilization of fabricated routing resources. The derived interconnection scheme is integrated on a Virtex style FPGA. This device is characterized both for its high-performance, as well as for its low-energy requirements. Due to this, the design criterion that guides our architecture selections was the minimal Energy×Delay Product (EDP). The methodology is fully-supported by three new software tools, which belong to MEANDER Design Framework. Using a typical set of MCNC benchmarks, extensive comparison study in terms of several critical parameters proves the effectiveness of the derived interconnection network. More specifically, we achieve average Energy×Delay Product reduction by 63%, performance increase by 26%, reduction in leakage power by 21%, reduction in total energy consumption by 11%, at the expense of increase of channel width by 20%.

Keywords: Design Methodology, FPGA, Interconnection, Low-Energy, High-Performance, CAD tool.

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Authors: P.S.Prakash, S.Selvan

Abstract:

Packet switched data network like Internet, which has traditionally supported throughput sensitive applications such as email and file transfer, is increasingly supporting delay-sensitive multimedia applications such as interactive video. These delaysensitive applications would often rather sacrifice some throughput for better delay. Unfortunately, the current packet switched network does not offer choices, but instead provides monolithic best-effort service to all applications. This paper evaluates Class Based Queuing (CBQ), Coordinated Earliest Deadline First (CEDF), Weighted Switch Deficit Round Robin (WSDRR) and RED-Boston scheduling schemes that is sensitive to delay bound expectations for variety of real time applications and an enhancement of WSDRR is proposed.

Keywords: QoS, Delay-sensitive, Queuing delay, Scheduling

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Authors: Somayeh Timarchi, Keivan Navi

Abstract:

Efficient modulo 2n+1 adders are important for several applications including residue number system, digital signal processors and cryptography algorithms. In this paper we present a novel modulo 2n+1 addition algorithm for a recently represented number system. The proposed approach is introduced for the reduction of the power dissipated. In a conventional modulo 2n+1 adder, all operands have (n+1)-bit length. To avoid using (n+1)-bit circuits, the diminished-1 and carry save diminished-1 number systems can be effectively used in applications. In the paper, we also derive two new architectures for designing modulo 2n+1 adder, based on n-bit ripple-carry adder. The first architecture is a faster design whereas the second one uses less hardware. In the proposed method, the special treatment required for zero operands in Diminished-1 number system is removed. In the fastest modulo 2n+1 adders in normal binary system, there are 3-operand adders. This problem is also resolved in this paper. The proposed architectures are compared with some efficient adders based on ripple-carry adder and highspeed adder. It is shown that the hardware overhead and power consumption will be reduced. As well as power reduction, in some cases, power-delay product will be also reduced.

Keywords: Modulo 2n+1 arithmetic, residue number system, low power, ripple-carry adders.

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Authors: Li Xu, Shouming Zhong

Abstract:

The reachable set bounding estimation for distributed delay systems with disturbances is a new problem. In this paper,we consider this problem subject to not only time varying delay and polytopic uncertainties but also distributed delay systems which is not studied fully untill now. we can obtain improved non-ellipsoidal reachable set estimation for neural networks with time-varying delay by the maximal Lyapunov-Krasovskii fuctional which is constructed as the pointwise maximum of a family of Lyapunov-Krasovskii fuctionals corresponds to vertexes of uncertain polytope.On the other hand,matrix inequalities containing only one scalar and Matlabs LMI Toolbox is utilized to give a non-ellipsoidal description of the reachable set.finally,numerical examples are given to illustrate the existing results.

Keywords: Reachable set, Distributed delay, Lyapunov-Krasovskii function, Polytopic uncertainties.

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Authors: Won-Jae Shin, Young-Hwan You

Abstract:

Cyclic delay diversity (CDD) is a simple technique to intentionally increase frequency selectivity of channels for orthogonal frequency division multiplexing (OFDM).This paper proposes a residual carrier frequency offset (RFO) estimation scheme for OFDMbased broadcasting system using CDD. In order to improve the RFO estimation, this paper addresses a decision scheme of the amount of cyclic delay and pilot pattern used to estimate the RFO. By computer simulation, the proposed estimator is shown to benefit form propoerly chosen delay parameter and perform robustly.

Keywords: OFDM, cyclic delay diversity, FM system, synchronization

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Authors: Sachin Bhalekar

Abstract:

In this paper we propose a necessary condition for the existence of chaos in delay differential equations of fractional order. To explain the proposed theory, we discuss fractional order Liu system and financial system involving delay.

Keywords: Caputo derivative, delay, stability, chaos.

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Authors: Xia Zhou, Shouming Zhong

Abstract:

The problem of delay-range-dependent exponential synchronization is investigated for Lur-e master-slave systems with delay feedback control and Markovian switching. Using Lyapunov- Krasovskii functional and nonsingular M-matrix method, novel delayrange- dependent exponential synchronization in mean square criterions are established. The systems discussed in this paper is advanced system, and takes all the features of interval systems, Itˆo equations, Markovian switching, time-varying delay, as well as the environmental noise, into account. Finally, an example is given to show the validity of the main result.

Keywords: Synchronization, delay-range-dependent, Markov chain, generalized Itō's formula, brownian motion, M-matrix.

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Authors: Shobha Sharma, Amita Dev

Abstract:

Data driven dynamic logic is the high speed dynamic circuit with low area. The clock of the dynamic circuit is removed and data drives the circuit instead of clock for precharging purpose. This data driven dynamic nand gate is given static forward substrate biasing of Vsupply/2 as well as the substrate bias is connected to the input data, resulting in dynamic substrate bias. The dynamic substrate bias gives the shortest propagation delay with a penalty on the power dissipation. Propagation delay is reduced by 77.8% compared to the normal reverse substrate bias Data driven dynamic nand. Also dynamic substrate biased D3nand’s propagation delay is reduced by 31.26% compared to data driven dynamic nand gate with static forward substrate biasing of Vdd/2. This data driven dynamic nand gate with dynamic body biasing gives us the highest speed with no area penalty and finds its applications where power penalty is acceptable. Also combination of Dynamic and static Forward body bias can be used with reduced propagation delay compared to static forward biased circuit and with comparable increase in an average power. The simulations were done on hspice simulator with 22nm High-k metal gate strained Si technology HP models of Arizona State University, USA.

Keywords: Data driven nand gate, dynamic substrate biasing, nand gate, static substrate biasing.

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Authors: Jasmin Velagic

Abstract:

This paper addresses the design of predictive networked controller with adaptation of a communication delay. The networked control system contains random delays from sensor to controller and from controller to actuator. The proposed predictive controller includes an adaptation loop which decreases the influence of communication delay on the control performance. Also, the predictive controller contains a filter which improves the robustness of the control system. The performance of the proposed adaptive predictive controller is demonstrated by simulation results in comparison with PI controller and predictive controller with constant delay.

Keywords: Predictive control, adaptation, communication delay, communication network.

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Authors: Yasunori Sugita, Toshinori Yoshikawa

Abstract:

The design problem of Infinite Impulse Response (IIR) digital filters is usually expressed as the minimization problem of the complex magnitude error that includes both the magnitude and phase information. However, the group delay of the filter obtained by solving such design problem may be far from the desired group delay. In this paper, we propose a design method of stable IIR digital filters with prespecified maximum group delay errors. In the proposed method, the approximation problems of the magnitude-phase and group delay are separately defined, and these two approximation problems are alternately solved using successive projections. As a result, the proposed method can design the IIR filters that satisfy the prespecified allowable errors for not only the complex magnitude but also the group delay by alternately executing the coefficient update for the magnitude-phase and the group delay approximation. The usefulness of the proposed method is verified through some examples.

Keywords: Filter design, Group delay approximation, Stable IIRfilters, Successive projection method.

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Authors: I. Davies, O. L. C. Haas

Abstract:

In this paper, the problem of stability and stabilization for neutral delay-differential systems with infinite delay is investigated. Using Lyapunov method, new delay-independent sufficient condition for the stability of neutral systems with infinite delay is obtained in terms of linear matrix inequality (LMI). Memory-less state feedback controllers are then designed for the stabilization of the system using the feasible solution of the resulting LMI, which are easily solved using any optimization algorithms. Numerical examples are given to illustrate the results of the proposed methods.

Keywords: Infinite delays, Lyapunov method, linear matrix inequality, neutral systems, stability.

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Authors: Hazem M. El-Bakry, Qiangfu Zhao

Abstract:

Here, a new idea to speed up the operation of complex valued time delay neural networks is presented. The whole data are collected together in a long vector and then tested as a one input pattern. The proposed fast complex valued time delay neural networks uses cross correlation in the frequency domain between the tested data and the input weights of neural networks. It is proved mathematically that the number of computation steps required for the presented fast complex valued time delay neural networks is less than that needed by classical time delay neural networks. Simulation results using MATLAB confirm the theoretical computations.

Keywords: Fast Complex Valued Time Delay Neural Networks, Cross Correlation, Frequency Domain

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Authors: Sulaiman Yunus

Abstract:

The need for modeling response to urban fire disaster cannot be over emphasized, as recurrent fire outbreaks have gutted most cities of the world. This necessitated the need for a prompt and efficient response system in order to mitigate the impact of the disaster. Promptness, as a function of time, is seen to be the fundamental determinant for efficiency of a response system and magnitude of a fire disaster. Delay, as a result of several factors, is one of the major determinants of promptgness of a response system and also the magnitude of a fire disaster. Response Delay Model (RDM) intends to bridge the gap in urban fire disaster response system through incorporating and synchronizing the delay moments in measuring the overall efficiency of a response system and determining the magnitude of a fire disaster. The model identified two delay moments (pre-notification and Intra-reflex sequence delay) that can be elastic and collectively plays a significant role in influencing the efficiency of a response system. Due to variation in the elasticity of the delay moments, the model provides for measuring the length of delays in order to arrive at a standard average delay moment for different parts of the world, putting into consideration geographic location, level of preparedness and awareness, technological advancement, socio-economic and environmental factors. It is recommended that participatory researches should be embarked on locally and globally to determine standard average delay moments within each phase of the system so as to enable determining the efficiency of response systems and predicting fire disaster magnitudes.

Keywords: Delay moment, fire disaster, reflex sequence, response, response delay moment.

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Authors: Xiguang Li

Abstract:

In this paper , by using fixed point theorem , upper and lower solution-s method and monotone iterative technique , we prove the existence of maximum and minimum solutions of differential equations with delay , which improved and generalize the result of related paper.

Keywords: Banach space, boundary value problem, differential equation, delay.

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Authors: Mahmud Hesain ALdwaik, Omar Hsiain Eldwaik

Abstract:

This paper deals with tracking and estimating time delay between two signals. The simulation of this algorithm accomplished by using Mathcad package is carried out. The algorithm we will present adaptively controls and tracking the delay, so as to minimize the mean square of this error. Thus the algorithm in this case has task not only of seeking the minimum point of error but also of tracking the change of position, leading to a significant improving of performance. The flowchart of the algorithm is presented as well as several tests of different cases are carried out.

Keywords: Tracking time delay, Algorithm simulation, Mathcad, MSE

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Authors: Arash Azizi-Mazreah, Mohammad T. Manzuri Shalmani, Hamid Barati, Ali Barati

Abstract:

The energy consumption and delay in read/write operation of conventional SRAM is investigated analytically as well as by simulation. Explicit analytical expressions for the energy consumption and delay in read and write operation as a function of device parameters and supply voltage are derived. The expressions are useful in predicting the effect of parameter changes on the energy consumption and speed as well as in optimizing the design of conventional SRAM. HSPICE simulation in standard 0.25μm CMOS technology confirms precision of analytical expressions derived from this paper.

Keywords: Read energy consumption, write energy consumption, read delay, write delay.

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Authors: Kiyohiro Yamazaki

Abstract:

The purpose of this paper is to examine the hypothesis explaining the mechanism in the case, where the product is deleted or reduced the fundamental function of the product through the product concept changes in the digital camera industry. This paper points out not owning the fundamental technology might cause the change of the product concept. Casio could create new competitive factor so that this paper discusses a possibility of the mechanism of changing the product concept.

Keywords: Casio, digital camera, mechanism, product concept, product development process.

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Authors: Padmanabhan Balasubramanian, Bashetty Raghavendra

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In this paper, an analysis is presented, which demonstrates the effect pre-logic factoring could have on an automated combinational logic synthesis process succeeding it. The impact of pre-logic factoring for some arbitrary combinatorial circuits synthesized within a FPGA based logic design environment has been analyzed previously. This paper explores a similar effect, but with the non-regenerative logic synthesized using elements of a commercial standard cell library. On an overall basis, the results obtained pertaining to the analysis on a variety of MCNC/IWLS combinational logic benchmark circuits indicate that pre-logic factoring has the potential to facilitate simultaneous power, delay and area optimized synthesis solutions in many cases.

Keywords: Algebraic factoring, Combinational logic synthesis, Standard cells, Low power, Delay optimization, Area reduction.

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Authors: Krzysztof Walczak

Abstract:

Fractional delay FIR filters design method based on the differential evolution algorithm is presented. Differential evolution is an evolutionary algorithm for solving a global optimization problems in the continuous search space. In the proposed approach, an evolutionary algorithm is used to determine the coefficients of a fractional delay FIR filter based on the Farrow structure. Basic differential evolution is enhanced with a restricted mating technique, which improves the algorithm performance in terms of convergence speed and obtained solution. Evolutionary optimization is carried out by minimizing an objective function which is based on the amplitude response and phase delay errors. Experimental results show that the proposed algorithm leads to a reduction in the amplitude response and phase delay errors relative to those achieved with the Least-Squares method.

Keywords: Fractional Delay Filters, Farrow Structure, Evolutionary Computation, Differential Evolution

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Authors: Pejman Hosseiniun, Rose Shayeghi, Iman Rahbari, Mohamad Reza Kalhor

Abstract:

CNFET has emerged as an alternative material to silicon for high performance, high stability and low power SRAM design in recent years. SRAM functions as cache memory in computers and many portable devices. In this paper, a new SRAM cell design based on CNFET technology is proposed. The proposed SRAM cell design for CNFET is compared with SRAM cell designs implemented with the conventional CMOS and FinFET in terms of speed, power consumption, stability, and leakage current. The HSPICE simulation and analysis show that the dynamic power consumption of the proposed 8T CNFET SRAM cell’s is reduced about 48% and the SNM is widened up to 56% compared to the conventional CMOS SRAM structure at the expense of 2% leakage power and 3% write delay increase.

Keywords: SRAM cell, CNFET, low power, HSPICE.

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Authors: Sangram Keshori Mohapatra, Sidhartha Panda, Prasant Kumar Satpathy

Abstract:

This paper describes the power-system stability improvement by a static synchronous compensator (STATCOM) based damping controller with Differential evolution (DE) algorithm is used to find out the optimal controller parameters. The present study considered both local and remote signals with associated time delays. The performances of the proposed controllers have been compared with different disturbances for both single-machine infinite bus power system and multi-machine power system. The performance of the proposed controllers with variations in the signal transmission delays has also been investigated. To show the effectiveness and robustness of the proposed controller the Simulation results are presented under different disturbances and loading conditions.

Keywords: Controller Design, Differential Evolution Algorithm Static Synchronous Compensator, Time Delay, Power System Stability, Single Machine Infinite-bus Power System, Multi-Machine Power System.

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Authors: M.Hosseinghadiry, H. Mohammadi, M.Nadisenejani

Abstract:

with increasing circuits- complexity and demand to use portable devices, power consumption is one of the most important parameters these days. Full adders are the basic block of many circuits. Therefore reducing power consumption in full adders is very important in low power circuits. One of the most powerconsuming modules in full adders is XOR/XNOR circuit. This paper presents two new full adders based on two new logic approaches. The proposed logic approaches use one XOR or XNOR gate to implement a full adder cell. Therefore, delay and power will be decreased. Using two new approaches and two XOR and XNOR gates, two new full adders have been implemented in this paper. Simulations are carried out by HSPICE in 0.18μm bulk technology with 1.8V supply voltage. The results show that the ten-transistors proposed full adder has 12% less power consumption and is 5% faster in comparison to MB12T full adder. 9T is more efficient in area and is 24% better than similar 10T full adder in term of power consumption. The main drawback of the proposed circuits is output threshold loss problem.

Keywords: Full adder, XNOR, Low power, High performance, Very Large Scale Integrated Circuit.

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Authors: Namchul Do, Jihun Cho

Abstract:

Modeling product configurations needs large amounts of knowledge about technical and marketing restrictions on the product. Previous attempts to automate product configurations concentrate on representations and management of the knowledge for specific domains in fixed and isolated computing environments. Since the knowledge about product configurations is subject to continuous change and hard to express, these attempts often failed to efficiently manage and exchange the knowledge in collaborative product development. In this paper, XML Topic Map (XTM) is introduced to represent and exchange the knowledge about product configurations in collaborative product development. A product configuration model based on XTM along with its merger and inference facilities enables configuration engineers in collaborative product development to manage and exchange their knowledge efficiently. A prototype implementation is also presented to demonstrate the proposed model can be applied to engineering information systems to exchange the product configuration knowledge.

Keywords: Knowledge exchange, product configurations, XML topic map.

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