Search results for: three phase voltage source inverter

Authors: Eklas Hossain, Sheroz Khan, Ahad Ali

Abstract:

Power line communications may be used as a data communication channel in public and indoor distribution networks so that it does not require the installing of new cables. Industrial low voltage distribution network may be utilized for data transfer required by the on-line condition monitoring of electric motors. This paper presents a pilot distribution network for modeling low voltage power line as data transfer channel. The signal attenuation in communication channels in the pilot environment is presented and the analysis is done by varying the corresponding parameters for the signal attenuation.

Keywords: Data communication, indoor distribution networks, low voltage, power line.

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Authors: Mohammad Reza Askari, Mohsen Kazemi, Ali Asghar Baziar

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In this treatise we will study the capability of static compensator for reactive power to stabilize sheen voltage with motor loading on power networks system. We also explain the structure and main function of STATCOM and the method to control it using STATCOM transformer current to simultaneously predict after telling about the necessity of FACTS tools to compensate in power networks. Then we study topology and controlling system to stabilize voltage during start of inductive motor. The outcome of stimulat by MATLAB software supports presented controlling idea and system in the treatise.

Keywords: Power network, inductive motor, reactive power, stability of voltage, STATCOM, FACTS

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Authors: O. Arikan, C. Kocatepe, G. Ucar, Y. Hacialiefendioglu

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In this paper, influence of harmonics on medium voltage distribution system of Bogazici Electricity Distribution Inc. (BEDAS) which takes place at Istanbul/Turkey is investigated. A ring network consisting of residential loads is taken into account for this study. Real system parameters and measurement results are used for simulations. Also, probable working conditions of the system are analyzed for 50%, 75%, and 100% loading of transformers with similar harmonic contents. Results of the study are exhibited the influence of nonlinear loads on %THDV, P.F. and technical losses of the medium voltage distribution system.

Keywords: Distribution system, harmonic, technical losses, power factor (PF), total harmonic distortion (THD), residential load, medium voltage.

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Authors: S. Pattnaik, A. K. Panda, Aroul K., K. K. Mahapatra

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This paper proposes a zero-voltage transition (ZVT) PWM synchronous buck converter, which is designed to operate at low output voltage and high efficiency typically required for portable systems. To make the DC-DC converter efficient at lower voltage, synchronous converter is an obvious choice because of lower conduction loss in the diode. The high-side MOSFET is dominated by the switching losses and it is eliminated by the soft switching technique. Additionally, the resonant auxiliary circuit designed is also devoid of the switching losses. The suggested procedure ensures an efficient converter. Theoretical analysis, computer simulation, and experimental results are presented to explain the proposed schemes.

Keywords: DC-DC Converter, Switching loss, Synchronous Buck, Soft switching, ZVT.

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Authors: A. K. Al-Othman, Nabil A. Ahmed, A. M. Al-Kandari, H. K. Ebraheem

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Selective harmonic elimination-pulse width modulation techniques offer a tight control of the harmonic spectrum of a given voltage waveform generated by a power electronic converter along with a low number of switching transitions. Traditional optimization methods suffer from various drawbacks, such as prolonged and tedious computational steps and convergence to local optima; thus, the more the number of harmonics to be eliminated, the larger the computational complexity and time. This paper presents a novel method for output voltage harmonic elimination and voltage control of PWM AC/AC voltage converters using the principle of hybrid Real-Coded Genetic Algorithm-Pattern Search (RGA-PS) method. RGA is the primary optimizer exploiting its global search capabilities, PS is then employed to fine tune the best solution provided by RGA in each evolution. The proposed method enables linear control of the fundamental component of the output voltage and complete elimination of its harmonic contents up to a specified order. Theoretical studies have been carried out to show the effectiveness and robustness of the proposed method of selective harmonic elimination. Theoretical results are validated through simulation studies using PSIM software package.

Keywords: PWM, AC/AC voltage converters, selectiveharmonic elimination, direct search method, pattern search method, Real-coded Genetic algorithms, evolutionary algorithms andoptimization.

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Authors: Moorthi S., Meganathan D., Janarthanan D., Praveen Kumar P., J. Raja paul perinbam

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An efficient architecture for low jitter All Digital Phase Locked Loop (ADPLL) suitable for high speed SoC applications is presented in this paper. The ADPLL is designed using standard cells and described by Hardware Description Language (HDL). The ADPLL implemented in a 90 nm CMOS process can operate from 10 to 200 MHz and achieve worst case frequency acquisition in 14 reference clock cycles. The simulation result shows that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps at 100MHz. Since the digitally controlled oscillator (DCO) can achieve both high resolution and wide frequency range, it can meet the demands of system-level integration. The proposed ADPLL can easily be ported to different processes in a short time. Thus, it can reduce the design time and design complexity of the ADPLL, making it very suitable for System-on-Chip (SoC) applications.

Keywords: All Digital Phase Locked Loop (ADPLL), Systemon-Chip (SoC), Phase Locked Loop (PLL), Very High speedIntegrated Circuit (VHSIC) Hardware Description Language(VHDL), Digitally Controlled Oscillator (DCO), Phase frequencydetector (PFD) and Voltage Controlled Oscillator (VCO).

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Authors: Jae-Chang Kwak, Yong-Seo Koo

Abstract:

The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PFM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS (DT-CMOS) with low on-resistance is designed to decrease conduction loss. The threshold voltage of DT-CMOS drops as the gate voltage increase, resulting in a much higher current handling capability than standard MOSFET. PFM control circuits consist of a generator, AND gate and comparator. The generator is made to have 1.2MHz oscillation voltage. The DC-DC converter based on PFM control circuit and low on-resistance switching device is presented in this paper.

Keywords: DT-CMOS, PMIC, PFM, DC-DC converter.

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Authors: Reza Sirjani, Nobosse Tafem Bolan

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Many optimization techniques available in the literature have been developed in order to solve the problem of voltage stability enhancement in power systems. However, there are a number of drawbacks in the use of previous techniques aimed at determining the optimal location and size of reactive compensators in a network. In this paper, an Improved Cuckoo Search algorithm is applied as an appropriate optimization algorithm to determine the optimum location and size of a Static Var Compensator (SVC) in a transmission network. The main objectives are voltage stability improvement and total cost minimization. The results of the presented technique are then compared with other available optimization techniques.

Keywords: Cuckoo search algorithm, optimization, power system, var compensators, voltage stability.

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Authors: Maninder Kaur Gill, Alpana Agarwal

Abstract:

It is practically not feasible to measure the open-loop voltage gain of the operational amplifier in the open loop configuration. It is because the open-loop voltage gain of the operational amplifier is very large. In order to avoid the saturation of the output voltage, a very small input should be given to operational amplifier which is not possible to be measured practically by a digital multimeter. A test circuit for measurement of open loop voltage gain of an operational amplifier has been proposed and verified using simulation tools as well as by experimental methods on breadboard. The main advantage of this test circuit is that it is simple, fast, accurate, cost effective, and easy to handle even on a breadboard. The test circuit requires only the device under test (DUT) along with resistors. This circuit has been tested for measurement of open loop voltage gain for different operational amplifiers. The underlying goal is to design testable circuits for various analog devices that are simple to realize in VLSI systems, giving accurate results and without changing the characteristics of the original system. The DUTs used are LM741CN and UA741CP. For LM741CN, the simulated gain and experimentally measured gain (average) are calculated as 89.71 dB and 87.71 dB, respectively. For UA741CP, the simulated gain and experimentally measured gain (average) are calculated as 101.15 dB and 105.15 dB, respectively. These values are found to be close to the datasheet values.

Keywords: Device under test, open-loop voltage gain, operational amplifier, test circuit.

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Authors: A. S. Telang, P. P. Bedekar

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In today’s world, electrical energy has become an indispensable component of all aspects of modern human life. Reliability, security and stability are the key aspects of any power system. Failure to meet any of these three aspects results into a great impediment to modern life. Modern power systems are being subjected to heavily stressed conditions leading to voltage stability problems. If the voltage stability problems are not mitigated properly through proper voltage stability assessment methods, cascading events may occur which may lead to voltage collapse or blackout events. Modern FACTS devices like STATCOM are one of the measures to overcome the blackout problems. As these devices are very costly, they must be installed properly at suitable locations, mostly at weak bus. Line voltage stability indices such as FVSI, Lmn and LQP play important role for identification of a weak bus. This paper presents evaluation of these line stability indices for the assessment of reliable information about the closeness of the power system to voltage collapse. PSAT is a user-friendly MATLAB toolbox, of which CPF is an important feature which has been extensively used for the placement of STATCOM to assess the stability. Novelty of the present research work lies in that the active and reactive load has been changed simultaneously at all the load buses under consideration. MATLAB code has been developed for the same and tested successfully on various standard IEEE test systems. The results for standard IEEE14 bus test system, specifically, are presented in this paper.

Keywords: Voltage stability analysis, voltage collapse, PSAT, CPF, VSI, FVSI, Lmn, LQP.

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Authors: T. Patrice Nna Nna, S. Ndjakomo Essiane, S. Pérabi Ngoffé, F. Amigue Fissou

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This paper deals with the harmonic decontamination of current in an electrical grid by an active shunt filter in order to improve power quality. The contribution of this paper is mainly based on the proposal of a control strategy for an active filter based on Duty Cycle Modulation (DCM). First, three-monophase method is applied for the identification of disturbing currents. A Simulink model of this method is given for one phase of the grid. Secondly, two orders were designed: the first one is the Hysteresis Control and the second one is the DCM Control. Finally, a comparative study of the two controls was performed. The results obtained show a significant improvement in the rate of harmonic distortion for both controls. The harmonic distortion for the Hysteresis control is limited by the non-controllability of the switching frequencies of the inverter's switches and reduces the harmonic distortion rate (THD) to 3.12% as opposed to the DCM control which limits the THD to 2.82% which makes it better.

Keywords: Harmonic pollution, shunt active filter, hysteresis, Duty Cycle Modulation.

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Authors: Pushkar Tripathi, Abhishek Sharma, G. N. Pillai, Indira Gupta

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This paper presents a new approach for the protection of Thyristor-Controlled Series Compensator (TCSC) line using Support Vector Machine (SVM). One SVM is trained for fault classification and another for section identification. This method use three phase current measurement that results in better speed and accuracy than other SVM based methods which used single phase current measurement. This makes it suitable for real-time protection. The method was tested on 10,000 data instances with a very wide variation in system conditions such as compensation level, source impedance, location of fault, fault inception angle, load angle at source bus and fault resistance. The proposed method requires only local current measurement.

Keywords: Fault Classification, Section Identification, Feature Selection, Support Vector Machine (SVM), Thyristor-Controlled Series Compensator (TCSC)

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Authors: Anil S. Khopkar, Umesh N. Soni

Abstract:

Surge voltage arises in the system either by switching operations of heavy load or by natural lightning. Surge voltages cause significant failure of power system equipment if adequate protection not provided. The surge arrestor is device which is connected in a power system to protect the equipment against surge voltages. To protect the transformers against surge voltages, metal oxide surge arrestors (MOSA) are connected across each terminal. The Basic Insulation Level (BIL) of transformers has been defined in the national and international standards based on its voltage rating. While designing transformer insulation, factors such as BIL, surge arrestor ratings, and its operating voltage have to be considered. However, the performance of transformer insulation largely depends on the ratings of the surge arrestor ratings, their location, the margin considered in insulation design, the quantity of surge voltage strikes, etc. This paper demonstrates the role of surge arrestors in protecting transformers against overvoltage, transformer insulation design, the optimum location of surge arrestors and their connection lead length, insulation coordination for transformers, the protection margin in BIL, and methods of safeguarding transformers against surge voltages in detail.  

Keywords: Surge voltage, surge arrestors, transformer, protection margin.

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Authors: M. S. Merzoug, F. Naceri

Abstract:

This paper presents a comparative study on two most popular control strategies for Permanent Magnet Synchronous Motor (PMSM) drives: field-oriented control (FOC) and direct torque control (DTC). The comparison is based on various criteria including basic control characteristics, dynamic performance, and implementation complexity. The study is done by simulation using the Simulink Power System Blockset that allows a complete representation of the power section (inverter and PMSM) and the control system. The simulation and evaluation of both control strategies are performed using actual parameters of Permanent Magnet Synchronous Motor fed by an IGBT PWM inverter.

Keywords: PMSM, FOC, DTC, hysteresis, PWM.

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Authors: G. Ahmadi, S.M. Shahrtash

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A multiphase harmonic load flow algorithm is developed based on backward/forward sweep to examine the effects of various factors on the neutral to earth voltage (NEV), including unsymmetrical system configuration, load unbalance and harmonic injection. The proposed algorithm composes fundamental frequency and harmonic frequencies power flows. The algorithm and the associated models are tested on IEEE 13 bus system. The magnitude of NEV is investigated under various conditions of the number of grounding rods per feeder lengths, the grounding rods resistance and the grounding resistance of the in feeding source. Additionally, the harmonic injection of nonlinear loads has been considered and its influences on NEV under different conditions are shown.

Keywords: NEV, Distribution System, Multi-grounded, Backward/Forward Sweep, Harmonic Analysis

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Authors: Zhenguo Vincent Chia, Sheung Yan Simon Ng, Minkyu Je

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This paper presents CMOS Current Mode Logic (CML) circuits for a high speed Digital to Analog Converter (DAC) using standard CMOS 65nm process. The CML circuits have the propagation delay advantage over its conventional CMOS counterparts due to smaller output voltage swing and tunable bias current. The CML circuits proposed in this paper can achieve a maximum propagation delay of only 9.3ps, which can satisfy the stringent requirement for the 5 GHz high speed DAC application. Another advantage for CML circuits is its dynamic symmetry characteristic resulting in a reduction of an additional inverter. Simulation results show that the proposed CML circuits can operate from 1.08V to 1.3V with temperature ranging from -40 to +120°C.

Keywords: Conventional, Current Mode Logic, DAC, Decoder

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Authors: A. K. Al-Othman, H. A. Al-Mekhaizim

Abstract:

Multilevel inverters supplied from equal and constant dc sources almost don-t exist in practical applications. The variation of the dc sources affects the values of the switching angles required for each specific harmonic profile, as well as increases the difficulty of the harmonic elimination-s equations. This paper presents an extremely fast optimal solution of harmonic elimination of multilevel inverters with non-equal dc sources using Tanaka's fuzzy linear regression formulation. A set of mathematical equations describing the general output waveform of the multilevel inverter with nonequal dc sources is formulated. Fuzzy linear regression is then employed to compute the optimal solution set of switching angles.

Keywords: Multilevel converters, harmonics, pulse widthmodulation (PWM), optimal control.

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Authors: Il-Do Jeong, Hang-Geun Jeong

Abstract:

This paper describes the design and fabrication of a clock and data recovery circuit (CDR). We propose a new clock and data recovery which is based on a 1/4-rate frequency detector (QRFD). The proposed frequency detector helps reduce the VCO frequency and is thus advantageous for high speed application. The proposed frequency detector can achieve low jitter operation and extend the pull-in range without using the reference clock. The proposed CDR was implemented using a 1/4-rate bang-bang type phase detector (PD) and a ring voltage controlled oscillator (VCO). The CDR circuit has been fabricated in a standard 0.18 CMOS technology. It occupies an active area of 1 x 1 and consumes 90 mW from a single 1.8V supply.

Keywords: Clock and data recovery, 1/4-rate frequency detector, 1/4-rate phase detector.

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Authors: Abdelaziz Sahbani, Kamel Ben Saad, Mohamed Benrejeb

Abstract:

This paper deals with the comparison between two proposed control strategies for a DC-DC boost converter. The first control is a classical Sliding Mode Control (SMC) and the second one is a distance based Fuzzy Sliding Mode Control (FSMC). The SMC is an analytical control approach based on the boost mathematical model. However, the FSMC is a non-conventional control approach which does not need the controlled system mathematical model. It needs only the measures of the output voltage to perform the control signal. The obtained simulation results show that the two proposed control methods are robust for the case of load resistance and the input voltage variations. However, the proposed FSMC gives a better step voltage response than the one obtained by the SMC.

Keywords: Boost DC-DC converter, Sliding Mode Control (SMC), Fuzzy Sliding Mode Control (FSMC), Robustness.

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Authors: A. Parizad, A. Khazali, M. Kalantar

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Voltage collapse is instability of heavily loaded electric power systems that cause to declining voltages and blackout. Power systems are predicated to become more heavily loaded in the future decade as the demand for electric power rises while economic and environmental concerns limit the construction of new transmission and generation capacity. Heavily loaded power systems are closer to their stability limits and voltage collapse blackouts will occur if suitable monitoring and control measures are not taken. To control transmission lines, it can be used from FACTS devices. In this paper Harmony search algorithm (HSA) and Genetic Algorithm (GA) have applied to determine optimal location of FACTS devices in a power system to improve power system stability. Three types of FACTS devices (TCPAT, UPFS, and SVC) have been introduced. Bus under voltage has been solved by controlling reactive power of shunt compensator. Also a combined series-shunt compensators has been also used to control transmission power flow and bus voltage simultaneously. Different scenarios have been considered. First TCPAT, UPFS, and SVC are placed solely in transmission lines and indices have been calculated. Then two types of above controller try to improve parameters randomly. The last scenario tries to make better voltage stability index and losses by implementation of three types controller simultaneously. These scenarios are executed on typical 34-bus test system and yields efficiency in improvement of voltage profile and reduction of power losses; it also may permit an increase in power transfer capacity, maximum loading, and voltage stability margin.

Keywords: FACTS Devices, Voltage Stability Index, optimal location, Heuristic methods, Harmony search, Genetic Algorithm.

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Authors: Adel M. Sharaf, Foad H. Gandoman

Abstract:

Nowadays, Photovoltaic-PV Farms/ Parks and large PV-Smart Grid Interface Schemes are emerging and commonly utilized in Renewable Energy distributed generation. However, PVhybrid- Dc-Ac Schemes using interface power electronic converters usually has negative impact on power quality and stabilization of modern electrical network under load excursions and network fault conditions in smart grid. Consequently, robust FACTS based interface schemes are required to ensure efficient energy utilization and stabilization of bus voltages as well as limiting switching/fault onrush current condition. FACTS devices are also used in smart grid- Battery Interface and Storage Schemes with PV-Battery Storage hybrid systems as an elegant alternative to renewable energy utilization with backup battery storage for electric utility energy and demand side management to provide needed energy and power capacity under heavy load conditions. The paper presents a robust interface PV-Li-Ion Battery Storage Interface Scheme for Distribution/Utilization Low Voltage Interface using FACTS stabilization enhancement and dynamic maximum PV power tracking controllers. Digital simulation and validation of the proposed scheme is done using MATLAB/Simulink software environment for Low Voltage- Distribution/Utilization system feeding a hybrid Linear-Motorized inrush and nonlinear type loads from a DC-AC Interface VSC-6- pulse Inverter Fed from the PV Park/Farm with a back-up Li-Ion Storage Battery.

Keywords: AC FACTS, Smart grid, Stabilization, PV-Battery Storage, Switched Filter-Compensation (SFC).

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Authors: AL.AL, M. B. I. Reaz, S. M. A. Motakabber, Mohd Alauddin Mohd Ali

Abstract:

Nowadays it is a trend for electronic circuit designers to integrate all system components on a single-chip. This paper proposed the design of a single-chip proportional to absolute temperature (PTAT) sensor including a voltage reference circuit using CEDEC 0.18m CMOS Technology. It is a challenge to design asingle-chip wide range linear response temperature sensor for many applications. The channel widths between the compensation transistor and the reference transistor are critical to design the PTAT temperature sensor circuit. The designed temperature sensor shows excellent linearity between -100°C to 200° and the sensitivity is about 0.05mV/°C. The chip is designed to operate with a single voltage source of 1.6V.

Keywords: PTAT, single-chip circuit, linear temperature sensor, CMOS technology.

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Authors: Mehmet Sagbas, Kemal Fidanboylu, M. Can Bayram

Abstract:

A new voltage-mode triple-input single-output multifunction filter using only two current conveyors is presented. The proposed filter which possesses three inputs and single-output can generate all biquadratic filtering functions at the output terminal by selecting different input signal combinations. The validity of the proposed filter is verified through PSPICE simulations.

Keywords: Active Filters, Voltage mode, Current conveyor

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Authors: L. Moussaoui, L. Rahmani

Abstract:

This paper deals with the direct torque control (DTC) of the induction motor. This type of control allows decoupling control between the flux and the torque without the need for a transformation of coordinates. However, as with other hysteresis-based systems, the classical DTC scheme represents a high ripple, in both the electromagnetic torque and the stator flux and a distortion in the stator current. As well, it suffers from variable switching frequency. To solve these problems various modifications, in conventional DTC scheme, have been made during the last decade. Indeed the DTC based on space vector modulation (SVM) has proved to generate very low ripples in torque and flux with constant switching frequency. It also shows almost the same dynamic performances as the classical DTC system. On the other hand, fuzzy logic is considered as an interesting alternative approach for its advantages: Analysis close to the exigencies of user, ability of nonlinear systems control, best dynamic performances and inherent quality of robustness.

Therefore, two fuzzy direct torque control approaches, for the induction motor fed by SVM-voltage source inverter, are proposed in this paper. By using these two approaches of DTC, the advantages of fuzzy logic control, space vector modulation, and direct torque control method are combined. The performances of these DTC schemes are evaluated through digital simulation using Matlab/Simulink platform and fuzzy logic tools. Simulation results illustrate the effectiveness and the superiority of the proposed Fuzzy DTC-SVM schemes in comparison to the classical DTC.

Keywords: Direct torque control, Fuzzy logic control, Induction motor, Switching frequency, Space vector modulation, Torque and flux ripples.

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Authors: Mahmood Reza Shakarami, Reza Sedaghati

Abstract:

Electricity market activities and a growing demand for electricity have led to heavily stressed power systems. This requires operation of the networks closer to their stability limits. Power system operation is affected by stability related problems, leading to unpredictable system behavior. Voltage stability refers to the ability of a power system to sustain appropriate voltage levels through large and small disturbances. Steady-state voltage stability is concerned with limits on the existence of steady-state operating points for the network. FACTS devices can be utilized to increase the transmission capacity, the stability margin and dynamic behavior or serve to ensure improved power quality. Their main capabilities are reactive power compensation, voltage control and power flow control. Among the FACTS controllers, Static Var Compensator (SVC) provides fast acting dynamic reactive compensation for voltage support during contingency events. In this paper, voltage stability assessment with appropriate representations of tap-changer transformers and SVC is investigated. Integrating both of these devices is the main topic of this paper. Effect of the presence of tap-changing transformers on static VAR compensator controller parameters and ratings necessary to stabilize load voltages at certain values are highlighted. The interrelation between transformer off nominal tap ratios and the SVC controller gains and droop slopes and the SVC rating are found. P-V curves are constructed to calculate loadability margins.

Keywords: SVC, voltage stability, P-V curve, reactive power, tap changing transformer.

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Authors: Anders Schou Simonsen, Thomas Condra, Kim Sørensen

Abstract:

Various processes are modelled using a discrete phase, where particles are seeded from a source. Such particles can represent liquid water droplets, which are affecting the continuous phase by exchanging thermal energy, momentum, species etc. Discrete phases are typically modelled using parcel, which represents a collection of particles, which share properties such as temperature, velocity etc. When coupling the phases, the exchange rates are integrated over the cell, in which the parcel is located. This can cause spikes and fluctuating exchange rates. This paper presents an alternative method of coupling a discrete and a continuous plug flow phase. This is done using triangular parcels, which span between nodes following the dynamics of single droplets. Thus, the triangular parcels are propagated using the corner nodes. At each time step, the exchange rates are spatially integrated over the surface of the triangular parcels, which yields a smooth continuous exchange rate to the continuous phase. The results shows that the method is more stable, converges slightly faster and yields smooth exchange rates compared with the steam tube approach. However, the computational requirements are about five times greater, so the applicability of the alternative method should be limited to processes, where the exchange rates are important. The overall balances of the exchanged properties did not change significantly using the new approach.

Keywords: CFD, coupling, discrete phase, parcel.

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Authors: Mahdi Ebrahimzadeh

Abstract:

In this paper we introduce an ultra low power CMOS LC oscillator and analyze a method to design a low power low phase noise complementary CMOS LC oscillator. A 1.8GHz oscillator is designed based on this analysis. The circuit has power supply equal to 1.1 V and dissipates 0.17 mW power. The oscillator is also optimized for low phase noise behavior. The oscillator phase noise is -126.2 dBc/Hz and -144.4 dBc/Hz at 1 MHz and 8 MHz offset respectively.

Keywords: LC oscillator, Low Power, Low Phase Noise

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Authors: C. Kocatepe, E. Taslak, C. F. Kumru, O. Arıkan

Abstract:

While choosing insulating oil, characteristic features such as thermal cooling, endurance, efficiency and being environment-friendly should be considered. Mineral oils are referred as petroleum-based oil. In this study, vegetable oils investigated as an alternative insulating liquid to mineral oil. Dissipation factor, breakdown voltage, relative dielectric constant and resistivity changes with the frequency and voltage of mineral, rapeseed and nut oils were measured. Experimental studies were performed according to ASTM D924 and IEC 60156 standards.

Keywords: Breakdown voltage, dielectric dissipation factor, mineral oil, vegetable oils.

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Authors: M. Nassereddine, J. Rizk, G. Nasserddine

Abstract:

High Voltage (HV) transmission lines are widely spread around residential places. They take all forms of shapes: concrete, steel, and timber poles. Earth grid always form part of the HV transmission structure, whereat soil resistivity value is one of the main inputs when it comes to determining the earth grid requirements. In this paper, the soil structure and its implication on the electrode resistance of HV transmission poles will be explored. In Addition, this paper will present simulation for various soil structures using IEEE and Australian standards to verify the computation with CDEGS software. Furthermore, the split factor behavior under different soil resistivity structure will be presented using CDEGS simulations.

Keywords: Earth Grid, EPR, High Voltage, Soil Resistivity Structure, Split Factor, Step Voltage, Touch Voltage.

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Authors: N. Ould Cherchali, A. Tlemçani, M. S. Boucherit, A. Morsli

Abstract:

Nature-inspired metaheuristic algorithms, particularly those founded on swarm intelligence, have attracted much attention over the past decade. Firefly algorithm has appeared in approximately seven years ago, its literature has enlarged considerably with different applications. It is inspired by the behavior of fireflies. The aim of this paper is the application of firefly algorithm for solving a nonlinear algebraic system. This resolution is needed to study the Selective Harmonic Eliminated Pulse Width Modulation strategy (SHEPWM) to eliminate the low order harmonics; results have been applied on multilevel inverters. The final results from simulations indicate the elimination of the low order harmonics as desired. Finally, experimental results are presented to confirm the simulation results and validate the efficaciousness of the proposed approach.

Keywords: Firefly algorithm, metaheuristic algorithm, multilelvel inverter, SHEPWM.

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