Search results for: Ignition delay time
6594 Optimal Tuning of a Fuzzy Immune PID Parameters to Control a Delayed System
Authors: S. Gherbi, F. Bouchareb
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This paper deals with the novel intelligent bio-inspired control strategies, it presents a novel approach based on an optimal fuzzy immune PID parameters tuning, it is a combination of a PID controller, inspired by the human immune mechanism with fuzzy logic. Such controller offers more possibilities to deal with the delayed systems control difficulties due to the delay term. Indeed, we use an optimization approach to tune the four parameters of the controller in addition to the fuzzy function; the obtained controller is implemented in a modified Smith predictor structure, which is well known that it is the most efficient to the control of delayed systems. The application of the presented approach to control a three tank delay system shows good performances and proves the efficiency of the method.
Keywords: Delayed systems, Fuzzy Immune PID, Optimization, Smith predictor.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 22216593 Analysis of Effect of Pre-Logic Factoring on Cell Based Combinatorial Logic Synthesis
Authors: Padmanabhan Balasubramanian, Bashetty Raghavendra
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In this paper, an analysis is presented, which demonstrates the effect pre-logic factoring could have on an automated combinational logic synthesis process succeeding it. The impact of pre-logic factoring for some arbitrary combinatorial circuits synthesized within a FPGA based logic design environment has been analyzed previously. This paper explores a similar effect, but with the non-regenerative logic synthesized using elements of a commercial standard cell library. On an overall basis, the results obtained pertaining to the analysis on a variety of MCNC/IWLS combinational logic benchmark circuits indicate that pre-logic factoring has the potential to facilitate simultaneous power, delay and area optimized synthesis solutions in many cases.Keywords: Algebraic factoring, Combinational logic synthesis, Standard cells, Low power, Delay optimization, Area reduction.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 13766592 A Study of Factors Affecting the Elapsed Time of Housing Renewal Project Implementation in Seoul
Authors: In Su Na, Gunwon Lee, Seiyong Kim
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This study analyzed the effect of area variables and economic variables on the length of each period of the project in order to analyze the effect of agreement rate on project implementation in housing renewal projects. In conclusion, as can be seen from these results, a low agreement rate may not translate into project promotion, and a higher agreement rate may not translate into project delay. The expectation of the policy is that the lower the agreement rate, the more projects would be promoted, but that is not the actual effect. From a policy consistency viewpoint, changing the agreement rate frequently, depending on the decision of the public, is not reasonable. The policy of using agreement rate as a necessary condition for project implementation should be reconsidered.Keywords: Area and Economic Variables, Elapsed time, Housing Renewal Project.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16246591 Exploratory Data Analysis of Passenger Movement on Delhi Urban Bus Route
Authors: Sourabh Jain, Sukhvir Singh Jain, Gaurav V. Jain
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Intelligent Transportation System is an integrated application of communication, control and monitoring and display process technologies for developing a user–friendly transportation system for urban areas in developing countries. In fact, the development of a country and the progress of its transportation system are complementary to each other. Urban traffic has been growing vigorously due to population growth as well as escalation of vehicle ownership causing congestion, delays, pollution, accidents, high-energy consumption and low productivity of resources. The development and management of urban transport in developing countries like India however, is at tryout stage with very few accumulations. Under the umbrella of ITS, urban corridor management strategy have proven to be one of the most successful system in accomplishing these objectives. The present study interprets and figures out the performance of the 27.4 km long Urban Bus route having six intersections, five flyovers and 29 bus stops that covers significant area of the city by causality analysis. Performance interpretations incorporate Passenger Boarding and Alighting, Dwell time, Distance between Bus Stops and Total trip time taken by bus on selected urban route.
Keywords: Congestion, Dwell time, delay, passengers boarding alighting, travel time.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 10806590 High Speed NP-CMOS and Multi-Output Dynamic Full Adder Cells
Authors: Reza Faghih Mirzaee, Mohammad Hossein Moaiyeri, Keivan Navi
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In this paper we present two novel 1-bit full adder cells in dynamic logic style. NP-CMOS (Zipper) and Multi-Output structures are used to design the adder blocks. Characteristic of dynamic logic leads to higher speeds than the other standard static full adder cells. Using HSpice and 0.18┬Ám CMOS technology exhibits a significant decrease in the cell delay which can result in a considerable reduction in the power-delay product (PDP). The PDP of Multi-Output design at 1.8v power supply is around 0.15 femto joule that is 5% lower than conventional dynamic full adder cell and at least 21% lower than other static full adders.Keywords: Bridge Style, Dynamic Logic, Full Adder, HighSpeed, Multi Output, NP-CMOS, Zipper.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 32556589 A high Speed 8 Transistor Full Adder Design Using Novel 3 Transistor XOR Gates
Authors: Shubhajit Roy Chowdhury, Aritra Banerjee, Aniruddha Roy, Hiranmay Saha
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The paper proposes the novel design of a 3T XOR gate combining complementary CMOS with pass transistor logic. The design has been compared with earlier proposed 4T and 6T XOR gates and a significant improvement in silicon area and power-delay product has been obtained. An eight transistor full adder has been designed using the proposed three-transistor XOR gate and its performance has been investigated using 0.15um and 0.35um technologies. Compared to the earlier designed 10 transistor full adder, the proposed adder shows a significant improvement in silicon area and power delay product. The whole simulation has been carried out using HSPICE.
Keywords: XOR gate, full adder, improvement in speed, area minimization, transistor count minimization.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 63296588 A High Time Resolution Digital Pulse Width Modulator Based on Field Programmable Gate Array’s Phase Locked Loop Megafunction
Authors: Jun Wang, Tingcun Wei
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The digital pulse width modulator (DPWM) is the crucial building block for digitally-controlled DC-DC switching converter, which converts the digital duty ratio signal into its analog counterpart to control the power MOSFET transistors on or off. With the increase of switching frequency of digitally-controlled DC-DC converter, the DPWM with higher time resolution is required. In this paper, a 15-bits DPWM with three-level hybrid structure is presented; the first level is composed of a7-bits counter and a comparator, the second one is a 5-bits delay line, and the third one is a 3-bits digital dither. The presented DPWM is designed and implemented using the PLL megafunction of FPGA (Field Programmable Gate Arrays), and the required frequency of clock signal is 128 times of switching frequency. The simulation results show that, for the switching frequency of 2 MHz, a DPWM which has the time resolution of 15 ps is achieved using a maximum clock frequency of 256MHz. The designed DPWM in this paper is especially useful for high-frequency digitally-controlled DC-DC switching converters.
Keywords: DPWM, PLL megafunction, FPGA, time resolution, digitally-controlled DC-DC switching converter.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 12446587 Sampled-Data Control for Fuel Cell Systems
Authors: H. Y. Jung, Ju H. Park, S. M. Lee
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Sampled-data controller is presented for solid oxide fuel cell systems which is expressed by a sector bounded nonlinear model. The proposed control law is obtained by solving a convex problem satisfying several linear matrix inequalities. Simulation results are given to show the effectiveness of the proposed design method.Keywords: Sampled-data control, Sector bound, Solid oxide fuel cell, Time-delay.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17236586 Synthesis and Simulation of Enhanced Buffer Router vs. Virtual Channel Router in NOC ON Cadence
Authors: Bhavana Prakash Shrivastava, Kavita Khare
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This paper presents a synthesis and simulation of proposed enhanced buffer. The design provides advantages of both buffer and bufferless network for that two cross bar switches are used. The concept of virtual channel (VC) is eliminated from the previous design by using an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input VCBs. This can be addressed by providing enhanced buffers on the bufferless link and creating two virtual networks. With this approach, VCBs act as distributed FIFO buffers. Without VCBs or VCs, deadlock prevention is achieved by duplicating physical channels. An enhanced buffer provides a function of hand shaking by providing a ready valid handshake signal and two bit storage. Through this design the power is reduced to 15.65% and delay is reduced to 97.88% with respect to virtual channel router.
Keywords: Enhanced buffer, Gate delay, NOC, VCs, VCB.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17476585 Evaluation of University Technology Malaysia on Campus Transport Access Management
Authors: Arash Moradkhani Roshandeh, Othman Che Puan
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Access Management is the proactive management of vehicular access points to land parcels adjacent to all manner of roadways. Good access management promotes safe and efficient use of the transportation network. This study attempts to utilize archived data from the University Technology of Malaysia on-campus area to assess the accuracy with which access management display some benefits. Results show that usage of access management reduces delay and fewer crashes. Clustered development can improve walking, cycling and transit travel, reduce parking requirements and improve emergency responses. Effective Access Management planning can also reduce total roadway facility costs by reducing the number of driveways and intersections. At the end after presenting recommendations some of the travel impact, and benefits that can be derived if these suggestions are implemented have been summarized with the related comments.Keywords: Access Management, Delay, Density, Traffic Flow
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 27096584 Performance, Emission and Combustion Characteristics of a Variable Compression Ratio Diesel Engine Fueled with Karanj Biodiesel and Its Blends
Authors: Ajay V. Kolhe, R. E. Shelke, S. S. Khandare
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The use of biodiesel in conventional diesel engines results in substantial reduction of unburned hydrocarbon, carbon monoxide and particulate matters. The performance, emission and combustion characteristics of a single cylinder four stroke variable compression ratio engine when fueled with Karanja (Pongamia) methyl ester and its 10-50 % blends with diesel (on a volume basis) are investigated and compared with standard diesel. The suitability of karanja methyl ester as a biofuel has been established in this study. The useful brake power obtained is similar to diesel fuel for all loads. Experiment has been conducted at a fixed engine speed of 1500 rpm, variable load and at compression ratios of 17.5:1 and 18.5:1. The impact of compression ratio on fuel consumption, combustion pressures and exhaust gas emissions has been investigated and presented. Optimum compression ratio which gives best performance has been identified. The results indicate longer ignition delay, maximum rate of pressure rise, lower heat release rate and higher mass fraction burnt at higher compression ratio for pongamia oil methyl ester when compared to that of diesel. The brake thermal efficiency for pongamia oil methyl ester blends and diesel has been calculated and the blend B20 is found to give maximum thermal efficiency. The blends when used as fuel results in reduction of carbon monoxide, hydrocarbon and increase in nitrogen oxides emissions. PME as an oxygenated fuel generated more complete combustion, which means increased torque and power. This is also supported with higher thermal efficiencies of the PME blends. NOx is slightly increased due to the higher combustion temperature and the presence of fuel oxygen with the blend at full load. PME as a new Biodiesel and its blends can be used in diesel engines without any engine modification.
Keywords: Variable compression ratio CI engine, performance, combustion, emissions, biodiesel.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 32986583 Visual Inspection of Work Piece with a Complex Shape by Means of Robot Manipulator
Authors: A. Y. Bani Hashim, N. S. A. Ramdan
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Inconsistency in manual inspection is real because humans get tired after some time. Recent trends show that automatic inspection is more appealing for mass production inspections. In such as a case, a robot manipulator seems the best candidate to run a dynamic visual inspection. The purpose of this work is to estimate the optimum workspace where a robot manipulator would perform a visual inspection process onto a work piece where a camera is attached to the end effector. The pseudo codes for the planned path are derived from the number of tool transit points, the delay time at the transit points, the process cycle time, and the configuration space that the distance between the tool and the work piece. It is observed that express start and swift end are acceptable in a robot program because applicable works usually in existence during these moments. However, during the mid-range cycle, there are always practical tasks programmed to be executed. For that reason, it is acceptable to program the robot such as that speedy alteration of actuator displacement is avoided. A dynamic visual inspection system using a robot manipulator seems practical for a work piece with a complex shape.
Keywords: Robot manipulator, Visual inspection, Work piece, Trajectory planning.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16616582 Research on Morning Commuting Behavior under Autonomous Vehicle Environment Based on Activity Method
Authors: Qing Dai, Zhengkui Lin, Jiajia Zhang, Yi Qu
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Based on activity method, this paper focuses on morning commuting behavior when commuters travel with autonomous vehicles (AVs). Firstly, a net utility function of commuters is constructed by the activity utility of commuters at home, in car and at workplace, and the disutility of travel time cost and that of schedule delay cost. Then, this net utility function is applied to build an equilibrium model. Finally, under the assumption of constant marginal activity utility, the properties of equilibrium are analyzed. The results show that, in autonomous driving, the starting and ending time of morning peak and the number of commuters who arrive early and late at workplace are the same as those in manual driving. In automatic driving, however, the departure rate of arriving early at workplace is higher than that of manual driving, while the departure rate of arriving late is just the opposite. In addition, compared with manual driving, the departure time of arriving at workplace on time is earlier and the number of people queuing at the bottleneck is larger in automatic driving. However, the net utility of commuters and the total net utility of system in automatic driving are greater than those in manual driving.
Keywords: Autonomous cars, bottleneck model, activity utility, user equilibrium.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 6096581 The Simulation and Realization of Input-Buffer Scheduling Algorithm in Satellite Switching System
Authors: Yi Zhang, Quan Zhou, Jun Li, Yanlang Hu
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Scheduling algorithm is a key technology in satellite switching system with input-buffer. In this paper, a new scheduling algorithm and its realization are proposed. Based on Crossbar switching fabric, the algorithm adopts serial scheduling strategy and adjusts the output port arbitrating strategy for the better equity of every port. Consequently, it increases the matching probability. The algorithm can greatly reduce the scheduling delay and cell loss rate. The analysis and simulation results by OPNET show that the proposed algorithm has the better performance than others in average delay and cell loss rate, and has the equivalent complexity. On the basis of these results, the hardware realization and simulation based on FPGA are completed, which validate the feasibility of the new scheduling algorithm.
Keywords: Scheduling algorithm, input-buffer, serial scheduling, hardware design.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14756580 Design and Analysis of a Low Power High Speed 1 Bit Full Adder Cell Based On TSPC Logic with Multi-Threshold CMOS
Authors: Ankit Mitra
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An adder is one of the most integral component of a digital system like a digital signal processor or a microprocessor. Being an extremely computationally intensive part of a system, the optimization for speed and power consumption of the adder is of prime importance. In this paper we have designed a 1 bit full adder cell based on dynamic TSPC logic to achieve high speed operation. A high threshold voltage sleep transistor is used to reduce the static power dissipation in standby mode. The circuit is designed and simulated in TSPICE using TSMC 180nm CMOS process. Average power consumption, delay and power-delay product is measured which showed considerable improvement in performance over the existing full adder designs.
Keywords: CMOS, TSPC, MTCMOS, ALU, Clock gating, power gating, pipelining.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 30736579 A New Protocol for Concealed Data Aggregation in Wireless Sensor Networks
Authors: M. Abbasi Dezfouli, S. Mazraeh, M. H. Yektaie
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Wireless sensor networks (WSN) consists of many sensor nodes that are placed on unattended environments such as military sites in order to collect important information. Implementing a secure protocol that can prevent forwarding forged data and modifying content of aggregated data and has low delay and overhead of communication, computing and storage is very important. This paper presents a new protocol for concealed data aggregation (CDA). In this protocol, the network is divided to virtual cells, nodes within each cell produce a shared key to send and receive of concealed data with each other. Considering to data aggregation in each cell is locally and implementing a secure authentication mechanism, data aggregation delay is very low and producing false data in the network by malicious nodes is not possible. To evaluate the performance of our proposed protocol, we have presented computational models that show the performance and low overhead in our protocol.Keywords: Wireless Sensor Networks, Security, Concealed Data Aggregation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17356578 Performance Analysis of High Speed Adder for DSP Applications
Authors: N. Mahendran, S. Vishwaja
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The Carry Select Adder (CSLA) is a fast adder which improves the speed of addition. From the structure of the CSLA, it is clear that there is opportunity for reducing the area. The logic operations involved in conventional CSLA and binary to excess-1 converter (BEC) based CSLA are analyzed to make a study on the data dependence and to identify redundant logic operations. In the existing adder design, the carry select (CS) operation is scheduled before the final-sum, which is different from the conventional CSLA design. In the presented scheme, Kogge stone parallel adder approach is used instead of existing adder design it will generate fast carry for intermediate stages and also improves the speed of addition. When compared to existing adder design the delay is less in the proposed adder design.
Keywords: Binary to excess-1 converter, delay, carry select adder, Kogge stone adder, speed.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14656577 Performance Evaluation of an Efficient Asynchronous Protocol for WDM Ring MANs
Authors: Peristera A. Baziana
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The idea of the asynchronous transmission in wavelength division multiplexing (WDM) ring MANs is studied in this paper. Especially, we present an efficient access technique to coordinate the collisions-free transmission of the variable sizes of IP traffic in WDM ring core networks. Each node is equipped with a tunable transmitter and a tunable receiver. In this way, all the wavelengths are exploited for both transmission and reception. In order to evaluate the performance measures of average throughput, queuing delay and packet dropping probability at the buffers, a simulation model that assumes symmetric access rights among the nodes is developed based on Poisson statistics. Extensive numerical results show that the proposed protocol achieves apart from high bandwidth exploitation for a wide range of offered load, fairness of queuing delay and dropping events among the different packets size categories.
Keywords: Asynchronous transmission, collision avoidance, wavelength division multiplexing.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20936576 The New Method of Concealed Data Aggregation in Wireless Sensor: A Case Study
Authors: M. Abbasi Dezfouli, S. Mazraeh, M. H. Yektaie
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Wireless sensor networks (WSN) consists of many sensor nodes that are placed on unattended environments such as military sites in order to collect important information. Implementing a secure protocol that can prevent forwarding forged data and modifying content of aggregated data and has low delay and overhead of communication, computing and storage is very important. This paper presents a new protocol for concealed data aggregation (CDA). In this protocol, the network is divided to virtual cells, nodes within each cell produce a shared key to send and receive of concealed data with each other. Considering to data aggregation in each cell is locally and implementing a secure authentication mechanism, data aggregation delay is very low and producing false data in the network by malicious nodes is not possible. To evaluate the performance of our proposed protocol, we have presented computational models that show the performance and low overhead in our protocol.
Keywords: Wireless Sensor Networks, Security, Concealed Data Aggregation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17686575 Performance Evaluation of Packet Scheduling with Channel Conditioning Aware Based On WiMAX Networks
Authors: Elmabruk Laias, Abdalla M. Hanashi, Mohammed Alnas
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Worldwide Interoperability for Microwave Access (WiMAX) became one of the most challenging issues, since it was responsible for distributing available resources of the network among all users this leaded to the demand of constructing and designing high efficient scheduling algorithms in order to improve the network utilization, to increase the network throughput, and to minimize the end-to-end delay. In this study, the proposed algorithm focuses on an efficient mechanism to serve non_real time traffic in congested networks by considering channel status.
Keywords: WiMAX, Quality of Services (QoS), OPNE, Diff-Serv (DS).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18346574 Advanced Compound Coating for Delaying Corrosion of Fast-Dissolving Alloy in High Temperature and Corrosive Environment
Authors: Lei Zhao, Yi Song, Tim Dunne, Jiaxiang (Jason) Ren, Wenhan Yue, Lei Yang, Li Wen, Yu Liu
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Fasting dissolving magnesium (DM) alloy technology has contributed significantly to the “Shale Revolution” in oil and gas industry. This application requires DM downhole tools dissolving initially at a slow rate, rapidly accelerating to a high rate after certain period of operation time (typically 8 h to 2 days), a contradicting requirement that can hardly be addressed by traditional Mg alloying or processing itself. Premature disintegration has been broadly reported in downhole DM tool from field trials. To address this issue, “temporary” thin polymers of various formulations are currently coated onto DM surface to delay its initial dissolving. Due to conveying parts, harsh downhole condition, and high dissolving rate of the base material, the current delay coatings relying on pure polymers are found to perform well only at low temperature (typical < 100 ℃) and parts without sharp edges or corners, as severe geometries prevent high quality thin film coatings from forming effectively. In this study, a coating technology combining Plasma Electrolytic Oxide (PEO) coatings with advanced thin film deposition has been developed, which can delay DM complex parts (with sharp corners) in corrosive fluid at 150 ℃ for over 2 days. Synergistic effects between porous hard PEO coating and chemical inert elastic-polymer sealing leads to its delaying dissolution improvement, and strong chemical/physical bonding between these two layers has been found to play essential role. Microstructure of this advanced coating and compatibility between PEO and various polymer selections has been thoroughly investigated and a model is also proposed to explain its delaying performance. This study could not only benefit oil and gas industry to unplug their High Temperature High Pressure (HTHP) unconventional resources inaccessible before, but also potentially provides a technical route for other industries (e.g., bio-medical, automobile, aerospace) where primer anti-corrosive protection on light Mg alloy is highly demanded.
Keywords: Dissolvable magnesium, coating, plasma electrolytic oxide, sealer.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 5806573 Semi-Blind Two-Dimensional Code Acquisition in CDMA Communications
Authors: Rui Wu, Tapani Ristaniemi
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In this paper, we propose a new algorithm for joint time-delay and direction-of-arrival (DOA) estimation, here called two-dimensional code acquisition, in an asynchronous directsequence code-division multiple-access (DS-CDMA) array system. This algorithm depends on eigenvector-eigenvalue decomposition of sample correlation matrix, and requires to know desired user-s training sequence. The performance of the algorithm is analyzed both analytically and numerically in uncorrelated and coherent multipath environment. Numerical examples show that the algorithm is robust with unknown number of coherent signals.
Keywords: Two-Dimensional Code Acquisition, EV-t, DSCDMA
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15266572 Adaptive Fuzzy Routing in Opportunistic Network (AFRON)
Authors: Payam Nabhani, Sima Radmanesh
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Opportunistic network is a kind of Delay Tolerant Networks (DTN) where the nodes in this network come into contact with each other opportunistically and communicate wirelessly and, an end-to-end path between source and destination may have never existed, and disconnection and reconnection is common in the network. In such a network, because of the nature of opportunistic network, perhaps there is no a complete path from source to destination for most of the time and even if there is a path; the path can be very unstable and may change or break quickly. Therefore, routing is one of the main challenges in this environment and, in order to make communication possible in an opportunistic network, the intermediate nodes have to play important role in the opportunistic routing protocols. In this paper we proposed an Adaptive Fuzzy Routing in opportunistic network (AFRON). This protocol is using the simple parameters as input parameters to find the path to the destination node. Using Message Transmission Count, Message Size and Time To Live parameters as input fuzzy to increase delivery ratio and decrease the buffer consumption in the all nodes of network.
Keywords: Opportunistic Routing, Fuzzy Routing, Opportunistic Network, Message Routing.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15376571 Enhancing Performance of Bluetooth Piconets Using Priority Scheduling and Exponential Back-Off Mechanism
Authors: Dharmendra Chourishi “Maitraya”, Sridevi Seshadri
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Bluetooth is a personal wireless communication technology and is being applied in many scenarios. It is an emerging standard for short range, low cost, low power wireless access technology. Current existing MAC (Medium Access Control) scheduling schemes only provide best-effort service for all masterslave connections. It is very challenging to provide QoS (Quality of Service) support for different connections due to the feature of Master Driven TDD (Time Division Duplex). However, there is no solution available to support both delay and bandwidth guarantees required by real time applications. This paper addresses the issue of how to enhance QoS support in a Bluetooth piconet. The Bluetooth specification proposes a Round Robin scheduler as possible solution for scheduling the transmissions in a Bluetooth Piconet. We propose an algorithm which will reduce the bandwidth waste and enhance the efficiency of network. We define token counters to estimate traffic of real-time slaves. To increase bandwidth utilization, a back-off mechanism is then presented for best-effort slaves to decrease the frequency of polling idle slaves. Simulation results demonstrate that our scheme achieves better performance over the Round Robin scheduling.Keywords: Piconet, Medium Access Control, Polling algorithm, Scheduling, QoS, Time Division Duplex (TDD).
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17006570 Power and Delay Optimized Graph Representation for Combinational Logic Circuits
Authors: Padmanabhan Balasubramanian, Karthik Anantha
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Structural representation and technology mapping of a Boolean function is an important problem in the design of nonregenerative digital logic circuits (also called combinational logic circuits). Library aware function manipulation offers a solution to this problem. Compact multi-level representation of binary networks, based on simple circuit structures, such as AND-Inverter Graphs (AIG) [1] [5], NAND Graphs, OR-Inverter Graphs (OIG), AND-OR Graphs (AOG), AND-OR-Inverter Graphs (AOIG), AND-XORInverter Graphs, Reduced Boolean Circuits [8] does exist in literature. In this work, we discuss a novel and efficient graph realization for combinational logic circuits, represented using a NAND-NOR-Inverter Graph (NNIG), which is composed of only two-input NAND (NAND2), NOR (NOR2) and inverter (INV) cells. The networks are constructed on the basis of irredundant disjunctive and conjunctive normal forms, after factoring, comprising terms with minimum support. Construction of a NNIG for a non-regenerative function in normal form would be straightforward, whereas for the complementary phase, it would be developed by considering a virtual instance of the function. However, the choice of best NNIG for a given function would be based upon literal count, cell count and DAG node count of the implementation at the technology independent stage. In case of a tie, the final decision would be made after extracting the physical design parameters. We have considered AIG representation for reduced disjunctive normal form and the best of OIG/AOG/AOIG for the minimized conjunctive normal forms. This is necessitated due to the nature of certain functions, such as Achilles- heel functions. NNIGs are found to exhibit 3.97% lesser node count compared to AIGs and OIG/AOG/AOIGs; consume 23.74% and 10.79% lesser library cells than AIGs and OIG/AOG/AOIGs for the various samples considered. We compare the power efficiency and delay improvement achieved by optimal NNIGs over minimal AIGs and OIG/AOG/AOIGs for various case studies. In comparison with functionally equivalent, irredundant and compact AIGs, NNIGs report mean savings in power and delay of 43.71% and 25.85% respectively, after technology mapping with a 0.35 micron TSMC CMOS process. For a comparison with OIG/AOG/AOIGs, NNIGs demonstrate average savings in power and delay by 47.51% and 24.83%. With respect to device count needed for implementation with static CMOS logic style, NNIGs utilize 37.85% and 33.95% lesser transistors than their AIG and OIG/AOG/AOIG counterparts.Keywords: AND-Inverter Graph, OR-Inverter Graph, DirectedAcyclic Graph, Low power design, Delay optimization.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20526569 Loop-free Local Path Repair Strategy for Directed Diffusion
Authors: Basma M. Mohammad El-Basioni, Sherine M. Abd El-kader, Hussein S. Eissa
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This paper proposes an implementation for the directed diffusion paradigm aids in studying this paradigm-s operations and evaluates its behavior according to this implementation. The directed diffusion is evaluated with respect to the loss percentage, lifetime, end-to-end delay, and throughput. From these evaluations some suggestions and modifications are proposed to improve the directed diffusion behavior according to this implementation with respect to these metrics. The proposed modifications reflect the effect of local path repair by introducing a technique called Loop-free Local Path Repair (LLPR) which improves the directed diffusion behavior especially with respect to packet loss percentage by about 92.69%. Also LLPR improves the throughput and end-to-end delay by about 55.31% and 14.06% respectively, while the lifetime decreases by about 29.79%.Keywords: Attribute-value based naming scheme, data gathering, data-centric routing, energy-efficiency, locality, wireless sensor network.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14266568 Multicast Optimization Techniques using Best Effort Genetic Algorithms
Authors: Dinesh Kumar, Y. S. Brar, V. K. Banga
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Multicast Network Technology has pervaded our lives-a few examples of the Networking Techniques and also for the improvement of various routing devices we use. As we know the Multicast Data is a technology offers many applications to the user such as high speed voice, high speed data services, which is presently dominated by the Normal networking and the cable system and digital subscriber line (DSL) technologies. Advantages of Multi cast Broadcast such as over other routing techniques. Usually QoS (Quality of Service) Guarantees are required in most of Multicast applications. The bandwidth-delay constrained optimization and we use a multi objective model and routing approach based on genetic algorithm that optimizes multiple QoS parameters simultaneously. The proposed approach is non-dominated routes and the performance with high efficiency of GA. Its betterment and high optimization has been verified. We have also introduced and correlate the result of multicast GA with the Broadband wireless to minimize the delay in the path.Keywords: GA (genetic Algorithms), Quality of Service, MOGA, Steiner Tree.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15566567 Design and Implementation of 4 Bit Multiplier Using Fault Tolerant Hybrid Full Adder
Authors: C. Kalamani, V. Abishek Karthick, S. Anitha, K. Kavin Kumar
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The fault tolerant system plays a crucial role in the critical applications which are being used in the present scenario. A fault may change the functionality of circuits. Aim of this paper is to design multiplier using fault tolerant hybrid full adder. Fault tolerant hybrid full adder is designed to check and repair any fault in the circuit using self-checking circuit and the self-repairing circuit. Further, the use of conventional logic circuits may result in more area, delay as well as power consumption. In order to reduce these parameters of the circuit, GDI (Gate Diffusion Input) techniques with less number of transistors are used compared to conventional full adder circuit. This reduces the area, delay and power consumption. The proposed method solves the major problems occurring in the most crucial and critical applications.
Keywords: Gate diffusion input, hybrid full adder, self-checking, fault tolerant.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14426566 Smart Grid Communication Architecture Modeling for Heterogeneous Network Based Advanced Metering Infrastructure
Authors: S. Prem Kumar, H. Thameemul Ansari, V. Saminadan
Abstract:
A smart grid is an emerging technology in the power delivery system which provides an intelligent, self-recovery and homeostatic grid in delivering power to the users. Smart grid communication network provides transmission capacity for information transformation within the connected nodes in the network, in favor of functional and operational needs. In the electric grids communication network delay is based on choosing the appropriate technology and the types of devices enforced. In distinction, the combination of IEEE 802.16 based WiMAX and IEEE 802.11 based WiFi technologies provides improved coverage and gives low delay performances to meet the smart grid needs. By incorporating this method in Wide Area Monitoring System (WAMS) and Advanced Metering Infrastructure (AMI) the performance of the smart grid will be considerably improved. This work deals with the implementation of WiMAX-WLAN integrated network architecture for WAMS and AMI in the smart grid.Keywords: WiMAX, WLAN, WAMS, Smart Grid, HetNet, AMI.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 10176565 Low Latency Routing Algorithm for Unmanned Aerial Vehicles Ad-Hoc Networks
Authors: Abdel Ilah Alshabtat, Liang Dong
Abstract:
In this paper, we proposed a new routing protocol for Unmanned Aerial Vehicles (UAVs) that equipped with directional antenna. We named this protocol Directional Optimized Link State Routing Protocol (DOLSR). This protocol is based on the well known protocol that is called Optimized Link State Routing Protocol (OLSR). We focused in our protocol on the multipoint relay (MPR) concept which is the most important feature of this protocol. We developed a heuristic that allows DOLSR protocol to minimize the number of the multipoint relays. With this new protocol the number of overhead packets will be reduced and the End-to-End delay of the network will also be minimized. We showed through simulation that our protocol outperformed Optimized Link State Routing Protocol, Dynamic Source Routing (DSR) protocol and Ad- Hoc On demand Distance Vector (AODV) routing protocol in reducing the End-to-End delay and enhancing the overall throughput. Our evaluation of the previous protocols was based on the OPNET network simulation tool.Keywords: Mobile Ad-Hoc Networks, Ad-Hoc RoutingProtocols, Optimized link State Routing Protocol, Unmanned AerialVehicles, Directional Antenna.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2504