Search results for: chaotic circuit
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 669

Search results for: chaotic circuit

99 A Digital Pulse-Width Modulation Controller for High-Temperature DC-DC Power Conversion Application

Authors: Jingjing Lan, Jun Yu, Muthukumaraswamy Annamalai Arasu

Abstract:

This paper presents a digital non-linear pulse-width modulation (PWM) controller in a high-voltage (HV) buck-boost DC-DC converter for the piezoelectric transducer of the down-hole acoustic telemetry system. The proposed design controls the generation of output signal with voltage higher than the supply voltage and is targeted to work under high temperature. To minimize the power consumption and silicon area, a simple and efficient design scheme is employed to develop the PWM controller. The proposed PWM controller consists of serial to parallel (S2P) converter, data assign block, a mode and duty cycle controller (MDC), linearly PWM (LPWM) and noise shaper, pulse generator and clock generator. To improve the reliability of circuit operation at higher temperature, this design is fabricated with the 1.0-μm silicon-on-insulator (SOI) CMOS process. The implementation results validated that the proposed design has the advantages of smaller size, lower power consumption and robust thermal stability.

Keywords: DC-DC power conversion, digital control, high temperatures, pulse-width modulation.

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98 Evaluating Complexity – Ethical Challenges in Computational Design Processes

Authors: J.Partanen

Abstract:

Complexity, as a theoretical background has made it easier to understand and explain the features and dynamic behavior of various complex systems. As the common theoretical background has confirmed, borrowing the terminology for design from the natural sciences has helped to control and understand urban complexity. Phenomena like self-organization, evolution and adaptation are appropriate to describe the formerly inaccessible characteristics of the complex environment in unpredictable bottomup systems. Increased computing capacity has been a key element in capturing the chaotic nature of these systems. A paradigm shift in urban planning and architectural design has forced us to give up the illusion of total control in urban environment, and consequently to seek for novel methods for steering the development. New methods using dynamic modeling have offered a real option for more thorough understanding of complexity and urban processes. At best new approaches may renew the design processes so that we get a better grip on the complex world via more flexible processes, support urban environmental diversity and respond to our needs beyond basic welfare by liberating ourselves from the standardized minimalism. A complex system and its features are as such beyond human ethics. Self-organization or evolution is either good or bad. Their mechanisms are by nature devoid of reason. They are common in urban dynamics in both natural processes and gas. They are features of a complex system, and they cannot be prevented. Yet their dynamics can be studied and supported. The paradigm of complexity and new design approaches has been criticized for a lack of humanity and morality, but the ethical implications of scientific or computational design processes have not been much discussed. It is important to distinguish the (unexciting) ethics of the theory and tools from the ethics of computer aided processes based on ethical decisions. Urban planning and architecture cannot be based on the survival of the fittest; however, the natural dynamics of the system cannot be impeded on grounds of being “non-human". In this paper the ethical challenges of using the dynamic models are contemplated in light of a few examples of new architecture and dynamic urban models and literature. It is suggested that ethical challenges in computational design processes could be reframed under the concepts of responsibility and transparency.

Keywords: urban planning, architecture, dynamic modeling, ethics, complexity theory.

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97 High-Frequency Spectrum Analysis of VFTO Generated inside Gas Insulated Substations

Authors: M. A. Abd-Allah, A. Said, Ebrahim A. Badran

Abstract:

Worldwide many electrical equipment insulation failures have been reported caused by switching operations, while those equipments had previously passed all the standard tests and complied with all quality requirements. The problem is mostly associated with high-frequency overvoltages generated during opening or closing of a switching device. The transients generated during switching operations in a Gas Insulated Substation (GIS) are associated with high frequency components in the order of few tens of MHz. The frequency spectrum of the VFTO generated in the 220/66 kV Wadi-Hoff GIS is analyzed using Fast Fourier Transform technique. The main frequency with high voltage amplitude due to the operation of disconnector (DS5) is 5 to 10 MHz, with the highest amplitude at 9 MHz. The main frequency with high voltage amplitude due to the operation of circuit breaker (CB5) is 1 to 25 MHz, with the highest amplitude at 2 MHz. Mitigating techniques damped the oscillating frequencies effectively. The using of cable terminal reduced the frequency oscillation effectively than that of OHTL terminal. The using of a shunt capacitance results in vanishing the high frequency components. Ferrite rings reduces the high frequency components effectively especially in the range 2 to 7 MHz. The using of RC and RL filters results in vanishing the high frequency components.

Keywords: GIS, VFTO, Mitigation Techniques, Frequency spectrum, FFT, EMTP/ATP.

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96 Generalized Mathematical Description and Simulation of Grid-Tied Thyristor Converters

Authors: V. S. Klimash, Ye Min Thu

Abstract:

Thyristor rectifiers, inverters grid-tied, and AC voltage regulators are widely used in industry, and on electrified transport, they have a lot in common both in the power circuit and in the control system. They have a common mathematical structure and switching processes. At the same time, the rectifier, but the inverter units and thyristor regulators of alternating voltage are considered separately both theoretically and practically. They are written about in different books as completely different devices. The aim of this work is to combine them into one class based on the unity of the equations describing electromagnetic processes, and then, to show this unity on the mathematical model and experimental setup. Based on research from mathematics to the product, a conclusion is made about the methodology for the rapid conduct of research and experimental design work, preparation for production and serial production of converters with a unified bundle. In recent years, there has been a transition from thyristor circuits and transistor in modular design. Showing the example of thyristor rectifiers and AC voltage regulators, we can conclude that there is a unity of mathematical structures and grid-tied thyristor converters.

Keywords: Direct current, alternating current, rectifier, AC voltage regulator, generalized mathematical model.

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95 Leakage Reduction ONOFIC Approach for Deep Submicron VLSI Circuits Design

Authors: Vijay Kumar Sharma, Manisha Pattanaik, Balwinder Raj

Abstract:

Minimizations of power dissipation, chip area with higher circuit performance are the necessary and key parameters in deep submicron regime. The leakage current increases sharply in deep submicron regime and directly affected the power dissipation of the logic circuits. In deep submicron region the power dissipation as well as high performance is the crucial concern since increasing importance of portable systems. Number of leakage reduction techniques employed to reduce the leakage current in deep submicron region but they have some trade-off to control the leakage current. ONOFIC approach gives an excellent agreement between power dissipation and propagation delay for designing the efficient CMOS logic circuits. In this article ONOFIC approach is compared with LECTOR technique and output results show that ONOFIC approach significantly reduces the power dissipation and enhance the speed of the logic circuits. The lower power delay product is the big outcome of this approach and makes it an influential leakage reduction technique.

Keywords: Deep submicron, Leakage Current, LECTOR, ONOFIC, Power Delay Product

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94 Digital Control Algorithm Based on Delta-Operator for High-Frequency DC-DC Switching Converters

Authors: Renkai Wang, Tingcun Wei

Abstract:

In this paper, a digital control algorithm based on delta-operator is presented for high-frequency digitally-controlled DC-DC switching converters. The stability and the controlling accuracy of the DC-DC switching converters are improved by using the digital control algorithm based on delta-operator without increasing the hardware circuit scale. The design method of voltage compensator in delta-domain using PID (Proportion-Integration- Differentiation) control is given in this paper, and the simulation results based on Simulink platform are provided, which have verified the theoretical analysis results very well. It can be concluded that, the presented control algorithm based on delta-operator has better stability and controlling accuracy, and easier hardware implementation than the existed control algorithms based on z-operator, therefore it can be used for the voltage compensator design in high-frequency digitally- controlled DC-DC switching converters.

Keywords: Digitally-controlled DC-DC switching converter, finite word length, control algorithm based on delta-operator, high-frequency, stability.

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93 A Review of Control Schemes for Active Power Filters in Order to Power Quality Improvement

Authors: Mohammad Hasan Raouf, Azim Nowbakht, Mohammad Bagher Haddadi, Mohammad Reza Tabatabaei

Abstract:

Power quality has become a very important issue recently due to the impact on electricity suppliers, equipment manufacturers and customers. Power quality is described as the variation of voltage, current and frequency in a power system. Voltage magnitude is one of the major factors that determine the quality of power. Indeed, custom power technology, the low-voltage counterpart of the more widely known flexible ac transmission system (FACTS) technology, aimed at high-voltage power transmission applications, has emerged as a credible solution to solve many problems relating to power quality problems. There are various power quality problems such as voltage sags, swells, flickers, interruptions and harmonics etc. Active Power Filter (APF) is one of the custom power devices and can mitigate harmonics, reactive power and unbalanced load currents originating from load side. In this study, an extensive review of APF studies, the advantages and disadvantages of each introduced methods are presented. The study also helps the researchers to choose the optimum control techniques and power circuit configuration for APF applications.

Keywords: Power Quality, Custom Power, Active Filter, Control Approach.

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92 Magnetic End Leakage Flux in a Spoke Type Rotor Permanent Magnet Synchronous Generator

Authors: Petter Eklund, Jonathan Sjölund, Sandra Eriksson, Mats Leijon

Abstract:

The spoke type rotor can be used to obtain magnetic flux concentration in permanent magnet machines. This allows the air gap magnetic flux density to exceed the remanent flux density of the permanent magnets but gives problems with leakage fluxes in the magnetic circuit. The end leakage flux of one spoke type permanent magnet rotor design is studied through measurements and finite element simulations. The measurements are performed in the end regions of a 12 kW prototype generator for a vertical axis wind turbine. The simulations are made using three dimensional finite elements to calculate the magnetic field distribution in the end regions of the machine. Also two dimensional finite element simulations are performed and the impact of the two dimensional approximation is studied. It is found that the magnetic leakage flux in the end regions of the machine is equal to about 20% of the flux in the permanent magnets. The overestimation of the performance by the two dimensional approximation is quantified and a curve-fitted expression for its behavior is suggested.

Keywords: End effects, end leakage flux, permanent magnet machine, spoke type rotor.

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91 Separation of Manganese and Cadmium from Cobalt Electrolyte Solution by Solvent Extraction

Authors: Shafiq Alam, Mirza Hossain, Hesam Hassan Nejad

Abstract:

Impurity metals such as manganese and cadmium from high-tenor cobalt electrolyte solution were selectively removed by solvent extraction method using Co-D2EHPA after converting the functional group of D2EHPA with Co2+ ions. The process parameters such as pH, organic concentration, O/A ratio, kinetics etc. were investigated and the experiments were conducted by batch tests in the laboratory bench scale. Results showed that a significant amount of manganese and cadmium can be extracted using Co-D2EHPA for the optimum processing of cobalt electrolyte solution at equilibrium pH about 3.5. The McCabe-Thiele diagram, constructed from the extraction studies showed that 100% impurities can be extracted through four stages for manganese and three stages for cadmium using O/A ratio of 0.65 and 1.0, respectively. From the stripping study, it was found that 100% manganese and cadmium can be stripped from the loaded organic using 0.4 M H2SO4 in a single contact. The loading capacity of Co-D2EHPA by manganese and cadmium were also investigated with different O/A ratio as well as with number of stages of contact of aqueous and organic phases. Valuable information was obtained for the designing of an impurities removal process for the production of pure cobalt with less trouble in the electrowinning circuit.

Keywords: Manganese, Cadmium, Cobalt, D2EHPA, Solvent extraction.

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90 Efficient Semi-Systolic Finite Field Multiplier Using Redundant Basis

Authors: Hyun-Ho Lee, Kee-Won Kim

Abstract:

The arithmetic operations over GF(2m) have been extensively used in error correcting codes and public-key cryptography schemes. Finite field arithmetic includes addition, multiplication, division and inversion operations. Addition is very simple and can be implemented with an extremely simple circuit. The other operations are much more complex. The multiplication is the most important for cryptosystems, such as the elliptic curve cryptosystem, since computing exponentiation, division, and computing multiplicative inverse can be performed by computing multiplication iteratively. In this paper, we present a parallel computation algorithm that operates Montgomery multiplication over finite field using redundant basis. Also, based on the multiplication algorithm, we present an efficient semi-systolic multiplier over finite field. The multiplier has less space and time complexities compared to related multipliers. As compared to the corresponding existing structures, the multiplier saves at least 5% area, 50% time, and 53% area-time (AT) complexity. Accordingly, it is well suited for VLSI implementation and can be easily applied as a basic component for computing complex operations over finite field, such as inversion and division operation.

Keywords: Finite field, Montgomery multiplication, systolic array, cryptography.

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89 Design and Simulation of CCM Boost Converter for Power Factor Correction Using Variable Duty Cycle Control

Authors: M. Nirmala

Abstract:

Power quality in terms of power factor, THD and precisely regulated output voltage are the major key factors for efficient operation of power electronic converters. This paper presents an easy and effective active wave shaping control scheme for the pulsed input current drawn by the uncontrolled diode bridge rectifier thereby achieving power factor nearer to unity and also satisfying the THD specifications. It also regulates the output DC-bus voltage. CCM boost power factor correction with constant frequency operation features smaller inductor current ripple resulting in low RMS currents on inductor and switch thus leading to low electromagnetic interference. The objective of this work is to develop an active PFC control circuit using CCM boost converter implementing variable duty cycle control. The proposed scheme eliminates inductor current sensing requirements yet offering good performance and satisfactory results for maintaining the power quality. Simulation results have been presented which covers load changes also.

Keywords: CCM Boost converter, Power factor Correction, Total harmonic distortion, Variable Duty Cycle.

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88 Voltage Sag Characteristics during Symmetrical and Asymmetrical Faults

Authors: Ioannis Binas, Marios Moschakis

Abstract:

Electrical faults in transmission and distribution networks can have great impact on the electrical equipment used. Fault effects depend on the characteristics of the fault as well as the network itself. It is important to anticipate the network’s behavior during faults when planning a new equipment installation, as well as troubleshooting. Moreover, working backwards, we could be able to estimate the characteristics of the fault when checking the perceived effects. Different transformer winding connections dominantly used in the Greek power transfer and distribution networks and the effects of 1-phase to neutral, phase-to-phase, 2-phases to neutral and 3-phase faults on different locations of the network were simulated in order to present voltage sag characteristics. The study was performed on a generic network with three steps down transformers on two voltage level buses (one 150 kV/20 kV transformer and two 20 kV/0.4 kV). We found that during faults, there are significant changes both on voltage magnitudes and on phase angles. The simulations and short-circuit analysis were performed using the PSCAD simulation package. This paper presents voltage characteristics calculated for the simulated network, with different approaches on the transformer winding connections during symmetrical and asymmetrical faults on various locations.

Keywords: Phase angle shift, power quality, transformer winding connections, voltage sag propagation.

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87 Current-Mode Resistorless SIMO Universal Filter and Four-Phase Quadrature Oscillator

Authors: Jie Jin

Abstract:

In this paper, a new CMOS current-mode single input and multi-outputs (SIMO) universal filter and quadrature oscillator with a similar circuit are proposed. The circuits only consist of three Current differencing transconductance amplifiers (CDTA) and two grounded capacitors, which are resistorless, and they are suitable for monolithic integration. The universal filter uses minimum CDTAs and passive elements to realize SIMO type low-pass (LP), high-pass (HP), band-pass (BP) band-stop (BS) and all-pass (AP) filter functions simultaneously without any component matching conditions. The angular frequency (ω0) and the quality factor (Q) of the proposed filter can be electronically controlled and tuned orthogonal. By some modifications of the filter, a new current-mode four-phase quadrature oscillator (QO) can be obtained easily. The condition of oscillation (CO) and frequency of oscillation (FO) of the QO can be controlled electronically and independently through the bias current of the CDTAs, and it is suitable for variable frequency oscillator. Moreover, all the passive and active sensitivities of the circuits are low. SPICE simulation results are included to confirm the theory.

Keywords: Universal Filter, Quadrature Oscillator, Current mode, Current differencing transconductance amplifiers.

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86 FPGA Based Parallel Architecture for the Computation of Third-Order Cross Moments

Authors: Syed Manzoor Qasim, Shuja Abbasi, Saleh Alshebeili, Bandar Almashary, Ateeq Ahmad Khan

Abstract:

Higher-order Statistics (HOS), also known as cumulants, cross moments and their frequency domain counterparts, known as poly spectra have emerged as a powerful signal processing tool for the synthesis and analysis of signals and systems. Algorithms used for the computation of cross moments are computationally intensive and require high computational speed for real-time applications. For efficiency and high speed, it is often advantageous to realize computation intensive algorithms in hardware. A promising solution that combines high flexibility together with the speed of a traditional hardware is Field Programmable Gate Array (FPGA). In this paper, we present FPGA-based parallel architecture for the computation of third-order cross moments. The proposed design is coded in Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) and functionally verified by implementing it on Xilinx Spartan-3 XC3S2000FG900-4 FPGA. Implementation results are presented and it shows that the proposed design can operate at a maximum frequency of 86.618 MHz.

Keywords: Cross moments, Cumulants, FPGA, Hardware Implementation.

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85 Study of Tower Grounding Resistance Effected Back Flashover to 500 kV Transmission Line in Thailand by using ATP/EMTP

Authors: B. Marungsri, S. Boonpoke, A. Rawangpai, A. Oonsivilai, C. Kritayakornupong

Abstract:

This study describes analysis of tower grounding resistance effected the back flashover voltage across insulator string in a transmission system. This paper studies the 500 kV transmission lines from Mae Moh, Lampang to Nong Chok, Bangkok, Thailand, which is double circuit in the same steel tower with two overhead ground wires. The factor of this study includes magnitude of lightning stroke, and front time of lightning stroke. Steel tower uses multistory tower model. The assumption of studies based on the return stroke current ranged 1-200 kA, front time of lightning stroke between 1 μs to 3 μs. The simulations study the effect of varying tower grounding resistance that affect the lightning current. Simulation results are analyzed lightning over voltage that causes back flashover at insulator strings. This study helps to know causes of problems of back flashover the transmission line system, and also be as a guideline solving the problem for 500 kV transmission line systems, as well.

Keywords: Tower grounding resistance, back flashover, multistory tower model, lightning stroke current.

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84 Artificial Neural Network with Steepest Descent Backpropagation Training Algorithm for Modeling Inverse Kinematics of Manipulator

Authors: Thiang, Handry Khoswanto, Rendy Pangaldus

Abstract:

Inverse kinematics analysis plays an important role in developing a robot manipulator. But it is not too easy to derive the inverse kinematic equation of a robot manipulator especially robot manipulator which has numerous degree of freedom. This paper describes an application of Artificial Neural Network for modeling the inverse kinematics equation of a robot manipulator. In this case, the robot has three degree of freedoms and the robot was implemented for drilling a printed circuit board. The artificial neural network architecture used for modeling is a multilayer perceptron networks with steepest descent backpropagation training algorithm. The designed artificial neural network has 2 inputs, 2 outputs and varies in number of hidden layer. Experiments were done in variation of number of hidden layer and learning rate. Experimental results show that the best architecture of artificial neural network used for modeling inverse kinematics of is multilayer perceptron with 1 hidden layer and 38 neurons per hidden layer. This network resulted a RMSE value of 0.01474.

Keywords: Artificial neural network, back propagation, inverse kinematics, manipulator, robot.

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83 Analog Front End Low Noise Amplifier in 0.18-µm CMOS for Ultrasound Imaging Applications

Authors: Haridas Kuruveettil, Dongning Zhao, Cheong Jia Hao, Minkyu Je

Abstract:

We present the design of Analog front end (AFE) low noise pre-amplifier implemented in a high voltage 0.18-µm CMOS technology for  a three dimensional ultrasound  bio microscope (3D UBM) application. The fabricated chip has 4X16 pre-amplifiers implemented to interface   a 2-D array of    high frequency capacitive micro-machined ultrasound transducers (CMUT). Core AFE cell consists of a high-voltage pulser in the transmit path, and a low-noise transimpedance amplifier in the receive path. Proposed system offers a high image resolution by the use of high frequency CMUTs with associated high performance imaging electronics integrated together.  Performance requirements and the design methods of the high bandwidth transimpedance amplifier are described in the paper. A single cell of transimpedance (TIA) amplifier and the bias circuit occupies a silicon area of 250X380 µm2 and the full chip occupies a total silicon area of 10x6.8 mm².

Keywords: Ultrasound, analog front end, medical imaging, beam forming, biomicroscope, transimpedance gain.

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82 Closed Loop Control of Bridgeless Cuk Converter Using Fuzzy Logic Controller for PFC Applications

Authors: Nesapriya. P., S. Rajalaxmi

Abstract:

This paper is based on the bridgeless single-phase Ac–Dc Power Factor Correction (PFC) converters with Fuzzy Logic Controller. High frequency isolated Cuk converters are used as a modular dc-dc converter in Discontinuous Conduction Mode (DCM) of operation of Power Factor Correction. The aim of this paper is to simplify the program complexity of the controller by reducing the number of fuzzy sets of the Membership Functions (MFs) and to improve the efficiency and to eliminate the power quality problems. The output of Fuzzy controller is compared with High frequency triangular wave to generate PWM gating signals of Cuk converter. The proposed topologies are designed to work in Discontinuous Conduction Mode (DCM) to achieve a unity power factor and low total harmonic distortion of the input current. The Fuzzy Logic Controller gives additional advantages such as accurate result, uncertainty and imprecision and automatic control circuitry. Performance comparisons between the proposed and conventional controllers and circuits are performed based on circuit simulations.

Keywords: Fuzzy Logic Controller (FLC), Bridgeless rectifier, Cuk converter, Pulse Width Modulation (PWM), Power Factor Correction, Total Harmonic Distortion (THD).

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81 Energy Recovery Soft Switching Improved Efficiency Half Bridge Inverter for Electronic Ballast Applications

Authors: A. Yazdanpanah Goharrizi

Abstract:

An improved topology of a voltage-fed quasi-resonant soft switching LCrCdc series-parallel half bridge inverter with a constant-frequency for electronic ballast applications is proposed in this paper. This new topology introduces a low-cost solution to reduce switching losses and circuit rating to achieve high-efficiency ballast. Switching losses effect on ballast efficiency is discussed through experimental point of view. In this discussion, an improved topology in which accomplishes soft switching operation over a wide power regulation range is proposed. The proposed structure uses reverse recovery diode to provide better operation for the ballast system. A symmetrical pulse wide modulation (PWM) control scheme is implemented to regulate a wide range of out-put power. Simulation results are kindly verified with the experimental measurements obtained by ballast-lamp laboratory prototype. Different load conditions are provided in order to clarify the performance of the proposed converter.

Keywords: Electronic ballast, Pulse wide modulation (PWM) Reverse recovery diode, Soft switching.

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80 Fingers Exergames to Improve Fine Motor Skill in Autistic Children

Authors: Zulhisyam Salleh, Fizatul Aini Patakor, Rosilah Wahab, Awangku Khairul Ridzwan Awangku Jaya

Abstract:

Autism is a lifelong developmental disability that affects how people perceive the world and interact with others. Most of these children have difficulty with fine motor skills which typically struggle with handwriting and fine activities in their routine life such as getting dressed and controlled use of the everyday tool. Because fine motor activities encompass so many routine functions, a fine motor delay can have a measurable negative impact on a person's ability to handle daily practical tasks. This project proposed a simple fine motor exercise aid plus the game (exergame) for autistic children who discover from fine motor difficulties. The proposed exergame will be blinking randomly and user needs to bend their finger accordingly. It will notify the user, whether they bend the right finger or not. The system is realized using Arduino, which is programmed to control all the operated circuit. The feasibility studies with six autistic children were conducted and found the child interested in using exergame and could quickly get used to it. This study provides important guidance for future investigations of the exergame potential for accessing and improving fine motor skill among autistic children.

Keywords: Autism children, Arduino project, fine motor skill, finger exergame.

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79 Analyzing Current Transformers Saturation Characteristics for Different Connected Burden Using LabVIEW Data Acquisition Tool

Authors: D. Subedi, S. Pradhan

Abstract:

Current transformers are an integral part of power system because it provides a proportional safe amount of current for protection and measurement applications. However, when the power system experiences an abnormal situation leading to huge current flow, then this huge current is proportionally injected to the protection and metering circuit. Since the protection and metering equipment’s are designed to withstand only certain amount of current with respect to time, these high currents pose a risk to man and equipment. Therefore, during such instances, the CT saturation characteristics have a huge influence on the safety of both man and equipment and on the reliability of the protection and metering system. This paper shows the effect of burden on the Accuracy Limiting factor/ Instrument security factor of current transformers and the change in saturation characteristics of the CT’s. The response of the CT to varying levels of overcurrent at different connected burden will be captured using the data acquisition software LabVIEW. Analysis is done on the real time data gathered using LabVIEW. Variation of current transformer saturation characteristics with changes in burden will be discussed.

Keywords: Accuracy limiting factor, burden, current transformer, instrument security factor, saturation characteristics.

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78 Experimental Measurements of Mean and Turbulence Quantities behind the Circular Cylinder by Attaching Different Number of Tripping Wires

Authors: Amir Bak Khoshnevis, Mahdieh Khodadadi, Aghil Lotfi

Abstract:

For a bluff body, roughness elements in simulating a turbulent boundary layer, leading to delayed flow separation, a smaller wake, and lower form drag. In the present work, flow past a circular cylinder with using tripping wires is studied experimentally. The wind tunnel used for modeling free stream is open blow circuit (maximum speed = 30m/s and maximum turbulence of free stream = 0.1%). The selected Reynolds number for all tests was constant (Re = 25000). The circular cylinder selected for this experiment is 20 and 400mm in diameter and length, respectively. The aim of this research is to find the optimal operation mode. In this study installed some tripping wires 1mm in diameter, with a different number of wires on the circular cylinder and the wake characteristics of the circular cylinder is studied. Results showed that by increasing number of tripping wires attached to the circular cylinder (6, 8, and 10, respectively), The optimal angle for the tripping wires with 1mm in diameter to be installed on the cylinder is 60̊ (or 6 wires required at angle difference of 60̊). Strouhal number for the cylinder with tripping wires 1mm in diameter at angular position 60̊ showed the maximum value.

Keywords: Wake of a circular cylinder, trip wire, velocity defect, Strouhal number.

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77 A Novel Low Power, High Speed 14 Transistor CMOS Full Adder Cell with 50% Improvement in Threshold Loss Problem

Authors: T. Vigneswaran, B. Mukundhan, P. Subbarami Reddy

Abstract:

Full adders are important components in applications such as digital signal processors (DSP) architectures and microprocessors. In addition to its main task, which is adding two numbers, it participates in many other useful operations such as subtraction, multiplication, division,, address calculation,..etc. In most of these systems the adder lies in the critical path that determines the overall speed of the system. So enhancing the performance of the 1-bit full adder cell (the building block of the adder) is a significant goal.Demands for the low power VLSI have been pushing the development of aggressive design methodologies to reduce the power consumption drastically. To meet the growing demand, we propose a new low power adder cell by sacrificing the MOS Transistor count that reduces the serious threshold loss problem, considerably increases the speed and decreases the power when compared to the static energy recovery full (SERF) adder. So a new improved 14T CMOS l-bit full adder cell is presented in this paper. Results show 50% improvement in threshold loss problem, 45% improvement in speed and considerable power consumption over the SERF adder and other different types of adders with comparable performance.

Keywords: Arithmetic circuit, full adder, multiplier, low power, very Large-scale integration (VLSI).

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76 Low Jitter ADPLL based Clock Generator for High Speed SoC Applications

Authors: Moorthi S., Meganathan D., Janarthanan D., Praveen Kumar P., J. Raja paul perinbam

Abstract:

An efficient architecture for low jitter All Digital Phase Locked Loop (ADPLL) suitable for high speed SoC applications is presented in this paper. The ADPLL is designed using standard cells and described by Hardware Description Language (HDL). The ADPLL implemented in a 90 nm CMOS process can operate from 10 to 200 MHz and achieve worst case frequency acquisition in 14 reference clock cycles. The simulation result shows that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps at 100MHz. Since the digitally controlled oscillator (DCO) can achieve both high resolution and wide frequency range, it can meet the demands of system-level integration. The proposed ADPLL can easily be ported to different processes in a short time. Thus, it can reduce the design time and design complexity of the ADPLL, making it very suitable for System-on-Chip (SoC) applications.

Keywords: All Digital Phase Locked Loop (ADPLL), Systemon-Chip (SoC), Phase Locked Loop (PLL), Very High speedIntegrated Circuit (VHSIC) Hardware Description Language(VHDL), Digitally Controlled Oscillator (DCO), Phase frequencydetector (PFD) and Voltage Controlled Oscillator (VCO).

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75 Novel Intrinsic Conducting Polymer Current Limiting Device (CLD) for Surge Protection

Authors: Noor H Jabarullah

Abstract:

In the past many uneconomic solutions for limitation and interruption of short-circuit currents in low power applications have been introduced, especially polymer switch based on the positive temperature coefficient of resistance (PCTR) concept. However there are many limitations in the active material, which consists of conductive fillers. This paper presents a significantly improved and simplified approach that replaces the existing current limiters with faster switching elements. Its elegance lies in the remarkable simplicity and low-cost processes of producing the device using polyaniline (PANI) doped with methane-sulfonic acid (MSA). Samples characterized as lying in the metallic and critical regimes of metal insulator transition have been studied by means of electrical performance in the voltage range from 1V to 5 V under different environmental conditions. Moisture presence is shown to increase the resistivity and also improved its current limiting performance. Additionally, the device has also been studied for electrical resistivity in the temperature range 77 K-300 K. The temperature dependence of the electrical conductivity gives evidence for a transport mechanism based on variable range hopping in three dimensions.

Keywords: Conducting polymer, current limiter, intrinsic, moisture dependence, polyaniline, resettable, surge protection.

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74 Effect of Leaks in Solid Oxide Electrolysis Cells Tested for Durability under Co-Electrolysis Conditions

Authors: Megha Rao, Søren H. Jensen, Xiufu Sun, Anke Hagen, Mogens B. Mogensen

Abstract:

Solid oxide electrolysis cells have an immense potential in converting CO2 and H2O into syngas during co-electrolysis operation. The produced syngas can be further converted into hydrocarbons. This kind of technology is called power-to-gas or power-to-liquid. To produce hydrocarbons via this route, durability of the cells is still a challenge, which needs to be further investigated in order to improve the cells. In this work, various nickel-yttria stabilized zirconia (Ni-YSZ) fuel electrode supported or YSZ electrolyte supported cells, cerium gadolinium oxide (CGO) barrier layer, and an oxygen electrode are investigated for durability under co-electrolysis conditions in both galvanostatic and potentiostatic conditions. While changing the gas on the oxygen electrode, keeping the fuel electrode gas composition constant, a change in the gas concentration arc was observed by impedance spectroscopy. Measurements of open circuit potential revealed the presence of leaks in the setup. It is speculated that the change in concentration impedance may be related to the leaks. Furthermore, the cells were also tested under pressurized conditions to find an inter-play between the leak rate and the pressure. A mathematical modeling together with electrochemical and microscopy analysis is presented.

Keywords: Co-electrolysis, solid oxide electrolysis cells, leaks, durability, gas concentration.

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73 Bipolar Square Wave Pulses for Liquid Food Sterilization using Cascaded H-Bridge Multilevel Inverter

Authors: Hanifah Jambari, Naziha A. Azli, M. Afendi M. Piah

Abstract:

This paper presents the generation of bipolar square wave pulses with characteristics that are suitable for liquid food sterilization using a Cascaded H-bridge Multilevel Inverter (CHMI). Bipolar square waves pulses have been reported as stable for a longer time during the sterilization process with minimum heat emission and increased efficiency. The CHMI allows the system to produce bipolar square wave pulses and yielding high output voltage without using a transformer while fulfilling the pulse requirements for effective liquid food sterilization. This in turn can reduce power consumption and cost of the overall liquid food sterilization system. The simulation results have shown that pulses with peak output voltage of 2.4 kV, pulse width of between 1 2s and 1 ms at frequencies of 50 Hz and 100 Hz can be generated by a 7-level CHMI. Results from the experimental set-up based on a 5-level CHMI has indicated the potential of the proposed circuit in producing bipolar square wave output pulses with peak values that depends on the DC source level supplied to the CHMI modules, pulse width of between 12.5 2s and 1 ms at frequencies of 50 Hz and 100 Hz.

Keywords: pulsed electric field, multilevel inverter, bipolarsquare wave, food sterilization

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72 Transient Enhanced LDO Voltage Regulator with Improved Feed Forward Path Compensation

Authors: Suresh Alapati, Sreehari Rao Patri, K. S. R. Krishna Prasad

Abstract:

Anultra-low power capacitor less low-dropout voltage regulator with improved transient response using gain enhanced feed forward path compensation is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor stage in the feed forward path with regular error amplifier to form a composite gainenhanced feed forward stage. It broadens the gain bandwidth and thus improves the transient response without substantial increase in power consumption. The proposed LDO, designed for a maximum output current of 100 mA in UMC 180 nm, requires a quiescent current of 69 )A. An undershot of 153.79mV for a load current changes from 0mA to 100mA and an overshoot of 196.24mV for current change of 100mA to 0mA. The settling time is approximately 1.1 )s for the output voltage undershooting case. The load regulation is of 2.77 )V/mA at load current of 100mA. Reference voltage is generated by using an accurate band gap reference circuit of 0.8V.The costly features of SOC such as total chip area and power consumption is drastically reduced by the use of only a total compensation capacitance of 6pF while consuming power consumption of 0.096 mW.

Keywords: Capacitor-less LDO, frequency compensation, Transient response, latch, self-biased differential amplifier.

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71 Aerodynamic Design of Three-Dimensional Bellmouth for Low-Speed Open-Circuit Wind Tunnel

Authors: Harshavardhan Reddy, Balaji Subramanian

Abstract:

A systematic parametric study to find the optimum Bellmouth profile by relating geometric and performance parameters to satisfy a set of specifications is reported. A careful aerodynamic design of Bellmouth intake is critical to properly direct the flow with minimal losses and maximal flow uniformity into the honeycomb located inside the settling chamber of an indraft wind tunnel, thus improving the efficiency of the entire unit. Design charts for elliptically profiled Bellmouth's with two different contraction ratios (9 and 18) and three different test section speeds (25 m/s, 50 m/s, and 75 m/s) were presented. A significant performance improvement - especially in the coefficient of discharge and in the flow angularity and boundary layer thickness at the honeycomb inlet - was observed when an entry corner radius (r/D = 0.08) was added to the Bellmouth profile. The nonuniformity at the honeycomb inlet drops by about three times (~1% to 0.3%) when moving from square to regular octagonal cross-section. An octagonal cross-sectioned Bellmouth intake with L/d = 0.55, D/d = 1.625, and r/D = 0.08 met all the four target performance specifications and is proposed as the best choice for a low-speed wind tunnel.

Keywords: Bellmouth intake, low-speed wind tunnel, coefficient of discharge, nonuniformity, flow angularity, boundary layer thickness, CFD, aerodynamics.

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70 An Efficient Technique for EMI Mitigation in Fluorescent Lamps using Frequency Modulation and Evolutionary Programming

Authors: V.Sekar, T.G.Palanivelu, B.Revathi

Abstract:

Electromagnetic interference (EMI) is one of the serious problems in most electrical and electronic appliances including fluorescent lamps. The electronic ballast used to regulate the power flow through the lamp is the major cause for EMI. The interference is because of the high frequency switching operation of the ballast. Formerly, some EMI mitigation techniques were in practice, but they were not satisfactory because of the hardware complexity in the circuit design, increased parasitic components and power consumption and so on. The majority of the researchers have their spotlight only on EMI mitigation without considering the other constraints such as cost, effective operation of the equipment etc. In this paper, we propose a technique for EMI mitigation in fluorescent lamps by integrating Frequency Modulation and Evolutionary Programming. By the Frequency Modulation technique, the switching at a single central frequency is extended to a range of frequencies, and so, the power is distributed throughout the range of frequencies leading to EMI mitigation. But in order to meet the operating frequency of the ballast and the operating power of the fluorescent lamps, an optimal modulation index is necessary for Frequency Modulation. The optimal modulation index is determined using Evolutionary Programming. Thereby, the proposed technique mitigates the EMI to a satisfactory level without disturbing the operation of the fluorescent lamp.

Keywords: Ballast, Electromagnetic interference (EMI), EMImitigation, Evolutionary programming (EP), Fluorescent lamp, Frequency Modulation (FM), Modulation index.

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