Search results for: High Voltage

Authors: Satish Kumar Peddapelli

Abstract:

This paper presents advances in pulse width modulation techniques which refers to a method of carrying information on train of pulses and the information be encoded in the width of pulses. Pulse Width Modulation is used to control the inverter output voltage. This is done by exercising the control within the inverter itself by adjusting the ON and OFF periods of inverter. By fixing the DC input voltage we get AC output voltage. In variable speed AC motors the AC output voltage from a constant DC voltage is obtained by using inverter. Recent developments in power electronics and semiconductor technology have lead improvements in power electronic systems. Hence, different circuit configurations namely multilevel inverters have became popular and considerable interest by researcher are given on them. A fast space-vector pulse width modulation (SVPWM) method for five-level inverter is also discussed. In this method, the space vector diagram of the five-level inverter is decomposed into six space vector diagrams of three-level inverters. In turn, each of these six space vector diagrams of three-level inverter is decomposed into six space vector diagrams of two-level inverters. After decomposition, all the remaining necessary procedures for the three-level SVPWM are done like conventional two-level inverter. The proposed method reduces the algorithm complexity and the execution time. It can be applied to the multilevel inverters above the five-level also. The experimental setup for three-level diode-clamped inverter is developed using TMS320LF2407 DSP controller and the experimental results are analyzed.

Keywords: Five-level inverter, Space vector pulse wide modulation, diode clamped inverter.

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Authors: Rohana Musa, Yuzman Yusoff, Chia Chieu Yin, Hanif Che Lah

Abstract:

This paper presents the design and characterization of a low power Complementary Metal Oxide Semiconductor (CMOS) process sensor. The design is targeted for implementation using Silterra’s 180 nm CMOS process technology. The proposed process sensor employs a voltage threshold (V_th) extractor architecture for detection of variations in the fabrication process. The process sensor generates output voltages in the range of 401 mV (fast-fast corner) to 443 mV (slow-slow corner) at nominal condition. The power dissipation for this process sensor is 6.3 µW with a supply voltage of 1.8V with a silicon area of 190 µm X 60 µm. The preliminary result of this process sensor that was fabricated indicates a close resemblance between test and simulated results.

Keywords: CMOS Process sensor, Process, Voltage and Temperature (PVT) sensor, threshold extractor circuit, Vth extractor circuit.

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Authors: P. Suryakumari, P. Kantarao

Abstract:

Optimal Power Flow (OPF) problem in electrical power system is considered as a static, non-linear, multi-objective or a single objective optimization problem. This paper presents an algorithm for solving the voltage stability objective reactive power dispatch problem in a power system .The proposed approach employs cat swarm optimization algorithm for optimal settings of RPD control variables. Generator terminal voltages, reactive power generation of the capacitor banks and tap changing transformer setting are taken as the optimization variables. CSO algorithm is tested on standard IEEE 30 bus system and the results are compared with other methods to prove the effectiveness of the new algorithm. As a result, the proposed method is the best for solving optimal reactive power dispatch problem.

Keywords: RPD problem, voltage stability enhancement, CSO algorithm.

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Authors: S. M. Giripunje, Shikha Jindal

Abstract:

Zinc sulphide (ZnS) quantum dots (QDs) were synthesized successfully via simple sonochemical method. X-ray diffraction (XRD), scanning electron microscopy (SEM) and high resolution transmission electron microscopy (HRTEM) analysis revealed the average size of QDs of the order of 3.7 nm. The band gap of the QDs was tuned to 5.2 eV by optimizing the synthesis parameters. UV-Vis absorption spectra of ZnS QD confirm the quantum confinement effect. Fourier transform infrared (FTIR) analysis confirmed the formation of single phase ZnS QDs. To fabricate the diode, blend of ZnS QDs and P3HT was prepared and the heterojunction of PEDOT:PSS and the blend was formed by spin coating on indium tin oxide (ITO) coated glass substrate. The diode behaviour of the heterojunction was analysed, wherein the ideality factor was found to be 2.53 with turn on voltage 0.75 V and the barrier height was found to be 1.429 eV. ZnS-Graphene QDs nanocomposite was characterised for the surface morphological study. It was found that the synthesized ZnS QDs appear as quasi spherical particles on the graphene sheets. The average particle size of ZnS-graphene nanocomposite QDs was found to be 8.4 nm. From voltage-current characteristics of ZnS-graphene nanocomposites, it is observed that the conductivity of the composite increases by 10⁴ times the conductivity of ZnS QDs. Thus the addition of graphene QDs in ZnS QDs enhances the mobility of the charge carriers in the composite material. Thus, the graphene QDs, with high specific area for a large interface, high mobility and tunable band gap, show a great potential as an electron-acceptors in photovoltaic devices.

Keywords: Graphene, mobility, nanocomposites, photovoltaics, quantum dots, zinc sulphide.

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Authors: Toshiaki Yanada, Kazumi Ishikawa

Abstract:

The present paper deals with the analysis and development of noise-reduction transformer that has a filter function for conductive noise transmission. Two types of prototype noise-reduction transformers with two different output voltages are proposed. To determine an optimum design for the noise-reduction transformer, noise attenuation characteristics are discussed based on the experiments and the equivalent circuit analysis. The analysis gives a relation between the circuit parameters and the noise attenuation. High performance step-down noise-reduction transformer for direct power supply to electronics equipment is developed. The input voltage of the transformer is 100 V and the output voltage is 5 V. Frequency characteristics of noise attenuation are discussed, and prevention of pulse noise transmission is demonstrated. Normal mode noise attenuation of this transformer is –80 dB, and common mode exceeds –90 dB. The step-down noise-reduction transformer eliminates pulse noise efficiently.

Keywords: conductive noise, EMC, EMI, noise attenuation, transformer.

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Authors: R. Srinivasa Rao

Abstract:

Individually Network reconfiguration or Capacitor control perform well in minimizing power loss and improving voltage profile of the distribution system. But for heavy reactive power loads network reconfiguration and for heavy active power loads capacitor placement can not effectively reduce power loss and enhance voltage profiles in the system. In this paper, an hybrid approach that combine network reconfiguration and capacitor placement using Harmony Search Algorithm (HSA) is proposed to minimize power loss reduction and improve voltage profile. The proposed approach is tested on standard IEEE 33 and 16 bus systems. Computational results show that the proposed hybrid approach can minimize losses more efficiently than Network reconfiguration or Capacitor control. The results of proposed method are also compared with results obtained by Simulated Annealing (SA). The proposed method has outperformed in terms of the quality of solution compared to SA.

Keywords: Capacitor Control, Network Reconfiguration, HarmonySearch Algorithm, Loss Reduction, Voltage Profile.

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Authors: S. Abdollahi Pour, M. Saneei

Abstract:

This paper propose a new circuit design which monitor total leakage current during standby mode and generates the optimal reverse body bias voltage, by using the adaptive body bias (ABB) technique to compensate die-to-die parameter variations. Design details of power monitor are examined using simulation framework in 65nm and 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 10 μW for 32nm technology and about 12 μW for 65nm technology at the same power supply voltage as the core power supply. Moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop.

Keywords: leakage current, leakage power monitor, body biasing, low power

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Authors: A. Maamoun, Y. M. Alsayed, A. Shaltout

Abstract:

The paper presents a space-vector pulse width modulation (SVPWM) inverter feeding a permanent-magnet synchronous motor (PMSM). The SVPWM inverter enables to feed the motor with a higher voltage with low harmonic distortions than the conventional sinusoidal PWM inverter. The control strategy of the inverter is the voltage / frequency control method, which is based on the space-vector modulation technique. The proposed PMSM drive system involving the field-oriented control scheme not only decouples the torque and flux which provides faster response but also makes the control task easy. The performance of the proposed drive is simulated. The advantages of the proposed drive are confirmed by the simulation results.

Keywords: permanent-magnet synchronous motor, space-vectorPWM inverter, voltage/frequency control.

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Authors: Rajesh Kumar, Puneet Aggarwal

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In context of understanding problems faced by undergraduate students while carrying out laboratory experiments dealing with high voltages, it was found that most of the students are hesitant to work directly on machine. The reason is that error in the circuitry might lead to deterioration of machine and laboratory instruments. So, it has become inevitable to include modern pedagogic techniques for undergraduate students, which would help them to first carry out experiment in virtual system and then to work on live circuit. Further advantages include that students can try out their intuitive ideas and perform in virtual environment, hence leading to new research and innovations. In this paper, virtual environment used is of MATLAB/Simulink for three-phase induction machines. The performance analysis of three-phase induction machine is carried out using virtual environment which includes Direct Current (DC) Test, No-Load Test, and Block Rotor Test along with speed torque characteristics for different rotor resistances and input voltage, respectively. Further, this paper carries out computer aided teaching of basic Voltage Source Inverter (VSI) drive circuitry. Hence, this paper gave undergraduates a clearer view of experiments performed on virtual machine (No-Load test, Block Rotor test and DC test, respectively). After successful implementation of basic tests, VSI circuitry is implemented, and related harmonic distortion (THD) and Fast Fourier Transform (FFT) of current and voltage waveform are studied.

Keywords: Block rotor test, DC test, no-load test, virtual environment, VSI.

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Authors: Ekow A. Kwofie, Emmanuel K. Anto, Godfred Mensah

Abstract:

In this paper, CYME Distribution software has been used to assess the impacts of solar Photovoltaic (PV) distributed generation (DG) plant on the Electricity Company of Ghana (ECG) 33 kV sub-transmission network at different PV penetration levels. As ECG begins to encourage DG PV interconnections within its network, there has been the need to assess the impacts on the sub-transmission losses and voltage contribution. In Tema, a city in Accra - Ghana, ECG has a 33 kV sub-transmission network made up of 20 No. 33 kV buses that was modeled. Three different locations were chosen: The source bus, a bus along the sub-transmission radial network and a bus at the tail end to determine the optimal location for DG PV interconnection. The optimal location was determined based on sub-transmission technical losses and voltage impact. PV capacities at different penetration levels were modeled at each location and simulations performed to determine the optimal PV penetration level. Interconnection at a bus along (or in the middle of) the sub-transmission network offered the highest benefits at an optimal PV penetration level of 80%. At that location, the maximum voltage improvement of 0.789% on the neighboring 33 kV buses and maximum loss reduction of 6.033% over the base case scenario were recorded. Hence, the optimal location for DG PV integration within the 33 kV sub-transmission utility network is at a bus along the sub-transmission radial network.

Keywords: Distributed generation photovoltaic, DG PV, optimal location, penetration level, sub-transmission network.

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Authors: Hanny H. Tumbelaka, Masafumi Miyatake

Abstract:

This paper proposes a three-phase four-wire currentcontrolled Voltage Source Inverter (CC-VSI) for both power quality improvement and PV energy extraction. For power quality improvement, the CC-VSI works as a grid current-controlling shunt active power filter to compensate for harmonic and reactive power of loads. Then, the PV array is coupled to the DC bus of the CC-VSI and supplies active power to the grid. The MPPT controller employs the particle swarm optimization technique. The output of the MPPT controller is a DC voltage that determines the DC-bus voltage according to PV maximum power. The PSO method is simple and effective especially for a partially shaded PV array. From computer simulation results, it proves that grid currents are sinusoidal and inphase with grid voltages, while the PV maximum active power is delivered to loads.

Keywords: Active Power Filter, MPPT, PV Energy Conversion.

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Authors: Asfar Ali Khan

Abstract:

Analytical expression for maximum power transfer through a transmission line limited by voltage stability has been formulated using exact representation of transmission line with ABCD parameters. The expression has been used for plotting PV curve at different power factors of a radial transmission line. Limiting values of reactive power have been obtained.

Keywords: Power Transfer, PV Curve, Voltage Stability.

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Authors: Dana M. Ragab, Jasim A Ghaeb

Abstract:

The Voltage Unbalance Factor (VUF) index is recommended to evaluate system performance under unbalanced operation. However, its calculation requires complex algebra which limits its use in the field. Furthermore, one system cycle is required at least to detect unbalance using the VUF. Ideally unbalance mitigation must be performed within 10 ms for 50 Hz systems. In this work, a linear relation for VUF evaluation in three-phase electrical power system using space vector (SV) is derived. It is proposed to determine the voltage unbalance quickly and accurately and to overcome the constraints associated with the traditional methods of VUF evaluation. Aqaba-Qatrana-South Amman (AQSA) power system is considered to study the system performance under unbalanced conditions. The results show that both the complexity of calculations and the time required to evaluate VUF are reduced significantly.

Keywords: Power quality, space vector, unbalance evaluation.

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Authors: Kang Chia Yang, Hushairi HJ Zen, Nur Ikhmar@Najemeen Binti Ayob

Abstract:

Power quality is used to describe the degree of consistency of electrical energy expected from generation source to point of use. The term power quality refers to a wide variety of electromagnetic phenomena that characterize the voltage and current at a given time and at a given location on the power system. Power quality problems can be defined as problem that results in failure of customer equipments, which manifests itself as an economic burden to users, or produces negative impacts on the environment. Voltage stability, power factor, harmonics pollution, reactive power and load unbalance are some of the factors that affect the consistency or the quality level. This research proposal proposes to investigate and analyze the causes and effects of power quality to homes and industries in Sarawak. The increasing application of electronics equipment used in the industries and homes has caused a big impact on the power quality. Many electrical devices are now interconnected to the power network and it can be observed that if the power quality of the network is good, then any loads connected to it will run smoothly and efficiently. On the other hand, if the power quality of the network is bad, then loads connected to it will fail or may cause damage to the equipments and reduced its lifetime. The outcome of this research will enable better and novel solutions of poor power quality to small industries and reduce damage of electrical devices and products in the industries.

Keywords: Power quality, power network, voltage dip.

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Authors: Akim Borbuev, Francisco de León

Abstract:

Economic and population growth in densely-populated urban areas introduce major challenges to distribution system operators, planers, and designers. To supply added loads, utilities are frequently forced to invest in new distribution feeders. However, this is becoming increasingly more challenging due to space limitations and rising installation costs in urban settings. This paper proposes the conversion of critical alternating current (ac) distribution feeders into direct current (dc) feeders to increase the power transfer capacity by a factor as high as four. Current trends suggest that the return of dc transmission, distribution, and utilization are inevitable. Since a total system-level transformation to dc operation is not possible in a short period of time due to the needed huge investments and utility unreadiness, this paper recommends that feeders that are expected to exceed their limits in near future are converted to dc. The increase in power transfer capacity is achieved through several key differences between ac and dc power transmission systems. First, it is shown that underground cables can be operated at higher dc voltage than the ac voltage for the same dielectric stress in the insulation. Second, cable sheath losses, due to induced voltages yielding circulation currents, that can be as high as phase conductor losses under ac operation, are not present under dc. Finally, skin and proximity effects in conductors and sheaths do not exist in dc cables. The paper demonstrates that in addition to the increased power transfer capacity utilities substituting ac feeders by dc feeders could benefit from significant lower costs and reduced losses. Installing dc feeders is less expensive than installing new ac feeders even when new trenches are not needed. Case studies using the IEEE 342-Node Low Voltage Networked Test System quantify the technical and economic benefits of dc feeders.

Keywords: Dc power systems, distribution feeders, distribution networks, energy efficiency, power transfer capacity.

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Authors: G. R. Arab Markadeh, J. Soltani, N. R. Abjadi, M. Hajian

Abstract:

In this paper, a direct torque control - space vector modulation (DTC-SVM) scheme is presented for a six-phase speed and voltage sensorless induction motor (IM) drive. The decoupled torque and stator flux control is achieved based on IM stator flux field orientation. The rotor speed is detected by on-line estimating of the rotor angular slip speed and stator vector flux speed. In addition, a simple method is introduced to estimate the stator resistance. Moreover in this control scheme the voltage sensors are eliminated and actual motor phase voltages are approximated by using PWM inverter switching times and the dc link voltage. Finally, some simulation and experimental results are presented to verify the effectiveness and capability of the proposed control scheme.

Keywords: Stator FOC, Multiphase motors, sensorless.

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Authors: Z. Ezzouine, A. Nakheli

Abstract:

This paper presents a high position electromagnetic sensor system (HPESS) that is applicable for moving object detection. The authors have developed a high-performance position sensor prototype dedicated to students’ laboratory. The challenge was to obtain a highly accurate and real-time sensor that is able to calculate position, length or displacement. An electromagnetic solution based on a two coil induction principal was adopted. The HPESS converts mechanical motion to electric energy with direct contact. The output signal can then be fed to an electronic circuit. The voltage output change from the sensor is captured by data acquisition system using LabVIEW software. The displacement of the moving object is determined. The measured data are transmitted to a PC in real-time via a DAQ (NI USB -6281). This paper also describes the data acquisition analysis and the conditioning card developed specially for sensor signal monitoring. The data is then recorded and viewed using a user interface written using National Instrument LabVIEW software. On-line displays of time and voltage of the sensor signal provide a user-friendly data acquisition interface. The sensor provides an uncomplicated, accurate, reliable, inexpensive transducer for highly sophisticated control systems.

Keywords: Electromagnetic sensor, data acquisition, accurately, position measurement.

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Authors: Z. Feng, V. Viswanathan, D. Navarro, I. O'Connor

Abstract:

This paper presents a new high speed simulation methodology to solve the long simulation time problem of CMOS image sensor matrix. Generally, for integrating the pixel matrix in SOC and simulating the system performance, designers try to model the pixel in various modeling languages such as VHDL-AMS, SystemC or Matlab. We introduce a new alternative method based on spice model in cadence design platform to achieve accuracy and reduce simulation time. The simulation results indicate that the pixel output voltage maximum error is at 0.7812% and time consumption reduces from 2.2 days to 13 minutes achieving about 240X speed-up for the 256x256 pixel matrix.

Keywords: CMOS image sensor, high speed simulation, image sensor matrix simulation.

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Authors: P.K. Sharma, B. Bhargava, S. Akashe

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Power dissipation due to leakage current in the digital circuits is a biggest factor which is considered specially while designing nanoscale circuits. This paper is exploring the ideas of reducing leakage current in static CMOS circuits by stacking the transistors in increasing numbers. Clearly it means that the stacking of OFF transistors in large numbers result a significant reduction in power dissipation. Increase in source voltage of NMOS transistor minimizes the leakage current. Thus stacking technique makes circuit with minimum power dissipation losses due to leakage current. Also some of digital circuits such as full adder, D flip flop and 6T SRAM have been simulated in this paper, with the application of reduction technique on ‘cadence virtuoso tool’ using specter at 45nm technology with supply voltage 0.7V.

Keywords: Stack, 6T SRAM cell, low power, threshold voltage

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Authors: W. J. Stępniowski, W. Florkiewicz, M. Norek, M. Michalska-Domańska, E. Kościuczyk, T. Czujko

Abstract:

In this paper, two options of anodic alumina barrier layer thinning have been demonstrated. The approaches varied with the duration of the voltage step. It was found that too long step of the barrier layer thinning process leads to chemical etching of the nanopores on their top. At the bottoms pores are not fully opened what is disadvantageous for further applications in nanofabrication. On the other hand, while the duration of the voltage step is controlled by the current density (value of the current density cannot exceed 75% of the value recorded during previous voltage step) the pores are fully opened. However, pores at the bottom obtained with this procedure have smaller diameter, nevertheless this procedure provides electric contact between the bare aluminum (substrate) and electrolyte, what is suitable for template assisted electrodeposition, one of the most cost-efficient synthesis method in nanotechnology.

Keywords: Anodic aluminum oxide, anodization, barrier layer thinning, nanopores.

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Authors: Hassan Jassim Motlak

Abstract:

A novel design technique employing CMOS Current Feedback Operational Amplifier (CFOA) is presented. The feature of consumption very low power in designing pseudo-OTA is used to decreasing the total power consumption of the proposed CFOA. This design approach applies pseudo-OTA as input stage cascaded with buffer stage. Moreover, the DC input offset voltage and harmonic distortion (HD) of the proposed CFOA are very low values compared with the conventional CMOS CFOA due to the symmetrical input stage. P-Spice simulation results are obtained using 0.18μm MIETEC CMOS process parameters and supply voltage of ±1.2V, 50μA biasing current. The p-spice simulation shows excellent improvement of the proposed CFOA over existing CMOS CFOA. Some of these performance parameters, for example, are DC gain of 62. dB, openloop gain bandwidth product of 108 MHz, slew rate (SR+) of +71.2V/μS, THD of -63dB and DC consumption power (PC) of 2mW.

Keywords: Pseudo-OTA used CMOS CFOA, low power CFOA, high-performance CFOA, novel CFOA.

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Authors: M. Sadeghi, A.H. Jafari, S.M.P. Firoozabadi

Abstract:

Deep Brain Stimulation or DBS is the second solution for Parkinson's Disease. Its three parameters are: frequency, pulse width and voltage. They must be optimized to achieve successful treatment. Nowadays it is done clinically by neurologists and there is not certain numerical method to detect them. The aim of this research is to introduce simulation and modeling of Parkinson's Disease treatment as a computational procedure to select optimum voltage. We recorded finger tremor signals of some Parkinsonian patients under DBS treatment at constant frequency and pulse width but variable voltages; then, we adapted a new model to fit these data. The optimum voltages obtained by data fitting results were the same as neurologists- commented voltages, which means modeling can be used as an engineering method to select optimum stimulation voltages.

Keywords: modeling, Deep Brain Stimulation, Parkinson'sdisease, tremor.

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Authors: M. S. Sivagamasundari, P. Melba Mary

Abstract:

Multilevel inverter is a promising inverter topology for high voltage and high power applications. This inverter synthesizes several different levels of DC voltages to produce a stepped AC output that approaches the pure sine waveform. The three different topologies, diode-clamped inverter, capacitor-clamped inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each PV array can act as a separate dc source for each h-bridge module. This research especially focus on photovoltaic power source as input to the system and shows the potential of a Single Phase Cascaded H-bridge Eleven level inverter governed by the fuzzy logic controller to improve the power quality by reducing the total harmonic distortion at the output voltage. Hence the efficiency of the system will be improved. Simulation using MATLAB/SIMULINK has been done to verify the performance of cascaded h-bridge eleven level inverter using sinusoidal pulse width modulation technique. The simulated output shows very favorable result.

Keywords: Multilevel inverter, Cascaded H-Bridge multilevel inverter, Total Harmonic Distortion, Photovoltaic cell, Sinusoidal pulse width modulation.

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Authors: Ali M. Eltamaly, A. I. Alolah, R. Hamouda, M. Y. Abdulghany

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In this paper a novel, simple and reliable digital firing scheme has been implemented for speed control of three-phase induction motor using ac voltage controller. The system consists of three-phase supply connected to the three-phase induction motor via three triacs and its control circuit. The ac voltage controller has three modes of operation depending on the shape of supply current. The performance of the induction motor differs in each mode where the speed is directly proportional with firing angle in two modes and inversely in the third one. So, the control system has to detect the current mode of operation to choose the correct firing angle of triacs. Three sensors are used to feed the line currents to control system to detect the mode of operation. The control strategy is implemented using a low cost Xilinx Spartan-3E field programmable gate array (FPGA) device. Three PI-controllers are designed on FPGA to control the system in the three-modes. Simulation of the system is carried out using PSIM computer program. The simulation results show stable operation for different loading conditions especially in mode 2/3. The simulation results have been compared with the experimental results from laboratory prototype.

Keywords: FPGA, Induction motor, PSIM, triac, Voltage controller.

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Authors: Ivelina N. Cholakova, Tihomir B. Takov, Radostin Ts. Tsankov, Nicolas Simonne, Slavka S. Tzanova

Abstract:

Adjacent Hall microsensors, comprising a silicon substrate and four contacts, providing simultaneously two supply inputs and two differential outputs, are characterized. The voltage related sensitivity is in the order of 0.11T-1, and a cancellation method for offset compensation is used, achieving residual offset in the micro scale which is also compared to a single Hall plate.

Keywords: Adjacent Hall sensors, offset compensation, voltage related sensitivity, 0.18μm CMOS technology.

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Authors: Tianchai Suksri, Satean Tunyasrirut

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This paper presents design and implements the T-DOF PI controller design for a speed control of induction motor. The voltage source inverter type space vector pulse width modulation technique is used the drive system. This scheme leads to be able to adjust the speed of the motor by control the frequency and amplitude of the input voltage. The ratio of input stator voltage to frequency should be kept constant. The T-DOF PI controller design by root locus technique is also introduced to the system for regulates and tracking speed response. The experimental results in testing the 120 watt induction motor from no-load condition to rated condition show the effectiveness of the proposed control scheme.

Keywords: PI controller, root locus technique, space vector pulse width modulation, induction motor.

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Authors: Satean Tunyasrirut, Tianchai Suksri, Sompong Srilad

Abstract:

This paper presents design and implements a voltage source inverter type space vector pulse width modulation (SVPWM) for control a speed of induction motor. This scheme leads to be able to adjust the speed of the motor by control the frequency and amplitude of the stator voltage, the ratio of stator voltage to frequency should be kept constant. The fuzzy logic controller is also introduced to the system for keeping the motor speed to be constant when the load varies. The experimental results in testing the 0.22 kW induction motor from no-load condition to rated condition show the effectiveness of the proposed control scheme.

Keywords: Fuzzy logic control, space vector pulse width modulation, induction motor.

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Authors: Yeon-kug Moon, Kang-Yoon Lee, Yun-Jae Won, Seung-Ok Lim

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This paper describes a low-voltage and low-power channel selection analog front end with continuous-time low pass filters and highly linear programmable gain amplifier (PGA). The filters were realized as balanced Gm-C biquadratic filters to achieve a low current consumption. High linearity and a constant wide bandwidth are achieved by using a new transconductance (Gm) cell. The PGA has a voltage gain varying from 0 to 65dB, while maintaining a constant bandwidth. A filter tuning circuit that requires an accurate time base but no external components is presented. With a 1-Vrms differential input and output, the filter achieves -85dB THD and a 78dB signal-to-noise ratio. Both the filter and PGA were implemented in a 0.18um 1P6M n-well CMOS process. They consume 3.2mW from a 1.8V power supply and occupy an area of 0.19mm2.

Keywords: component ; Channel selection filters, DC offset, programmable gain amplifier, tuning circuit

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Authors: M. Oloomi-Buygi, M. Reza Salehizadeh

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In this paper a new approach for transmission pricing is presented. The main idea is voltage angle allocation, i.e. determining the contribution of each contract on the voltage angle of each bus. DC power flow is used to compute a primary solution for angle decomposition. To consider the impacts of system non-linearity on angle decomposition, the primary solution is corrected in different iterations of decoupled Newton-Raphson power flow. Then, the contribution of each contract on power flow of each transmission line is computed based on angle decomposition. Contract-related flows are used as a measure for “extent of use" of transmission network capacity and consequently transmission pricing. The presented approach is applied to a 4-bus test system and IEEE 30-bus test system.

Keywords: Deregulation, Power electric markets, Transmission pricing methodologies, decoupled Newton-Raphson power flow.

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Authors: Wei Zha, Jingzeng Zhang, Chen Zhao, Ran Cai, Xueyuan Nie

Abstract:

Cathodic plasma electrolysis (CPE) is used to create surface textures on cast iron samples for improving the tribological properties. Micro craters with confined size distribution were successfully formed by CPE process. These craters can generate extra hydrodynamic pressure that separates two sliding surfaces, increase the oil film thickness and accelerate the transition from boundary to mixed lubrication. It was found that the optimal crater size was 1.7 μm, at which the maximum lubrication efficiency was achieved. The Taguchi method was used to optimize the process parameters (voltage and roughness) for CPE surface texturing. The orthogonal array and the signal-to-noise ratio were employed to study the effect of each process parameter on the coefficient of friction. The results showed that with higher voltage and lower roughness, the lower friction coefficient can be obtained, and thus the lubrication can be more efficiently used for friction reduction.

Keywords: Cathodic plasma electrolysis, friction, lubrication, plasma surface texturing.

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