Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 3

Search results for: A. Maamoun

3 Space-Vector PWM Inverter Feeding a Permanent-Magnet Synchronous Motor

Authors: A. Maamoun, Y. M. Alsayed, A. Shaltout

Abstract:

The paper presents a space-vector pulse width modulation (SVPWM) inverter feeding a permanent-magnet synchronous motor (PMSM). The SVPWM inverter enables to feed the motor with a higher voltage with low harmonic distortions than the conventional sinusoidal PWM inverter. The control strategy of the inverter is the voltage / frequency control method, which is based on the space-vector modulation technique. The proposed PMSM drive system involving the field-oriented control scheme not only decouples the torque and flux which provides faster response but also makes the control task easy. The performance of the proposed drive is simulated. The advantages of the proposed drive are confirmed by the simulation results.

Keywords: permanent-magnet synchronous motor, space-vectorPWM inverter, voltage/frequency control.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 6515
2 An Efficient Hardware Implementation of Extended and Fast Physical Addressing in Microprocessor-Based Systems Using Programmable Logic

Authors: Mountassar Maamoun, Abdelhamid Meraghni, Abdelhalim Benbelkacem, Daoud Berkani

Abstract:

This paper describes an efficient hardware implementation of a new technique for interfacing the data exchange between the microprocessor-based systems and the external devices. This technique, based on the use of software/hardware system and a reduced physical address, enlarges the interfacing capacity of the microprocessor-based systems, uses the Direct Memory Access (DMA) to increases the frequency of the new bus, and improves the speed of data exchange. While using this architecture in microprocessor-based system or in computer, the input of the hardware part of our system will be connected to the bus system, and the output, which is a new bus, will be connected to an external device. The new bus is composed of a data bus, a control bus and an address bus. A Xilinx Integrated Software Environment (ISE) 7.1i has been used for the programmable logic implementation.

Keywords: Interfacing, Software/hardware System, CPLD, programmable logic, DMA.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1227
1 VLSI Design of 2-D Discrete Wavelet Transform for Area-Efficient and High-Speed Image Computing

Authors: Mountassar Maamoun, Mehdi Neggazi, Abdelhamid Meraghni, Daoud Berkani

Abstract:

This paper presents a VLSI design approach of a highspeed and real-time 2-D Discrete Wavelet Transform computing. The proposed architecture, based on new and fast convolution approach, reduces the hardware complexity in addition to reduce the critical path to the multiplier delay. Furthermore, an advanced twodimensional (2-D) discrete wavelet transform (DWT) implementation, with an efficient memory area, is designed to produce one output in every clock cycle. As a result, a very highspeed is attained. The system is verified, using JPEG2000 coefficients filters, on Xilinx Virtex-II Field Programmable Gate Array (FPGA) device without accessing any external memory. The resulting computing rate is up to 270 M samples/s and the (9,7) 2-D wavelet filter uses only 18 kb of memory (16 kb of first-in-first-out memory) with 256×256 image size. In this way, the developed design requests reduced memory and provide very high-speed processing as well as high PSNR quality.

Keywords: Discrete Wavelet Transform (DWT), Fast Convolution, FPGA, VLSI.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1824