%0 Journal Article
	%A Z. Feng and  V. Viswanathan and  D. Navarro and  I. O'Connor
	%D 2012
	%J International Journal of Electronics and Communication Engineering
	%B World Academy of Science, Engineering and Technology
	%I Open Science Index 71, 2012
	%T Image Sensor Matrix High Speed Simulation
	%U https://publications.waset.org/pdf/6766
	%V 71
	%X This paper presents a new high speed simulation methodology to solve the long simulation time problem of CMOS image sensor matrix. Generally, for integrating the pixel matrix in SOC and simulating the system performance, designers try to model the pixel in various modeling languages such as VHDL-AMS, SystemC or Matlab. We introduce a new alternative method based on spice model in cadence design platform to achieve accuracy and reduce simulation time. The simulation results indicate that the pixel output voltage maximum error is at 0.7812% and time consumption reduces from 2.2 days to 13 minutes achieving about 240X speed-up for the 256x256 pixel matrix.

	%P 1244 - 1247