Search results for: Delay Modelling; On-Chip Interconnect; RLCGInterconnect; Ramp Input; Damping; VLSI
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 2669

Search results for: Delay Modelling; On-Chip Interconnect; RLCGInterconnect; Ramp Input; Damping; VLSI

2639 Simulation of Particle Damping under Centrifugal Loads

Authors: Riaz A. Bhatti, Wang Yanrong

Abstract:

Particle damping is a technique to reduce the structural vibrations by means of placing small metallic particles inside a cavity that is attached to the structure at location of high vibration amplitudes. In this paper, we have presented an analytical model to simulate the particle damping of two dimensional transient vibrations in structure operating under high centrifugal loads. The simulation results show that this technique remains effective as long as the ratio of the dynamic acceleration of the structure to the applied centrifugal load is more than 0.1. Particle damping increases with the increase of particle to structure mass ratio. However, unlike to the case of particle damping in the absence of centrifugal loads where the damping efficiency strongly depends upon the size of the cavity, here this dependence becomes very weak. Despite the simplicity of the model, the simulation results are considerably in good agreement with the very scarce experimental data available in the literature for particle damping under centrifugal loads.

Keywords: Impact damping, particle damping, vibration control, vibration suppression.

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2638 Adaptive Distributed Genetic Algorithms and Its VLSI Design

Authors: Kazutaka Kobayashi, Norihiko Yoshida, Shuji Narazaki

Abstract:

This paper presents a dynamic adaptation scheme for the frequency of inter-deme migration in distributed genetic algorithms (GA), and its VLSI hardware design. Distributed GA, or multi-deme-based GA, uses multiple populations which evolve concurrently. The purpose of dynamic adaptation is to improve convergence performance so as to obtain better solutions. Through simulation experiments, we proved that our scheme achieves better performance than fixed frequency migration schemes.

Keywords: Genetic algorithms, dynamic adaptation, VLSI hardware.

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2637 Pulsed Multi-Layered Image Filtering: A VLSI Implementation

Authors: Christian Mayr, Holger Eisenreich, Stephan Henker, René Schüffny

Abstract:

Image convolution similar to the receptive fields found in mammalian visual pathways has long been used in conventional image processing in the form of Gabor masks. However, no VLSI implementation of parallel, multi-layered pulsed processing has been brought forward which would emulate this property. We present a technical realization of such a pulsed image processing scheme. The discussed IC also serves as a general testbed for VLSI-based pulsed information processing, which is of interest especially with regard to the robustness of representing an analog signal in the phase or duration of a pulsed, quasi-digital signal, as well as the possibility of direct digital manipulation of such an analog signal. The network connectivity and processing properties are reconfigurable so as to allow adaptation to various processing tasks.

Keywords: Neural image processing, pulse computation application, pulsed Gabor convolution, VLSI pulse routing.

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2636 A Clock Skew Minimization Technique Considering Temperature Gradient

Authors: Se-Jin Ko, Deok-Min Kim, Seok-Yoon Kim

Abstract:

The trend of growing density on chips has increases not only the temperature in chips but also the gradient of the temperature depending on locations. In this paper, we propose the balanced skew tree generation technique for minimizing the clock skew that is affected by the temperature gradients on chips. We calculate the interconnect delay using Elmore delay equation, and find out the optimal balanced clock tree by modifying the clock trees generated through the Deferred Merge Embedding(DME) algorithm. The experimental results show that the distance variance of clock insertion points with and without considering the temperature gradient can be lowered below 54% and we confirm that the skew is remarkably decreased after applying the proposed technique.

Keywords: clock, clock-skew, temperature, thermal.

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2635 Physical Parameter Based Compact Expression for Propagation Constant of SWCNT Interconnects

Authors: Kollarama Subramanyam, Nisha Kuruvilla, J. P. Raina

Abstract:

Novel compact expressions for propagation constant (γ) of SWCNT and bundled SWCNTs interconnect, in terms of physical parameters such as length, operating frequency and diameter of CNTs is proposed in this work. These simplified expressions enable physical insight and accurate estimation of signal attenuation level and its phase change at any length for a particular frequency. The proposed expressions are validated against SPICE simulated results of lumped as well as distributed equivalent electrical RLC nets of CNT interconnect. These expressions also help us to evaluate the cut off frequencies of SWCNTs for different interconnect lengths.

Keywords: Attenuation constant, Bundled SWCNT, CNT interconnects, Propagation Constant.

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2634 Precision Identification of Nonlinear Damping Parameter for a Miniature Moving-Coil Transducer

Authors: Yu-Ting Tsai, Yu-da Lee, Jin H. Huang

Abstract:

The nonlinear damping behavior is usually ignored in the design of a miniature moving-coil loudspeaker. But when the loudspeaker operated in air, the damping parameter varies with the voice-coil displacement corresponding due to viscous air flow. The present paper presents an identification model as inverse problem to identify the nonlinear damping parameter in the lumped parameter model for the loudspeaker. Theoretical results for the nonlinear damping are verified by using laser displacement measurement scanner. These results indicate that the damping parameter has the greatly different nonlinearity between in air and vacuum. It is believed that the results of the present work can be applied in diagnosis and sound quality improvement of a miniature loudspeaker.

Keywords: Miniature loudspeaker, non-linear damping, system identification, Lumped parameter model.

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2633 Simulation Based VLSI Implementation of Fast Efficient Lossless Image Compression System Using Adjusted Binary Code & Golumb Rice Code

Authors: N. Muthukumaran, R. Ravi

Abstract:

The Simulation based VLSI Implementation of FELICS (Fast Efficient Lossless Image Compression System) Algorithm is proposed to provide the lossless image compression and is implemented in simulation oriented VLSI (Very Large Scale Integrated). To analysis the performance of Lossless image compression and to reduce the image without losing image quality and then implemented in VLSI based FELICS algorithm. In FELICS algorithm, which consists of simplified adjusted binary code for Image compression and these compression image is converted in pixel and then implemented in VLSI domain. This parameter is used to achieve high processing speed and minimize the area and power. The simplified adjusted binary code reduces the number of arithmetic operation and achieved high processing speed. The color difference preprocessing is also proposed to improve coding efficiency with simple arithmetic operation. Although VLSI based FELICS Algorithm provides effective solution for hardware architecture design for regular pipelining data flow parallelism with four stages. With two level parallelisms, consecutive pixels can be classified into even and odd samples and the individual hardware engine is dedicated for each one. This method can be further enhanced by multilevel parallelisms.

Keywords: Image compression, Pixel, Compression Ratio, Adjusted Binary code, Golumb Rice code, High Definition display, VLSI Implementation.

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2632 Phase Error Accumulation Methodology for On-Chip Cell Characterization

Authors: Chang Soo Kang, In Ho Im, Sergey Churayev, Timour Paltashev

Abstract:

This paper describes the design of new method of propagation delay measurement in micro and nanostructures during characterization of ASIC standard library cell. Providing more accuracy timing information about library cell to the design team we can improve a quality of timing analysis inside of ASIC design flow process. Also, this information could be very useful for semiconductor foundry team to make correction in technology process. By comparison of the propagation delay in the CMOS element and result of analog SPICE simulation. It was implemented as digital IP core for semiconductor manufacturing process. Specialized method helps to observe the propagation time delay in one element of the standard-cell library with up-to picoseconds accuracy and less. Thus, the special useful solutions for VLSI schematic to parameters extraction, basic cell layout verification, design simulation and verification are announced.

Keywords: phase error accumulation methodology, gatepropagation delay, Processor Testing, MEMS Testing

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2631 Power System Damping Using Hierarchical Fuzzy Multi- Input Power System Stabilizer and Static VAR Compensator

Authors: Mohammad Hasan Raouf, Ebrahim Rasooli Anarmarzi, Hamid Lesani, Javad Olamaei

Abstract:

This paper proposes the application of a hierarchical fuzzy system (HFS) based on multi-input power system stabilizer (MPSS) and also Static Var Compensator (SVC) in multi-machine environment.The number of rules grows exponentially with the number of variables in a conventional fuzzy logic system. The proposed HFS method is developed to solve this problem. To reduce the number of rules the HFS consists of a number of low-dimensional fuzzy systems in a hierarchical structure. In fact, by using HFS the total number of involved rules increases only linearly with the number of input variables. In the MPSS, to have better efficiency an auxiliary signal of reactive power deviation (ΔQ) is added with ΔP+ Δω input type Power system stabilizer (PSS). Phasor model of SVC is described and used in this paper. The performances of MPSS, Conventional power system stabilizer (CPSS), hierarchical Fuzzy Multi-input Power System Stabilizer (HFMPSS) and the proposed method in damping inter-area mode of oscillation are examined in response to disturbances. By using digital simulations the comparative study is illustrated. It can be seen that the proposed PSS is performing satisfactorily within the whole range of disturbances.

Keywords: Power system stabilizer (PSS), hierarchical fuzzysystem (HFS), Static VAR compensator (SVC)

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2630 Transceiver for Differential Wave Pipe-Lined Serial Interconnect with Surfing

Authors: Bhaskar M., Venkataramani B.

Abstract:

In the literature, surfing technique has been proposed for single ended wave-pipelined serial interconnects to increase the data transfer rate. In this paper a novel surfing technique is proposed for differential wave-pipelined serial interconnects, which uses a 'Controllable inverter pair' for surfing. To evaluate the efficiency of this technique, a transceiver with transmitter, receiver, delay locked loop (DLL) along with 40mm metal 4 interconnects using the proposed surfing technique is implemented in UMC 180nm technology and their performances are studied through post layout simulations. From the study, it is observed that the proposed scheme permits 1.875 times higher data transmission rate compared to the single ended scheme whose maximum data transfer rate is 1.33 GB/s. The proposed scheme has the ability to receive the correct data even with stuck-at-faults in the complementary line.

Keywords: Controllable inverter pair, differential interconnect, serial link, surfing, wave pipelining.

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2629 High Performance VLSI Architecture of 2D Discrete Wavelet Transform with Scalable Lattice Structure

Authors: Juyoung Kim, Taegeun Park

Abstract:

In this paper, we propose a fully-utilized, block-based 2D DWT (discrete wavelet transform) architecture, which consists of four 1D DWT filters with two-channel QMF lattice structure. The proposed architecture requires about 2MN-3N registers to save the intermediate results for higher level decomposition, where M and N stand for the filter length and the row width of the image respectively. Furthermore, the proposed 2D DWT processes in horizontal and vertical directions simultaneously without an idle period, so that it computes the DWT for an N×N image in a period of N2(1-2-2J)/3. Compared to the existing approaches, the proposed architecture shows 100% of hardware utilization and high throughput rates. To mitigate the long critical path delay due to the cascaded lattices, we can apply the pipeline technique with four stages, while retaining 100% of hardware utilization. The proposed architecture can be applied in real-time video signal processing.

Keywords: discrete wavelet transform, VLSI architecture, QMF lattice filter, pipelining.

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2628 Experimental Study on Damping Ratios of in-situ Buildings

Authors: Zhiying Zhang, Chongdu Cho

Abstract:

Accurate evaluation of damping ratios involving soilstructure interaction (SSI) effects is the prerequisite for seismic design of in-situ buildings. This study proposes a combined approach to identify damping ratios of SSI systems based on ambient excitation technique. The proposed approach is illustrated with main test process, sampling principle and algorithm steps through an engineering example, as along with its feasibility and validity. The proposed approach is employed for damping ratio identification of 82 buildings in Xi-an, China. Based on the experimental data, the variation range and tendency of damping ratios of these SSI systems, along with the preliminary influence factor, are shown and discussed. In addition, a fitting curve indicates the relation between the damping ratio and fundamental natural period of SSI system.

Keywords: Damping ratio, seismic design, soil-structure interaction, system parameter identification.

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2627 Hybrid Prefix Adder Architecture for Minimizing the Power Delay Product

Authors: P.Ramanathan, P.T.Vanathi

Abstract:

Parallel Prefix addition is a technique for improving the speed of binary addition. Due to continuing integrating intensity and the growing needs of portable devices, low-power and highperformance designs are of prime importance. The classical parallel prefix adder structures presented in the literature over the years optimize for logic depth, area, fan-out and interconnect count of logic circuits. In this paper, a new architecture for performing 8-bit, 16-bit and 32-bit Parallel Prefix addition is proposed. The proposed prefix adder structures is compared with several classical adders of same bit width in terms of power, delay and number of computational nodes. The results reveal that the proposed structures have the least power delay product when compared with its peer existing Prefix adder structures. Tanner EDA tool was used for simulating the adder designs in the TSMC 180 nm and TSMC 130 nm technologies.

Keywords: Parallel Prefix Adder (PPA), Dot operator, Semi-Dotoperator, Complementary Metal Oxide Semiconductor (CMOS), Odd-dot operator, Even-dot operator, Odd-semi-dot operator andEven-semi-dot operator.

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2626 Vibration Damping of High-Chromium Ferromagnetic Steel

Authors: Satish BM, Girish BM , Mahesh K

Abstract:

The aim of the present work is to study the effect of annealing on the vibration damping capacity of high-chromium (16%) ferromagnetic steel. The alloys were prepared from raw materials of 99.9% purity melted in a high frequency induction furnace under high vacuum. The samples were heat-treated in vacuum at various temperatures (800 to 1200ºC) for 1 hour followed by slow cooling (120ºC/h). The inverted torsional pendulum method was used to evaluate the vibration damping capacity. The results indicated that the vibration damping capacity of the alloys is influenced by annealing and there exists a critical annealing temperature after 1000ºC. The damping capacity increases quickly below the critical temperature since the magnetic domains move more easily.

Keywords: Vibration, Damping, Ferromagnetic, Steel.

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2625 Comparative Study of Evolutionary Model and Clustering Methods in Circuit Partitioning Pertaining to VLSI Design

Authors: K. A. Sumitra Devi, N. P. Banashree, Annamma Abraham

Abstract:

Partitioning is a critical area of VLSI CAD. In order to build complex digital logic circuits its often essential to sub-divide multi -million transistor design into manageable Pieces. This paper looks at the various partitioning techniques aspects of VLSI CAD, targeted at various applications. We proposed an evolutionary time-series model and a statistical glitch prediction system using a neural network with selection of global feature by making use of clustering method model, for partitioning a circuit. For evolutionary time-series model, we made use of genetic, memetic & neuro-memetic techniques. Our work focused in use of clustering methods - K-means & EM methodology. A comparative study is provided for all techniques to solve the problem of circuit partitioning pertaining to VLSI design. The performance of all approaches is compared using benchmark data provided by MCNC standard cell placement benchmark net lists. Analysis of the investigational results proved that the Neuro-memetic model achieves greater performance then other model in recognizing sub-circuits with minimum amount of interconnections between them.

Keywords: VLSI, circuit partitioning, memetic algorithm, genetic algorithm.

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2624 Globally Exponential Stability and Dissipativity Analysis of Static Neural Networks with Time Delay

Authors: Lijiang Xiang, Shouming Zhong, Yucai Ding

Abstract:

The problems of globally exponential stability and dissipativity analysis for static neural networks (NNs) with time delay is investigated in this paper. Some delay-dependent stability criteria are established for static NNs with time delay using the delay partitioning technique. In terms of this criteria, the delay-dependent sufficient condition is given to guarantee the dissipativity of static NNs with time delay. All the given results in this paper are not only dependent upon the time delay but also upon the number of delay partitions. Two numerical examples are used to show the effectiveness of the proposed methods.

Keywords: Globally exponential stability, Dissipativity, Static neural networks, Time delay.

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2623 Building Information Modelling for Construction Delay Management

Authors: Essa Alenazi, Zulfikar Adamu

Abstract:

The Kingdom of Saudi Arabia (KSA) is not an exception in relying on the growth of its construction industry to support rapid population growth. However, its need for infrastructure development is constrained by low productivity levels and cost overruns caused by factors such as delays to project completion. Delays in delivering a construction project are a global issue and while theories such as Optimism Bias have been used to explain such delays, in KSA, client-related causes of delays are also significant. The objective of this paper is to develop a framework-based approach to explore how the country’s construction industry can manage and reduce delays in construction projects through building information modelling (BIM) in order to mitigate the cost consequences of such delays.  It comprehensively and systematically reviewed the global literature on the subject and identified gaps, critical delay factors and the specific benefits that BIM can deliver for the delay management.  A case study comprising of nine hospital projects that have experienced delay and cost overruns was also carried out. Five critical delay factors related to the clients were identified as candidates that can be mitigated through BIM’s benefits. These factors are: Ineffective planning and scheduling of the project; changes during construction by the client; delay in progress payment; slowness in decision making by the client; and poor communication between clients and other stakeholders. In addition, data from the case study projects strongly suggest that optimism bias is present in many of the hospital projects. Further validation via key stakeholder interviews and documentations are planned.

Keywords: BIM, client perspective, delay management, optimism bias, public sector projects.

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2622 Model Order Reduction of Linear Time Variant High Speed VLSI Interconnects using Frequency Shift Technique

Authors: J.V.R.Ravindra, M.B.Srinivas,

Abstract:

Accurate modeling of high speed RLC interconnects has become a necessity to address signal integrity issues in current VLSI design. To accurately model a dispersive system of interconnects at higher frequencies; a full-wave analysis is required. However, conventional circuit simulation of interconnects with full wave models is extremely CPU expensive. We present an algorithm for reducing large VLSI circuits to much smaller ones with similar input-output behavior. A key feature of our method, called Frequency Shift Technique, is that it is capable of reducing linear time-varying systems. This enables it to capture frequency-translation and sampling behavior, important in communication subsystems such as mixers, RF components and switched-capacitor filters. Reduction is obtained by projecting the original system described by linear differential equations into a lower dimension. Experiments have been carried out using Cadence Design Simulator cwhich indicates that the proposed technique achieves more % reduction with less CPU time than the other model order reduction techniques existing in literature. We also present applications to RF circuit subsystems, obtaining size reductions and evaluation speedups of orders of magnitude with insignificant loss of accuracy.

Keywords: Model order Reduction, RLC, crosstalk

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2621 Design of Low Power and High Speed Digital IIR Filter in 45nm with Optimized CSA for Digital Signal Processing Applications

Authors: G. Ramana Murthy, C. Senthilpari, P. Velrajkumar, Lim Tien Sze

Abstract:

In this paper, a design methodology to implement low-power and high-speed 2nd order recursive digital Infinite Impulse Response (IIR) filter has been proposed. Since IIR filters suffer from a large number of constant multiplications, the proposed method replaces the constant multiplications by using addition/subtraction and shift operations. The proposed new 6T adder cell is used as the Carry-Save Adder (CSA) to implement addition/subtraction operations in the design of recursive section IIR filter to reduce the propagation delay. Furthermore, high-level algorithms designed for the optimization of the number of CSA blocks are used to reduce the complexity of the IIR filter. The DSCH3 tool is used to generate the schematic of the proposed 6T CSA based shift-adds architecture design and it is analyzed by using Microwind CAD tool to synthesize low-complexity and high-speed IIR filters. The proposed design outperforms in terms of power, propagation delay, area and throughput when compared with MUX-12T, MCIT-7T based CSA adder filter design. It is observed from the experimental results that the proposed 6T based design method can find better IIR filter designs in terms of power and delay than those obtained by using efficient general multipliers.

Keywords: CSA Full Adder, Delay unit, IIR filter, Low-Power, PDP, Parametric Analysis, Propagation Delay, Throughput, VLSI.

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2620 Chatter Suppression in Boring Process Using Passive Damper

Authors: V. Prasannavenkadesan, A. Elango, S. Chockalingam

Abstract:

During machining process, chatter is an unavoidable phenomenon. Boring bars possess the cantilever shape and due to this, it is subjected to chatter. The adverse effect of chatter includes the increase in temperature which will leads to excess tool wear. To overcome these problems, in this investigation, Cartridge brass (Cu – 70% and Zn – 30%) is passively fixed on the boring bar and also clearance is provided in order to reduce the displacement, tool wear and cutting temperature. A conventional all geared lathe is attached with vibrometer and pyrometer is used to measure the displacement and temperature. The influence of input parameters such as cutting speed, depth of cut and clearance on temperature, tool wear and displacement are investigated for various cutting conditions. From the result, the optimum conditions to obtain better damping in boring process for chatter reduction is identified.

Keywords: Boring, chatter, mass damping, passive damping.

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2619 Stability Analysis of Mutualism Population Model with Time Delay

Authors: Rusliza Ahmad, Harun Budin

Abstract:

This paper studies the effect of time delay on stability of mutualism population model with limited resources for both species. First, the stability of the model without time delay is analyzed. The model is then improved by considering a time delay in the mechanism of the growth rate of the population. We analyze the effect of time delay on the stability of the stable equilibrium point. Result showed that the time delay can induce instability of the stable equilibrium point, bifurcation and stability switches.

Keywords: Bifurcation, Delay margin, Mutualism population model, Time delay

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2618 The Finite Difference Scheme for the Suspended String Equation with the Nonlinear Damping Term

Authors: Jaipong Kasemsuwan

Abstract:

A numerical solution of the initial boundary value problem of the suspended string vibrating equation with the particular nonlinear damping term based on the finite difference scheme is presented in this paper. The investigation of how the second and third power terms of the nonlinear term affect the vibration characteristic. We compare the vibration amplitude as a result of the third power nonlinear damping with the second power obtained from previous report provided that the same initial shape and initial velocities are assumed. The comparison results show that the vibration amplitude is inversely proportional to the coefficient of the damping term for the third power nonlinear damping case, while the vibration amplitude is proportional to the coefficient of the damping term in the second power nonlinear damping case.

Keywords: Finite-difference method, the nonlinear damped equation, the numerical simulation, the suspended string equation

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2617 The Simulation and Realization of Input-Buffer Scheduling Algorithm in Satellite Switching System

Authors: Yi Zhang, Quan Zhou, Jun Li, Yanlang Hu

Abstract:

Scheduling algorithm is a key technology in satellite switching system with input-buffer. In this paper, a new scheduling algorithm and its realization are proposed. Based on Crossbar switching fabric, the algorithm adopts serial scheduling strategy and adjusts the output port arbitrating strategy for the better equity of every port. Consequently, it increases the matching probability. The algorithm can greatly reduce the scheduling delay and cell loss rate. The analysis and simulation results by OPNET show that the proposed algorithm has the better performance than others in average delay and cell loss rate, and has the equivalent complexity. On the basis of these results, the hardware realization and simulation based on FPGA are completed, which validate the feasibility of the new scheduling algorithm.

Keywords: Scheduling algorithm, input-buffer, serial scheduling, hardware design.

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2616 Induction Motor Analysis Using LabVIEW

Authors: E. Ramprasath, P. Manojkumar, P. Veena

Abstract:

Proposed paper dealt with the modelling and analysis of induction motor based on the mathematical expression using the graphical programming environment of Laboratory Virtual Instrument Engineering Workbench (LabVIEW). Induction motor modelling with the mathematical expression enables the motor to be simulated with the various required parameters. Owing to the invention of variable speed drives study about the induction motor characteristics became complex. In this simulation motor internal parameter such as stator resistance and reactance, rotor resistance and reactance, phase voltage, frequency and losses will be given as input. By varying the speed of motor corresponding parameters can be obtained they are input power, output power, efficiency, torque induced, slip and current.

Keywords: Induction motor, LabVIEW software, modelling and analysis, electrical and mechanical characteristics of motor.

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2615 Robust BIBO Stabilization Analysis for Discrete-time Uncertain System

Authors: Zixin Liu, Shu Lü, Shouming Zhong, Mao Ye

Abstract:

The discrete-time uncertain system with time delay is investigated for bounded input bounded output (BIBO). By constructing an augmented Lyapunov function, three different sufficient conditions are established for BIBO stabilization. These conditions are expressed in the form of linear matrix inequalities (LMIs), whose feasibility can be easily checked by using Matlab LMI Toolbox. Two numerical examples are provided to demonstrate the effectiveness of the derived results.

Keywords: Robust BIBO stabilization, delay-dependent stabilization, discrete-time system, time delay.

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2614 Comparative Study of Ant Colony and Genetic Algorithms for VLSI Circuit Partitioning

Authors: Sandeep Singh Gill, Rajeevan Chandel, Ashwani Chandel

Abstract:

This paper presents a comparative study of Ant Colony and Genetic Algorithms for VLSI circuit bi-partitioning. Ant colony optimization is an optimization method based on behaviour of social insects [27] whereas Genetic algorithm is an evolutionary optimization technique based on Darwinian Theory of natural evolution and its concept of survival of the fittest [19]. Both the methods are stochastic in nature and have been successfully applied to solve many Non Polynomial hard problems. Results obtained show that Genetic algorithms out perform Ant Colony optimization technique when tested on the VLSI circuit bi-partitioning problem.

Keywords: Partitioning, genetic algorithm, ant colony optimization, non-polynomial hard, netlist, mutation.

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2613 Vibration Control of Two Adjacent Structures Using a Non-Linear Damping System

Authors: Soltani Amir, Wang Xuan

Abstract:

The advantage of using non-linear passive damping  system in vibration control of two adjacent structures is investigated  under their base excitation. The base excitation is El Centro  earthquake record acceleration. The damping system is considered as  an optimum and effective non-linear viscous damper that is  connected between two adjacent structures. A MATLAB program is  developed to produce the stiffness and damping matrices and to  determine a time history analysis of the dynamic motion of the  system. One structure is assumed to be flexible while the other has a  rule as laterally supporting structure with rigid frames. The response  of the structure has been calculated and the non-linear damping  coefficient is determined using optimum LQR algorithm in an  optimum vibration control system. The non-linear parameter of  damping system is estimated and it has shown a significant advantage  of application of this system device for vibration control of two  adjacent tall building.

Keywords: Structural Control, Active and passive damping, Vibration control, Seismic isolation.

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2612 Periodic Oscillations in a Delay Population Model

Authors: Changjin Xu, Peiluan Li

Abstract:

In this paper, a nonlinear delay population model is investigated. Choosing the delay as a bifurcation parameter, we demonstrate that Hopf bifurcation will occur when the delay exceeds a critical value. Global existence of bifurcating periodic solutions is established. Numerical simulations supporting the theoretical findings are included.

Keywords: Population model, Stability, Hopf bifurcation, Delay, Global Hopf bifurcation.

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2611 Effects of the Mass and Damping Matrix Model in the Nonlinear Seismic Response of Steel Frames

Authors: A. Reyes-Salazar, M. D. Llanes-Tizoc, E. Bojorquez, F. Valenzuela-Beltran, J. Bojorquez, J. R. Gaxiola-Camacho, A. Haldar

Abstract:

Seismic analysis of steel buildings is usually based on the use of the concentrated mass (ML) matrix and the Rayleigh damping matrix (C). Similarly, the initial stiffness matrix (KO) and the first two modes associated to lateral vibrations are commonly used to develop the matrix C. The evaluation of the accuracy of these practices for the particular case of steel buildings with moment-resisting steel frames constitutes the main objective of this research. For this, the nonlinear seismic responses of three models of steel frames, representing low-, medium- and high-rise steel buildings, are considered. Results indicate that if the ML matrix is used, shears and bending moments in columns are underestimated by up to 30% and 65%, respectively, when compared to the corresponding results obtained with the consistent mass matrix (MC). It is also shown that if KO is used in C instead the tangent stiffness matrix (Kt), axial loads in columns are underestimated by up to 80%. It is concluded that the consistent mass matrix should be used in the structural modelling of moment resisting steel frames and the tangent stiffness matrix should be used to develop the Rayleigh damping matrix.

Keywords: Moment-resisting steel frames, consistent and concentrated mass matrices, nonlinear seismic response, Rayleigh damping.

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2610 A Study on the Performance Characteristics of Variable Valve for Reverse Continuous Damper

Authors: Se Kyung Oh, Young Hwan Yoon, Ary Bachtiar Krishna

Abstract:

Nowadays, a passenger car suspension must has high performance criteria with light weight, low cost, and low energy consumption. Pilot controlled proportional valve is designed and analyzed to get small pressure change rate after blow-off, and to get a fast response of the damper, a reverse damping mechanism is adapted. The reverse continuous variable damper is designed as a HS-SH damper which offers good body control with reduced transferred input force from the tire, compared with any other type of suspension system. The damper structure is designed, so that rebound and compression damping forces can be tuned independently, of which the variable valve is placed externally. The rate of pressure change with respect to the flow rate after blow-off becomes smooth when the fixed orifice size increases, which means that the blow-off slope is controllable using the fixed orifice size. Damping forces are measured with the change of the solenoid current at the different piston velocities to confirm the maximum hysteresis of 20 N, linearity, and variance of damping force. The damping force variance is wide and continuous, and is controlled by the spool opening, of which scheme is usually adapted in proportional valves. The reverse continuous variable damper developed in this study is expected to be utilized in the semi-active suspension systems in passenger cars after its performance and simplicity of the design is confirmed through a real car test.

Keywords: Blow-off, damping force, pilot controlledproportional valve, reverse continuous damper.

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