Search results for: Control circuit

Authors: Vijay Janyani, Trevor M. Benson, Ana Vukovic

Abstract:

A time-domain numerical model within the framework of transmission line modeling (TLM) is developed to simulate electromagnetic pulse propagation inside multiple microcavities forming photonic crystal (PhC) structures. The model developed is quite general and is capable of simulating complex electromagnetic problems accurately. The field quantities can be mapped onto a passive electrical circuit equivalent what ensures that TLM is provably stable and conservative at a local level. Furthermore, the circuit representation allows a high level of hybridization of TLM with other techniques and lumped circuit models of components and devices. A photonic crystal structure formed by rods (or blocks) of high-permittivity dieletric material embedded in a low-dielectric background medium is simulated as an example. The model developed gives vital spatio-temporal information about the signal, and also gives spectral information over a wide frequency range in a single run. The model has wide applications in microwave communication systems, optical waveguides and electromagnetic materials simulations.

Keywords: Computational Electromagnetics, Numerical Simulation, Transmission Line Modeling.

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Authors: P. Prasad Rao, K. Lal Kishore

Abstract:

Pipeline ADCs are becoming popular at high speeds and with high resolution. This paper discusses the options of number of bits/stage conversion techniques in pipelined ADCs and their effect on Area, Speed, Power Dissipation and Linearity. The basic building blocks like op-amp, Sample and Hold Circuit, sub converter, DAC, Residue Amplifier used in every stage is assumed to be identical. The sub converters use flash architectures. The design is implemented using 0.18

Keywords: 1.5 bits/stage, Conversion Frequency, Redundancy Switched Capacitor Sample and Hold Circuit

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Authors: Abdelmonaem Ayachi, Belgacem Hamdi

Abstract:

This paper presents a fault-tolerant implementation for adder schemes using the dual duplication code. To prove the efficiency of the proposed method, the circuit is simulated in double pass transistor CMOS 32nm technology and some transient faults are voluntary injected in the Layout of the circuit. This fully differential implementation requires only 20 transistors which mean that the proposed design involves 28.57% saving in transistor count compared to standard CMOS technology.

Keywords: Semiconductors, digital electronics, double pass transistor technology, Full adder, fault tolerance.

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Authors: Santirat Nansaarng, Sittichai Kaewkuekool, Supreeya Siripattanakunkajorn

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This research was to study a comparison of inspector-s performance between regular and complex visual inspection task. Visual task was simulated on DVD read control circuit. Inspection task was performed by using computer. Subjects were 10 undergraduate randomly selected and test for 20/20. Then, subjects were divided into two groups, five for regular inspection (control group) and five for complex inspection (treatment group) tasks. Result was showed that performance on regular and complex inspectors was significantly difference at the level of 0.05. Inspector performance on regular inspection was showed high percentage on defects detected by using equal time to complex inspection. This would be indicated that inspector performance was affected by visual inspection task.

Keywords: Visual inspection task, regular and complex task.

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Authors: Shobha Sharma, Amita Dev

Abstract:

Data driven dynamic logic is the high speed dynamic circuit with low area. The clock of the dynamic circuit is removed and data drives the circuit instead of clock for precharging purpose. This data driven dynamic nand gate is given static forward substrate biasing of Vsupply/2 as well as the substrate bias is connected to the input data, resulting in dynamic substrate bias. The dynamic substrate bias gives the shortest propagation delay with a penalty on the power dissipation. Propagation delay is reduced by 77.8% compared to the normal reverse substrate bias Data driven dynamic nand. Also dynamic substrate biased D3nand’s propagation delay is reduced by 31.26% compared to data driven dynamic nand gate with static forward substrate biasing of Vdd/2. This data driven dynamic nand gate with dynamic body biasing gives us the highest speed with no area penalty and finds its applications where power penalty is acceptable. Also combination of Dynamic and static Forward body bias can be used with reduced propagation delay compared to static forward biased circuit and with comparable increase in an average power. The simulations were done on hspice simulator with 22nm High-k metal gate strained Si technology HP models of Arizona State University, USA.

Keywords: Data driven nand gate, dynamic substrate biasing, nand gate, static substrate biasing.

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Authors: A. Denker, U. Akıncıoğlu

Abstract:

In this paper a neural adaptive control method has been developed and applied to robot control. Simulation results are presented to verify the effectiveness of the controller. These results show that the performance by using this controller is better than those which just use either direct inverse control or predictive control. In addition, they show that the resulting is a useful method which combines the advantages of both direct inverse control and predictive control.

Keywords: Neural networks, robotics, direct inverse control, predictive control.

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Authors: Fei Long Wei, Hua Yang, Hai Tao Zhang, Zhou Ping Yin

Abstract:

In this study, an local invariant generalized Houghtransform (LI-GHT) method is proposed for integrated circuit (IC) visual positioning. The original generalized Hough transform (GHT) is robust to external noise; however, it is not suitable for visual positioning of IC chips due to the four-dimensionality (4D) of parameter space which leads to the substantial storage requirement and high computational complexity. The proposed LI-GHT method can reduce the dimensionality of parameter space to 2D thanks to the rotational invariance of local invariant geometric feature and it can estimate the accuracy position and rotation angle of IC chips in real-time under noise and blur influence. The experiment results show that the proposed LI-GHT can estimate position and rotation angle of IC chips with high accuracy and fast speed. The proposed LI-GHT algorithm was implemented in IC visual positioning system of radio frequency identification (RFID) packaging equipment.

Keywords: Integrated Circuit Visual Positioning, Generalized Hough Transform, Local invariant Generalized Hough Transform, ICpacking equipment.

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Authors: R. Kamalakannan, N. Ravi Kumar

Abstract:

Feeder protection is important in transmission and distribution side because if any fault occurs in any feeder or transformer, man power is needed to identify the problem and it will take more time. In the existing system, directional overcurrent elements with load further secured by a load encroachment function can be used to provide necessary security and sensitivity for faults on remote points in a circuit. It is validated only in renewable plant collector circuit protection applications over a wide range of operating conditions. In this method, the directional overcurrent feeder protection is developed by using monitoring of feeder section through internet. In this web based monitoring, the fault and power theft are identified by using Toro dial sensor and its information is received by SCADA (Supervisory Control and Data Acquisition) and controlled by ARM microcontroller. This web based monitoring is also used to monitor the feeder management, directional current detection, demand side management, overload fault. This monitoring system is capable of monitoring the distribution feeder over a large area depending upon the cost. It is also used to reduce the power theft, time and man power. The simulation is done by MATLAB software.

Keywords: Current sensor, distribution feeder protection, directional overcurrent, power theft, protective relay.

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Authors: Jingjing Lan, Jun Zhou, Xin Liu

Abstract:

In this paper, a low-power digital controller for DC-DC power conversion was presented. The controller generates the pulse-width modulated (PWM) signal from digital inputs provided by analog-to-digital converter (ADC). An efficient and simple design scheme to develop the control unit was discussed. This method allows minimization of the consumed resources of the chip and it is based on direct digital design approach. In this application, with the proposed scheme, nearly half area and two-third of the power consumption was saved compared to the conventional schemes. This work illustrates the possibility of implementing low-power and area-efficient power management circuit using direct digital design based approach. 

Keywords: Buck converter, DC-DC power conversion, digital control, proportional-integral (PI) controller.

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Authors: Mehdi Hosseinzadeh, Somayyeh Jafarali Jassbi, Keivan Navi

Abstract:

Residue Number System (RNS) is a modular representation and is proved to be an instrumental tool in many digital signal processing (DSP) applications which require high-speed computations. RNS is an integer and non weighted number system; it can support parallel, carry-free, high-speed and low power arithmetic. A very interesting correspondence exists between the concepts of Multiple Valued Logic (MVL) and Residue Number Arithmetic. If the number of levels used to represent MVL signals is chosen to be consistent with the moduli which create the finite rings in the RNS, MVL becomes a very natural representation for the RNS. There are two concerns related to the application of this Number System: reaching the most possible speed and the largest dynamic range. There is a conflict when one wants to resolve both these problem. That is augmenting the dynamic range results in reducing the speed in the same time. For achieving the most performance a method is considere named “One-Hot Residue Number System" in this implementation the propagation is only equal to one transistor delay. The problem with this method is the huge increase in the number of transistors they are increased in order m² . In real application this is practically impossible. In this paper combining the Multiple Valued Logic and One-Hot Residue Number System we represent a new method to resolve both of these two problems. In this paper we represent a novel design of an OHRNS-based adder circuit. This circuit is useable for Multiple Valued Logic moduli, in comparison to other RNS design; this circuit has considerably improved the number of transistors and power consumption.

Keywords: Computer Arithmetic, Residue Number System, Multiple Valued Logic, One-Hot, VLSI.

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Authors: R.K. Behera, S.Behera

Abstract:

In a wind power generator using doubly fed induction generator (DFIG), the three-phase pulse width modulation (PWM) voltage source converter (VSC) is used as grid side converter (GSC) and rotor side converter (RSC). The standard linear control laws proposed for GSC provides not only instablity against comparatively large-signal disturbances, but also the problem of stability due to uncertainty of load and variations in parameters. In this paper, a nonlinear controller is designed for grid side converter (GSC) of a DFIG for wind power application. The nonlinear controller is designed based on the input-output feedback linearization control method. The resulting closed-loop system ensures a sufficient stability region, make robust to variations in circuit parameters and also exhibits good transient response. Computer simulations and experimental results are presented to confirm the effectiveness of the proposed control strategy.

Keywords: Doubly fed Induction Generator, grid side converter, machine side converter, dc link, feedback linearization.

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Authors: Wang Zhulin, Min Fuhong, Peng Guangya, Wang Yaoda, Cao Yi

Abstract:

In this paper, a magnetron memristor model based on hyperbolic sine function is presented and the correctness proved by studying the trajectory of its voltage and current phase, and then a memristor chaotic system with the memristor model is presented. The phase trajectories and the bifurcation diagrams and Lyapunov exponent spectrum of the magnetron memristor system are plotted by numerical simulation, and the chaotic evolution with changing the parameters of the system is also given. The paper includes numerical simulations and mathematical model, which confirming that the system, has a wealth of dynamic behavior.

Keywords: Memristor, chaotic circuit, dynamical behavior, chaotic system.

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Authors: Neeraj K. Chasta

Abstract:

This paper presents an idea for analog current comparison which compares input signal and reference currents with high speed and accuracy. Proposed circuit utilizes amplification properties of common gate configuration, where voltage variations of input current are amplified and a compared output voltage is developed. Cascaded inverter stages are used to generate final CMOS compatible output voltage. Power consumption of circuit can be controlled by the applied gate bias voltage. The comparator is designed and studied at 180nm CMOS process technology for a supply voltage of 3V.

Keywords: Current Mode, Comparator, High Resolution, High Speed.

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Authors: Karama M. AL-Tamimi, Munir A. Al-Absi

Abstract:

A new OTA-based logarithmic-control variable gain current amplifier (LCCA) is presented. It consists of two Operational Transconductance Amplifier (OTA) and two PMOS transistors biased in weak inversion region. The circuit operates from 0.6V DC power supply and consumes 0.6 μW. The linear-dB controllable output range is 43 dB with maximum error less than 0.5dB. The functionality of the proposed design was confirmed using HSPICE in 0.35μm CMOS process technology.

Keywords: LCCA, OTA, Logarithmic, VGA, Weak inversion, Current-mode

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Authors: R. Prakash, B. Meenakshipriya, R. Kumaravelan

Abstract:

Fresh water is one of the resources which is getting depleted day by day. A wise method to address this issue is by the application of renewable energy-sun irradiation and by means of decentralized, cheap, energetically self-sufficient, robust and simple to operate plants, distillates can be obtained from sea, river or even sewage. Solar desalination is a technique used to desalinate water using solar energy. The present work deals with the comprehensive design and simulation of solar tracking system using LabVIEW, temperature and mass flow rate control of the solar desalination plant using LabVIEW and also analysis of single phase inverter circuit with LC filters for solar pumping system in MATLAB. The main objective of this work is to improve the performance of solar desalination system using automatic tracking system, output control using temperature and mass flow rate control system and also to reduce the harmonic distortion in the solar pumping system by means of LC filters. The simulation of single phase inverter was carried out using MATLAB and the output waveforms were analyzed. Simulations were performed for optimum output temperature control, which in turn controls the mass flow rate of water in the thermal collectors. Solar tracking system was accomplished using LABVIEW and was tested successfully. The thermal collectors are tracked in accordance with the sun’s irradiance levels, thereby increasing the efficiency of the thermal collectors.

Keywords: Desalination, Electro dialysis, LabVIEW, MATLAB, PWM inverter, Reverse osmosis.

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Authors: ER. Yashpaul Singh, A. Swarup

Abstract:

This research paper evaluates and compares the performance of equal cost adaptive multi-path routing algorithms taking the transport protocols TCP (Transmission Control Protocol) and UDP (User Datagram Protocol) using network simulator ns2 and concludes which one is better.

Keywords: Multi-path routing algorithm, Datagram, Virtual Circuit, Throughput, Network services.

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Authors: Amit Kumar Gautam, Sudipta Majumdar

Abstract:

This paper presents parameter estimation of a single-phase rectifier using extended Kalman filter (EKF). The state space model has been obtained using Kirchhoff’s current law (KCL) and Kirchhoff’s voltage law (KVL). The capacitor voltage and diode current of the circuit have been estimated using EKF. Simulation results validate the better accuracy of the proposed method as compared to the least mean square method (LMS). Further, EKF has the advantage that it can be used for nonlinear systems.

Keywords: Extended Kalman filter, parameter estimation, single phase rectifier, state space modelling.

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Authors: Mayank Shakya, Soundra Pandian. K. K

Abstract:

A linear feedback shift register (LFSR) is proposed which targets to reduce the power consumption from within. It reduces the power consumption during testing of a Circuit Under Test (CUT) at two stages. At first stage, Control Logic (CL) makes the clocks of the switching units of the register inactive for a time period when output from them is going to be same as previous one and thus reducing unnecessary switching of the flip-flops. And at second stage, the LFSR reorders the test vectors by interchanging the bit with its next and closest neighbor bit. It keeps fault coverage capacity of the vectors unchanged but reduces the Total Hamming Distance (THD) so that there is reduction in power while shifting operation.

Keywords: Linear Feedback Shift Register, Total Hamming Distance, Fault Coverage, Control Logic

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Authors: Chih Chin Yang, Chih Yu Lee, Jing Yi Wang, Mei Zhen Xue, Chia Yueh Wu

Abstract:

A well-defined frequency multiple dividing (FMD) circuit using a resonant model is presented in this research. The basic component of a frequency multiple divider as used in a resonant model is established by compositing a well-defined resonant effect of negative differential resistance (NDR) characteristics which possesses a wider operational region and high operational current at a bias voltage of about 1.15 V. The resonant model is then applied in the frequency dividing circuit with the above division ratio (R_D) of 200 at the signal input of middle frequency. The division ratio also exists at the input of a low frequency signal.

Keywords: Divider, frequency, resonant model.

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Authors: Mohammad Hasan Raouf, Azim Nowbakht, Mohammad Bagher Haddadi, Mohammad Reza Tabatabaei

Abstract:

Power quality has become a very important issue recently due to the impact on electricity suppliers, equipment manufacturers and customers. Power quality is described as the variation of voltage, current and frequency in a power system. Voltage magnitude is one of the major factors that determine the quality of power. Indeed, custom power technology, the low-voltage counterpart of the more widely known flexible ac transmission system (FACTS) technology, aimed at high-voltage power transmission applications, has emerged as a credible solution to solve many problems relating to power quality problems. There are various power quality problems such as voltage sags, swells, flickers, interruptions and harmonics etc. Active Power Filter (APF) is one of the custom power devices and can mitigate harmonics, reactive power and unbalanced load currents originating from load side. In this study, an extensive review of APF studies, the advantages and disadvantages of each introduced methods are presented. The study also helps the researchers to choose the optimum control techniques and power circuit configuration for APF applications.

Keywords: Power Quality, Custom Power, Active Filter, Control Approach.

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Authors: T. Abdelkrim, K. Ben seddik, B. Bezza, K. Benamrane, Aeh. Benkhelifa

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This paper proposes an implementation of boost converter for a resistive load using photovoltaic energy as a source. The model of photovoltaic cell and operating principle of boost converter are presented. A PIC microcontroller is used in the close loop control to generate pulses for controlling the converter circuit. To performance evaluation of boost converter, a variation of output voltage of PV panel is done by shading one and two cells.

Keywords: Boost converter, Microcontroller, Photovoltaic power generation, Shading cells.

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Authors: H. Noun, C. Urban-Seelmann, M. Abdelfattah, G. Zeller, G. Rajesh, I. Mozgova, R. Lachmayer

Abstract:

Several modules in automotive are usually modified and adapted for various project-specific applications. Due to a standardized safety concept a high reusability is accessible. A safety element out of context (SEooC) according to ISO 26262 can be a suitable approach. Based on the same safety concept and analysis, common modules can reach high reusability. For developing according to a module out of context, an appropriate and detailed development approach is required. This paper shows how to deduce this development processes for platform modules. Therefore, the detailed approach of the SEooC is derived. The aim is to create a detailed workflow for all phases of the development and integration of any kind of system modules. As an application example, an automotive project for an actuator control module is considered.

Keywords: Functional Safety, Safety Element out of Context, System Engineering, Hardware Engineering.

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Authors: Cheng Zhang, James Marco, Walid Allafi, Truong Q. Dinh, W. D. Widanage

Abstract:

Equivalent circuit models (ECMs) are widely used in battery management systems in electric vehicles and other battery energy storage systems. The battery dynamics and the model parameters vary under different working conditions, such as different temperature and state of charge (SOC) levels, and therefore online parameter identification can improve the modelling accuracy. This paper presents a way of online ECM parameter identification using a continuous time (CT) estimation method. The CT estimation method has several advantages over discrete time (DT) estimation methods for ECM parameter identification due to the widely separated battery dynamic modes and fast sampling. The presented method can be used for online SOC estimation. Test data are collected using a lithium ion cell, and the experimental results show that the presented CT method achieves better modelling accuracy compared with the conventional DT recursive least square method. The effectiveness of the presented method for online SOC estimation is also verified on test data.

Keywords: Equivalent circuit model, continuous time domain estimation, linear integral filter method, parameter and SOC estimation, recursive least square.

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Authors: Kejun Zhuang, Hailong Zhu

Abstract:

In this paper, stability and Hopf bifurcation analysis of a novel hyperchaotic system are investigated. Four feedback control strategies, the linear feedback control method, enhancing feedback control method, speed feedback control method and delayed feedback control method, are used to control the hyperchaotic attractor to unstable equilibrium. Moreover numerical simulations are given to verify the theoretical results.

Keywords: Feedback control, Hopf bifurcation, hyperchaotic system, stability.

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Authors: Emilija Miletic, Milos Krstic, Maxim Piz, Michael Methfessel

Abstract:

In this work we present a solution for DAGC (Digital Automatic Gain Control) in WLAN receivers compatible to IEEE 802.11a/g standard. Those standards define communication in 5/2.4 GHz band using Orthogonal Frequency Division Multiplexing OFDM modulation scheme. WLAN Transceiver that we have used enables gain control over Low Noise Amplifier (LNA) and a Variable Gain Amplifier (VGA). The control over those signals is performed in our digital baseband processor using dedicated hardware block DAGC. DAGC in this process is used to automatically control the VGA and LNA in order to achieve better signal-to-noise ratio, decrease FER (Frame Error Rate) and hold the average power of the baseband signal close to the desired set point. DAGC function in baseband processor is done in few steps: measuring power levels of baseband samples of an RF signal,accumulating the differences between the measured power level and actual gain setting, adjusting a gain factor of the accumulation, and applying the adjusted gain factor the baseband values. Based on the measurement results of RSSI signal dependence to input power we have concluded that this digital AGC can be implemented applying the simple linearization of the RSSI. This solution is very simple but also effective and reduces complexity and power consumption of the DAGC. This DAGC is implemented and tested both in FPGA and in ASIC as a part of our WLAN baseband processor. Finally, we have integrated this circuit in a compact WLAN PCMCIA board based on MAC and baseband ASIC chips designed from us.

Keywords: WLAN, AGC, RSSI, baseband processor

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Authors: A. Izadbakhsh, M. M. Fateh

Abstract:

A model-free robust control (MFRC) approach is proposed for position control of robot manipulators in the state space. The control approach is verified analytically to be robust subject to uncertainties including external disturbances, unmodeled dynamics, and parametric uncertainties. There is a high flexibility to work on different systems including actuators by the use of the proposed control approach. The proposed control approach can guarantee the robustness of control system. A PUMA 560 robot driven by geared permanent magnet dc motors is simulated. The simulation results show a satisfactory performance for control system under technical specifications. KeywordsModel-free, robust control, position control, PUMA 560.

Keywords: Model-free, robust control, position control, PUMA 560.

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Authors: Mazhar B. Tayel, Amr H. Yassin

Abstract:

A proposed small-signal model parameters for a pseudomorphic high electron mobility transistor (PHEMT) is presented. Both extrinsic and intrinsic circuit elements of a smallsignal model are determined using genetic algorithm (GA) as a stochastic global search and optimization tool. The parameters extraction of the small-signal model is performed on 200-μm gate width AlGaAs/InGaAs PHEMT. The equivalent circuit elements for a proposed 18 elements model are determined directly from the measured S- parameters. The GA is used to extract the parameters of the proposed small-signal model from 0.5 up to 18 GHz.

Keywords: PHEMT, Genetic Algorithms, small signal modeling, optimization.

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Authors: S. Ben Said, K. Ben Saad, M. Benrejeb

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This paper deals with bifurcation analyses in current programmed DC/DC Boost converter and exhibition of chaotic behavior. This phenomenon occurs due to variation of a set of the studied circuit parameters (input voltage and a reference current). Two different types of bifurcation paths have been observed as part as part of another bifurcation arising from variation of suitable chosen parameter.

Keywords: Bifurcation, Chaos, Boost converter, Current- programmed control, Initial parameters.

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Authors: Rishikesh Pandey, Maneesha Gupta

Abstract:

A new low-voltage floating gate MOSFET (FGMOS) based squarer using square law characteristic of the FGMOS is proposed in this paper. The major advantages of the squarer are simplicity, rail-to-rail input dynamic range, low total harmonic distortion, and low power consumption. The proposed circuit is biased without body effect. The circuit is designed and simulated using SPICE in 0.25μm CMOS technology. The squarer is operated at the supply voltages of ±0.75V . The total harmonic distortion (THD) for the input signal 0.75Vpp at 25 KHz, and maximum power consumption were found to be less than 1% and 319μW respectively.

Keywords: Analog signal processing, floating gate MOSFETs, low-voltage, Spice, squarer.

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Authors: Ali Al-Ataby , Fawzi Al-Naima

Abstract:

Symbolic Circuit Analysis (SCA) is a technique used to generate the symbolic expression of a network. It has become a well-established technique in circuit analysis and design. The symbolic expression of networks offers excellent way to perform frequency response analysis, sensitivity computation, stability measurements, performance optimization, and fault diagnosis. Many approaches have been proposed in the area of SCA offering different features and capabilities. Numerical Interpolation methods are very common in this context, especially by using the Fast Fourier Transform (FFT). The aim of this paper is to present a method for SCA that depends on the use of Wavelet Transform (WT) as a mathematical tool to generate the symbolic expression for large circuits with minimizing the analysis time by reducing the number of computations.

Keywords: Numerical Interpolation, Sparse Matrices, SymbolicAnalysis, Wavelet Transform.

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