Search results for: Hardware/software integrated design
7008 A Study on the Developing Method of the BIM (Building Information Modeling) Software Based On Cloud Computing Environment
Authors: Byung-Kon Kim
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According as the Architecture, Engineering and Construction (AEC) Industry projects have grown more complex and larger, the number of utilization of BIM for 3D design and simulation is increasing significantly. Therefore, typical applications of BIM such as clash detection and alternative measures based on 3-dimenstional planning are expanded to process management, cost and quantity management, structural analysis, check for regulation, and various domains for virtual design and construction. Presently, commercial BIM software is operated on single-user environment, so initial cost is so high and the investment may be wasted frequently. Cloud computing that is a next-generation internet technology enables simple internet devices (such as PC, Tablet, Smart phone etc) to use services and resources of BIM software. In this paper, we suggested developing method of the BIM software based on cloud computing environment in order to expand utilization of BIM and reduce cost of BIM software. First, for the benchmarking, we surveyed successful case of BIM and cloud computing. And we analyzed needs and opportunities of BIM and cloud computing in AEC Industry. Finally, we suggested main functions of BIM software based on cloud computing environment and developed a simple prototype of cloud computing BIM software for basic BIM model viewing.
Keywords: Construction IT, BIM(Building Information Modeling), Cloud Computing, BIM Service Based Cloud Computing, Viewer Based BIM Server, 3D Design.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 41017007 Bioclimatic Design, Evaluation of Energy Behavior and Energy-Saving Interventions at the Theagenio Cancer Hospital
Authors: Emmanouel Koumoulas, Aikaterini Rokkou, Marios Moschakis
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Theagenio" in Thessaloniki exists and works for three centuries now as a hospital. Since 1975, it has been operating as an Integrated Special Cancer Hospital and since 1985 it has been integrated into the National Health System. "Theagenio" Cancer Hospital is located at the central web of Thessaloniki residential complex and consists of two buildings, the "Symeonidio Research Center", which was completed in 1962 and the Nursing Ward, a project that was later completed in 1975. This paper examines the design of the Hospital Unit according to the requirements of the energy design of buildings. Initially, the energy characteristics of the Hospital are recorded, followed by a detailed presentation of the electromechanical installations. After the existing situation has been captured and with the help of the software TEE-KENAK, different scenarios for the energy upgrading of the buildings have been studied. Proposals for upgrading concern both the shell, e.g. installation of external thermal insulation, replacement of frames, addition of shading systems, etc. as well as electromechanical installations, e.g. use of ceiling fans, improvements in heating and cooling systems, interventions in lighting, etc. The simulation calculates the future energy status of the buildings and presents the economic benefits of the proposed interventions with reference to the environmental profits that arise.Keywords: Energy consumption in hospitals, energy saving interventions, energy upgrading, hospital facilities.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 8447006 FPGA Implementation of RSA Encryption Algorithm for E-Passport Application
Authors: Khaled Shehata, Hanady Hussien, Sara Yehia
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Securing the data stored on E-passport is a very important issue. RSA encryption algorithm is suitable for such application with low data size. In this paper the design and implementation of 1024 bit-key RSA encryption and decryption module on an FPGA is presented. The module is verified through comparing the result with that obtained from MATLAB tools. The design runs at a frequency of 36.3 MHz on Virtex-5 Xilinx FPGA. The key size is designed to be 1024-bit to achieve high security for the passport information. The whole design is achieved through VHDL design entry which makes it a portable design and can be directed to any hardware platform.
Keywords: RSA, VHDL, FPGA, modular multiplication, modular exponential.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 54167005 Design and Implementation of a WiFi Based Home Automation System
Authors: Ahmed ElShafee, Karim Alaa Hamed
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This paper presents a design and prototype implementation of new home automation system that uses WiFi technology as a network infrastructure connecting its parts. The proposed system consists of two main components; the first part is the server (web server), which presents system core that manages, controls, and monitors users- home. Users and system administrator can locally (LAN) or remotely (internet) manage and control system code. Second part is hardware interface module, which provides appropriate interface to sensors and actuator of home automation system. Unlike most of available home automation system in the market the proposed system is scalable that one server can manage many hardware interface modules as long as it exists on WiFi network coverage. System supports a wide range of home automation devices like power management components, and security components. The proposed system is better from the scalability and flexibility point of view than the commercially available home automation systems.Keywords: Home automation, Wireless LAN, WiFi, MicroControllers
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 362987004 Hardware Implementations for the ISO/IEC 18033-4:2005 Standard for Stream Ciphers
Authors: Paris Kitsos
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In this paper the FPGA implementations for four stream ciphers are presented. The two stream ciphers, MUGI and SNOW 2.0 are recently adopted by the International Organization for Standardization ISO/IEC 18033-4:2005 standard. The other two stream ciphers, MICKEY 128 and TRIVIUM have been submitted and are under consideration for the eSTREAM, the ECRYPT (European Network of Excellence for Cryptology) Stream Cipher project. All ciphers were coded using VHDL language. For the hardware implementation, an FPGA device was used. The proposed implementations achieve throughputs range from 166 Mbps for MICKEY 128 to 6080 Mbps for MUGI.Keywords: Cryptography, ISO/IEC 18033-4:2005 standard, Hardware implementation, Stream ciphers
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18007003 An Improved Scheduling Strategy in Cloud Using Trust Based Mechanism
Authors: D. Sumathi, P. Poongodi
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Cloud Computing refers to applications delivered as services over the internet, and the datacenters that provide those services with hardware and systems software. These were earlier referred to as Software as a Service (SaaS). Scheduling is justified by job components (called tasks), lack of information. In fact, in a large fraction of jobs from machine learning, bio-computing, and image processing domains, it is possible to estimate the maximum time required for a task in the job. This study focuses on Trust based scheduling to improve cloud security by modifying Heterogeneous Earliest Finish Time (HEFT) algorithm. It also proposes TR-HEFT (Trust Reputation HEFT) which is then compared to Dynamic Load Scheduling.Keywords: Software as a Service (SaaS), Trust, Heterogeneous Earliest Finish Time (HEFT) algorithm, Dynamic Load Scheduling.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 21967002 Scheduling for a Reconfigurable Manufacturing System with Multiple Process Plans and Limited Pallets/Fixtures
Authors: Jae-Min Yu, Hyoung-Ho Doh, Ji-Su Kim, Dong-Ho Lee, Sung-Ho Nam
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A reconfigurable manufacturing system (RMS) is an advanced system designed at the outset for rapid changes in its hardware and software components in order to quickly adjust its production capacity and functionally. Among various operational decisions, this study considers the scheduling problem that determines the input sequence and schedule at the same time for a given set of parts. In particular, we consider the practical constraints that the numbers of pallets/fixtures are limited and hence a part can be released into the system only when the fixture required for the part is available. To solve the integrated input sequencing and scheduling problems, we suggest a priority rule based approach in which the two sub-problems are solved using a combination of priority rules. To show the effectiveness of various rule combinations, a simulation experiment was done on the data for a real RMS, and the test results are reported.Keywords: Reconfigurable manufacturing system, scheduling, priority rules, multiple process plans, pallets/fixtures
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18967001 A Real Time Development Study for Automated Centralized Remote Monitoring System at Royal Belum Forest
Authors: Amri Yusoff, Shahrizuan Shafiril, Ashardi Abas, Norma Che Yusoff
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Nowadays, illegal logging has been causing many effects including flash flood, avalanche, global warming, and etc. The purpose of this study was to maintain the earth ecosystem by keeping and regulate Malaysia’s treasurable rainforest by utilizing a new technology that will assist in real-time alert and give faster response to the authority to act on these illegal activities. The methodology of this research consisted of design stages that have been conducted as well as the system model and system architecture of the prototype in addition to the proposed hardware and software that have been mainly used such as microcontroller, sensor with the implementation of GSM, and GPS integrated system. This prototype was deployed at Royal Belum forest in December 2014 for phase 1 and April 2015 for phase 2 at 21 pinpoint locations. The findings of this research were the capture of data in real-time such as temperature, humidity, gaseous, fire, and rain detection which indicate the current natural state and habitat in the forest. Besides, this device location can be detected via GPS of its current location and then transmitted by SMS via GSM system. All of its readings were sent in real-time for further analysis. The data that were compared to meteorological department showed that the precision of this device was about 95% and these findings proved that the system is acceptable and suitable to be used in the field.Keywords: Remote monitoring system, forest data, GSM, GPS, wireless sensor.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16217000 The Effects of Software Size on Development Effort and Software Quality
Authors: Zhizhong Jiang, Peter Naudé, Binghua Jiang
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Effective evaluation of software development effort is an important issue during project plan. This study provides a model to predict development effort based on the software size estimated with function points. We generalize the average amount of effort spent on each phase of the development, and give the estimates for the effort used in software building, testing, and implementation. Finally, this paper finds a strong correlation between software defects and software size. As the size of software constantly increases, the quality remains to be a matter which requires major concern.
Keywords: Development effort, function points, software quality, software size.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 22836999 A Fully Parallel Reverse Converter
Authors: Mehdi Hosseinzadeh, Amir Sabbagh Molahosseini, Keivan Navi
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The residue number system (RNS) is popular in high performance computation applications because of its carry-free nature. The challenges of RNS systems design lie in the moduli set selection and in the reverse conversion from residue representation to weighted representation. In this paper, we proposed a fully parallel reverse conversion algorithm for the moduli set {rn - 2, rn - 1, rn}, based on simple mathematical relationships. Also an efficient hardware realization of this algorithm is presented. Our proposed converter is very faster and results to hardware savings, compared to the other reverse converters.Keywords: Reverse converter, residue to weighted converter, residue number system, multiple-valued logic, computer arithmetic.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15856998 Computer-Based Assessment of Pre-assigned Individual Education Plans in Special Education
Authors: Yasar Guneri Sahin, Mehmet Cudi Okur
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Assessment of IEP (Individual Education Plan) is an important stage in the area of special education. This paper deals with this problem by introducing computer software which process the data gathered from application of IEP. The software is intended to be used by special education institution in Turkey and allows assessment of school and family trainings. The software has a user friendly interface and its design includes graphical developer tools.Keywords: Disabled individual, software for education, assessment of education, special education.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16076997 Validation of Automotive Centrals Using Hardware in the Loop-Body Control Unit and Lights
Authors: Marley Rosa Luciano, Rodney Rezende Saldanha
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The race for electrification and the need for innovation to attract customers has led the automotive industry to do something different with vehicles. New emissions control challenges and efficient technological availability are the pillars of creation. The growing demand to upgrade industrial manufacturing systems creates actions that directly impact vehicle production. With this comes the search for new prototyping methods and virtual tools for component testing and validation, and vehicle systems have established themselves. The demand for Electronic Control Units (ECU) is increasing due to the availability of intelligence and safety in today's vehicles, directly affecting their development, performance, and functional testing. In order to keep up with global changes, the automotive industry uses different virtual environments to produce, verify and validate their vehicles and test prototypes used during development. Therefore, in this paper, integration and validation were performed using the Hardware in the Loop (HIL) test platform, focusing on the ECU Body Control Module (BCM). Then, a brief commentary reviews other test medium platforms, such as the Plywood Buck (PWB), and examines the reliability, flexibility, installation time, and cost of the three test platforms, software in the loop (SIL), Model in the loop (MIL), and HIL, to review their benefits, challenges, and issues in use and information to optimize the use of each platform and test medium.
Keywords: Automotive, Electronic Central Unit, xIL, Hardware in the loop.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3276996 Application of Generalized Taguchi and Design of Experiment Methodology for Rebar Production at an Integrated Steel Plant
Authors: S. B. V. S. P. Sastry, V. V. S. Kesava Rao
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In this paper, x-ray impact of Taguchi method and design of experiment philosophy to project relationship between various factors leading to output yield strength of rebar is studied. In bar mill of an integrated steel plant, there are two production lines called as line 1 and line 2. The metallic properties e.g. yield strength of finished product of the same material is varying for a particular grade material when rolled simultaneously in both the lines. A study has been carried out to set the process parameters at optimal level for obtaining equal value of yield strength simultaneously for both lines.
Keywords: Bar mill, design of experiment, Taguchi, yield strength.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20966995 Induction Heating Process Design Using Comsol® Multiphysics Software Version 4.2a
Authors: K. Djellabi, M. E. H. Latreche
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Induction heating computer simulation is a powerful tool for process design and optimization, induction coil design, equipment selection, as well as education and business presentations. The authors share their vast experience in the practical use of computer simulation for different induction heating and heat treating processes. In this paper treated with mathematical modeling and numerical simulation of induction heating furnaces with axisymmetric geometries for the numerical solution, we propose finite element methods combined with boundary (FEM) for the electromagnetic model using COMSOL® Multiphysics Software. Some numerical results for an industrial furnace are shown with high frequency.
Keywords: Numerical methods, Induction furnaces, Induction Heating, Finite element method, Comsol Multiphysics software.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 80566994 Simulation Based VLSI Implementation of Fast Efficient Lossless Image Compression System Using Adjusted Binary Code & Golumb Rice Code
Authors: N. Muthukumaran, R. Ravi
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The Simulation based VLSI Implementation of FELICS (Fast Efficient Lossless Image Compression System) Algorithm is proposed to provide the lossless image compression and is implemented in simulation oriented VLSI (Very Large Scale Integrated). To analysis the performance of Lossless image compression and to reduce the image without losing image quality and then implemented in VLSI based FELICS algorithm. In FELICS algorithm, which consists of simplified adjusted binary code for Image compression and these compression image is converted in pixel and then implemented in VLSI domain. This parameter is used to achieve high processing speed and minimize the area and power. The simplified adjusted binary code reduces the number of arithmetic operation and achieved high processing speed. The color difference preprocessing is also proposed to improve coding efficiency with simple arithmetic operation. Although VLSI based FELICS Algorithm provides effective solution for hardware architecture design for regular pipelining data flow parallelism with four stages. With two level parallelisms, consecutive pixels can be classified into even and odd samples and the individual hardware engine is dedicated for each one. This method can be further enhanced by multilevel parallelisms.
Keywords: Image compression, Pixel, Compression Ratio, Adjusted Binary code, Golumb Rice code, High Definition display, VLSI Implementation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 20736993 Java Based Automatic Curriculum Generator for Children with Trisomy 21
Authors: E. Supriyanto, S. C. Seow
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Early Intervention Program (EIP) is required to improve the overall development of children with Trisomy 21 (Down syndrome). In order to help trainer and parent in the implementation of EIP, a support system has been developed. The support system is able to screen data automatically, store and analyze data, generate individual EIP (curriculum) with optimal training duration and to generate training automatically. The system consists of hardware and software where the software has been implemented using Java language and Linux Fedora. The software has been tested to ensure the functionality and reliability. The prototype has been also tested in Down syndrome centers. Test result shows that the system is reliable to be used for generation of an individual curriculum which includes the training program to improve the motor, cognitive, and combination abilities of Down syndrome children under 6 years.Keywords: Early intervention program (curriculum), Trisomy21, support system, Java.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14586992 Efficient Hardware Realization of Truncated Multipliers using FPGA
Authors: Muhammad H. Rais,
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Truncated multiplier is a good candidate for digital signal processing (DSP) applications including finite impulse response (FIR) and discrete cosine transform (DCT). Through truncated multiplier a significant reduction in Field Programmable Gate Array (FPGA) resources can be achieved. This paper presents for the first time a comparison of resource utilization of Spartan-3AN and Virtex-5 implementation of standard and truncated multipliers using Very High Speed Integrated Circuit Hardware Description Language (VHDL). The Virtex-5 FPGA shows significant improvement as compared to Spartan-3AN FPGA device. The Virtex-5 FPGA device shows better performance with a percentage ratio of number of occupied slices for standard to truncated multipliers is increased from 40% to 73.86% as compared to Spartan- 3AN is decreased from 68.75% to 58.78%. Results show that the anomaly in Spartan-3AN FPGA device average connection and maximum pin delay have been efficiently reduced in Virtex-5 FPGA device.Keywords: Digital Signal Processing (DSP), FieldProgrammable Gate Array (FPGA), Spartan-3AN, TruncatedMultiplier, Virtex-5, VHDL.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 25616991 Architecture, Implementation and Application of Tools for Experimental Analysis
Authors: Tom Dowling, Adam Duffy
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This paper presents an architecture to assist in the development of tools to perform experimental analysis. Existing implementations of tools based on this architecture are also described in this paper. These tools are applied to the real world problem of fault attack emulation and detection in cryptographic algorithms.Keywords: Software Architectures and Design, Software Componentsand Reuse, Engineering Secure Software.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 14016990 Design of a 5-Joint Mechanical Arm with User-Friendly Control Program
Authors: Amon Tunwannarux, Supanunt Tunwannarux
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This paper describes the design concepts and implementation of a 5-Joint mechanical arm for a rescue robot named CEO Mission II. The multi-joint arm is a five degree of freedom mechanical arm with a four bar linkage, which can be stretched to 125 cm. long. It is controlled by a teleoperator via the user-friendly control and monitoring GUI program. With Inverse Kinematics principle, we developed the method to control the servo angles of all arm joints to get the desired tip position. By clicking the determined tip position or dragging the tip of the mechanical arm on the computer screen to the desired target point, the robot will compute and move its multi-joint arm to the pose as seen on the GUI screen. The angles of each joint are calculated and sent to all joint servos simultaneously in order to move the mechanical arm to the desired pose at once. The operator can also use a joystick to control the movement of this mechanical arm and the locomotion of the robot. Many sensors are installed at the tip of this mechanical arm for surveillance from the high level and getting the vital signs of victims easier and faster in the urban search and rescue tasks. It works very effectively and easy to control. This mechanical arm and its software were developed as a part of the CEO Mission II Rescue Robot that won the First Runner Up award and the Best Technique award from the Thailand Rescue Robot Championship 2006. It is a low cost, simple, but functioning 5-Jiont mechanical arm which is built from scratch, and controlled via wireless LAN 802.11b/g. This 5-Jiont mechanical arm hardware concept and its software can also be used as the basic mechatronics to many real applications.Keywords: Multi-joint, mechanical arm, inverse kinematics, rescue robot, GUI control program.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18176989 A Business Intelligence System Design Based on ASP Platform
Authors: Fengchi Shen, Rongtao Ding
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The Informational Infrastructures of small and medium-sized manufacturing enterprises are relatively poor, there are serious shortages of capitals which can be invested in informatization construction, computer hardware and software resources, and human resources. To address the informatization issue in small and medium-sized manufacturing enterprises, and enable them to the application of advanced management thinking and enhance their competitiveness, the paper establish a manufacturing-oriented small and medium-sized enterprises informatization platform based on the ASP business intelligence technology, which effectively improves the scientificity of enterprises decision and management informatization.
Keywords: ASP, business intelligence, data warehouse.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18056988 Control Strategy for an Active Suspension System
Authors: C. Alexandru, P. Alexandru
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The paper presents the virtual model of the active suspension system used for improving the dynamic behavior of a motor vehicle. The study is focused on the design of the control system, the purpose being to minimize the effect of the road disturbances (which are considered as perturbations for the control system). The analysis is performed for a quarter-car model, which corresponds to the suspension system of the front wheel, by using the DFC (Design for Control) software solution EASY5 (Engineering Analysis Systems) of MSC Software. The controller, which is a PIDbased device, is designed through a parametric optimization with the Matrix Algebra Tool (MAT), considering the gain factors as design variables, while the design objective is to minimize the overshoot of the indicial response.Keywords: Active suspension, Controller, Dynamics, Vehicle
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 22576987 A Comparison of Software Analysis and Design Methods for Real Time Systems
Authors: Anthony Spiteri Staines
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This paper examines and compares several of the most common real time methods. These methods are CORE, YSM, MASCOT, JSD, DARTS, RTSAD, ADARTS, CODARTS, HOOD, HRT-HOOD, ROOM, UML, UML-RT. The methods are compared using attributes like i) usability, ii) compositionality and iii) proper RT notations available. Finally some comparison results are given and discussed.Keywords: Software Engineering Methods, MethodComparison, Real Time Analysis and Design.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 37006986 An Improved Design of Area Efficient Two Bit Comparator
Authors: Shashank Gautam, Pramod Sharma
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In present era, development of digital circuits, signal processors and other integrated circuits, magnitude comparators are challenged by large area and more power consumption. Comparator is most basic circuit that performs comparison. This paper presents a technique to design a two bit comparator which consumes less area and power. DSCH and MICROWIND version 3 are used to design the schematic and design the layout of the schematic, observe the performance parameters at different nanometer technologies respectively.
Keywords: Chip design, consumed power, layout area, two bit comparator.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 12186985 New VLSI Architecture for Motion Estimation Algorithm
Authors: V. S. K. Reddy, S. Sengupta, Y. M. Latha
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This paper presents an efficient VLSI architecture design to achieve real time video processing using Full-Search Block Matching (FSBM) algorithm. The design employs parallel bank architecture with minimum latency, maximum throughput, and full hardware utilization. We use nine parallel processors in our architecture and each controlled by a state machine. State machine control implementation makes the design very simple and cost effective. The design is implemented using VHDL and the programming techniques we incorporated makes the design completely programmable in the sense that the search ranges and the block sizes can be varied to suit any given requirements. The design can operate at frequencies up to 36 MHz and it can function in QCIF and CIF video resolution at 1.46 MHz and 5.86 MHz, respectively.Keywords: Video Coding, Motion Estimation, Full-Search, Block-Matching, VLSI Architecture.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 18076984 Aspect Oriented Software Architecture
Authors: Pradip Peter Dey, Ronald F. Gonzales, Gordon W. Romney, Mohammad Amin, Bhaskar Raj Sinha
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Natural language processing systems pose a unique challenge for software architectural design as system complexity has increased continually and systems cannot be easily constructed from loosely coupled modules. Lexical, syntactic, semantic, and pragmatic aspects of linguistic information are tightly coupled in a manner that requires separation of concerns in a special way in design, implementation and maintenance. An aspect oriented software architecture is proposed in this paper after critically reviewing relevant architectural issues. For the purpose of this paper, the syntactic aspect is characterized by an augmented context-free grammar. The semantic aspect is composed of multiple perspectives including denotational, operational, axiomatic and case frame approaches. Case frame semantics matured in India from deep thematic analysis. It is argued that lexical, syntactic, semantic and pragmatic aspects work together in a mutually dependent way and their synergy is best represented in the aspect oriented approach. The software architecture is presented with an augmented Unified Modeling Language.Keywords: Language engineering, parsing, software design, user experience.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 17436983 CPU Architecture Based on Static Hardware Scheduler Engine and Multiple Pipeline Registers
Authors: Ionel Zagan, Vasile Gheorghita Gaitan
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The development of CPUs and of real-time systems based on them made it possible to use time at increasingly low resolutions. Together with the scheduling methods and algorithms, time organizing has been improved so as to respond positively to the need for optimization and to the way in which the CPU is used. This presentation contains both a detailed theoretical description and the results obtained from research on improving the performances of the nMPRA (Multi Pipeline Register Architecture) processor by implementing specific functions in hardware. The proposed CPU architecture has been developed, simulated and validated by using the FPGA Virtex-7 circuit, via a SoC project. Although the nMPRA processor hardware structure with five pipeline stages is very complex, the present paper presents and analyzes the tests dedicated to the implementation of the CPU and of the memory on-chip for instructions and data. In order to practically implement and test the entire SoC project, various tests have been performed. These tests have been performed in order to verify the drivers for peripherals and the boot module named Bootloader.
Keywords: Hardware scheduler, nMPRA processor, real-time systems, scheduling methods.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 10966982 Financial Analysis Analogies for Software Risk
Authors: Masood Uzzafer
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A dynamic software risk assessment model is presented. Analogies between dynamic financial analysis and software risk assessment models are established and based on these analogies it suggested that dynamic risk model for software projects is the way to move forward for the risk assessment of software project. It is shown how software risk assessment change during different phases of a software project and hence requires a dynamic risk assessment model to capture these variations. Further evolution of dynamic financial analysis models is discussed and mapped to the evolution of software risk assessment models.Keywords: Software Risk Assessment, Software ProjectManagement, Software Cost, Dynamic Modeling.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15546981 Cosastudio: A Software Architecture Modeling Tool
Authors: Adel Smeda, Adel Alti, Mourad Oussalah, Abdallah Boukerram
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A key aspect of the design of any software system is its architecture. An architecture description provides a formal model of the architecture in terms of components and connectors and how they are composed together. COSA (Component-Object based Software Structures), is based on object-oriented modeling and component-based modeling. The model improves the reusability by increasing extensibility, evolvability, and compositionality of the software systems. This paper presents the COSA modelling tool which help architects the possibility to verify the structural coherence of a given system and to validate its semantics with COSA approach.Keywords: Software Architecture, Architecture Description Languages, UML, Components, Connectors.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 16826980 High Level Characterization and Optimization of Switched-Current Sigma-Delta Modulators with VHDL-AMS
Authors: A. Fakhfakh, N. Ksentini, M. Loulou, N. Masmoudi, J. J. Charlot
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Today, design requirements are extending more and more from electronic (analogue and digital) to multidiscipline design. These current needs imply implementation of methodologies to make the CAD product reliable in order to improve time to market, study costs, reusability and reliability of the design process. This paper proposes a high level design approach applied for the characterization and the optimization of Switched-Current Sigma- Delta Modulators. It uses the new hardware description language VHDL-AMS to help the designers to optimize the characteristics of the modulator at a high level with a considerably reduced CPU time before passing to a transistor level characterization.Keywords: high level design, optimization, switched-Current Sigma-Delta Modulators, VHDL-AMS.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 15186979 A Formal Approach for Instructional Design Integrated with Data Visualization for Learning Analytics
Authors: Douglas A. Menezes, Isabel D. Nunes, Ulrich Schiel
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Most Virtual Learning Environments do not provide support mechanisms for the integrated planning, construction and follow-up of Instructional Design supported by Learning Analytic results. The present work aims to present an authoring tool that will be responsible for constructing the structure of an Instructional Design (ID), without the data being altered during the execution of the course. The visual interface aims to present the critical situations present in this ID, serving as a support tool for the course follow-up and possible improvements, which can be made during its execution or in the planning of a new edition of this course. The model for the ID is based on High-Level Petri Nets and the visualization forms are determined by the specific kind of the data generated by an e-course, a population of students generating sequentially dependent data.
Keywords: Educational data visualization, high-level petri nets, instructional design, learning analytics.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 849