Search results for: biasing circuits

Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

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The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

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Authors: Dawit Burusie Abdi, Mamidala Jagadesh Kumar

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In this paper, using 2D TCAD simulations, the application of a dual material gate (DMG) for suppressing ambipolar conduction in a tunnel field effect transistor (TFET) is demonstrated. Using the proposed DMG concept, the ambipolar conduction can be effectively suppressed even if the drain doping is as high as that of the source doping. Achieving this symmetrical doping, without the ambipolar conduction in TFETs, gives the advantage of realizing both n-type and p-type devices with the same doping sequences. Furthermore, the output characteristics of the DMG TFET exhibit a good saturation when compared to that of the gate-drain underlap approach. This improved behavior of the DMG TFET makes it a good candidate for inverter based logic circuits.

Keywords: dual material gate, suppressing ambipolar current, symmetrically doped TFET, tunnel FETs, PNPN TFET

Procedia PDF Downloads 368

Authors: Diego Tancara, Raul Coto, Ariel Norambuena, Hoseein T. Dinani, Felipe Fanchini

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Quantum machine learning is a growing research field that aims to perform machine learning tasks assisted by a quantum computer. Kernel-based quantum machine learning models are paradigmatic examples where the kernel involves quantum states, and the Gram matrix is calculated from the overlapping between these states. With the kernel at hand, a regular machine learning model is used for the learning process. In this paper we investigate the quantum support vector machine and quantum kernel ridge models to predict the degree of non-Markovianity of a quantum system. We perform digital quantum simulation of amplitude damping and phase damping channels to create our quantum dataset. We elaborate on different kernel functions to map the data and kernel circuits to compute the overlapping between quantum states. We observe a good performance of the models.

Keywords: quantum, machine learning, kernel, non-markovianity

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Authors: Jong-Jy Shyu, Soo-Chang Pei, Yun-Da Huang

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In this paper, design of wide-range variable fractional-delay (WR-VFD) finite impulse response (FIR) digital filters is proposed. With respect to the conventional VFD filter which is designed such that its delay is adjustable within one unit, the proposed VFD FIR filter is designed such that its delay can be tunable within a wider range. By the traces of coefficients of the fractional-delay FIR filter, it is found that the conventional method of polynomial substitution for filter coefficients no longer satisfies the design demand, and the circuits perform the sinc function (sinc converter) are added to overcome this problem. In this paper, least-squares method is adopted to design WR-VFD FIR filter. Throughout this paper, several examples will be proposed to demonstrate the effectiveness of the presented methods.

Keywords: digital filter, FIR filter, variable fractional-delay (VFD) filter, least-squares approximation

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Authors: Zakir Husain, Deepak Kumar

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The harmonics are very harmful within an electrical system and can have serious consequences such as reducing the life of apparatus, stress on cable and equipment etc. This paper cites extensive analytical study of harmonic characteristics of multiphase (six-phase) and three-phase system equipped with two and three level inverters for non-linear loads. Multilevel inverter has elevated voltage capability with voltage limited devices, low harmonic distortion, abridged switching losses. Multiphase technology also pays a promising role in harmonic reduction. Matlab simulation is carried out to compare the advantage of multi-phase over three phase systems equipped with two or three level inverters for non-linear load harmonic reduction. The extensive simulation results are presented based on case studies.

Keywords: fast Fourier transform (FFT), harmonics, inverter, ripples, total harmonic distortion (THD)

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Authors: Md. Asaduzzaman

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A Silicon-on-insulator (SOI) perfectly vertical fibre-to-chip grating coupler is proposed and designed based on engineered subwavelength structures. The high directionality of the coupler is achieved by implementing step gratings to realize asymmetric diffraction and by applying effective index variation with auxiliary ultra-subwavelength gratings. The proposed structure is numerically analysed by using two-dimensional Finite Difference Time Domain (2D FDTD) method and achieves 96% (-0.2 dB) coupling efficiency and 39 nm 1-dB bandwidth. This highly efficient GC is necessary for applications where coupling efficiency between the optical fibre and nanophotonics waveguide is critically important, for instance, experiments of the quantum photonics integrated circuits. Such efficient and broadband perfectly vertical grating couplers are also significantly advantageous in highly dense photonic packaging.

Keywords: diffraction grating, FDTD, grating couplers, nanophotonic

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Authors: Abbas Ebrahimi, Mohammad Zandsalimy

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The main purpose of this study is to investigate the feasibility of using FPGA (Field Programmable Gate Arrays) chips as alternatives for the conventional CPUs to accelerate the numerical solution of the Laplace equation. FPGA is an integrated circuit that contains an array of logic blocks, and its architecture can be reprogrammed and reconfigured after manufacturing. Complex circuits for various applications can be designed and implemented using FPGA hardware. The reconfigurable hardware used in this paper is an SoC (System on a Chip) FPGA type that integrates both microprocessor and FPGA architectures into a single device. In the present study the Laplace equation is implemented and solved numerically on both reconfigurable hardware and CPU. The precision of results and speedups of the calculations are compared together. The computational process on FPGA, is up to 20 times faster than a conventional CPU, with the same data precision. An analytical solution is used to validate the results.

Keywords: accelerating numerical solutions, CFD, FPGA, hardware definition language, numerical solutions, reconfigurable hardware

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Authors: Mauricio George Miguel Jardini, Jose Antonio Jardini

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Transmission power utilities participate with kilometers of circuits, many with particularities in terms of vegetation growth. To control these rights-of-way, maintenance teams perform ground, and air inspections, and the identification method is subjective (indirect). On a ground inspection, when identifying an irregularity, for example, high vegetation threatening contact with the conductor cable, pruning or suppression is performed immediately. In an aerial inspection, the suppression team is mobilized to the identified point. This work investigates the use of 3D modeling of a transmission line segment using RGB (red, blue, and green) images and LiDAR (Light Detection and Ranging) sensor data. Both sensors are coupled to unmanned aerial vehicle. The goal is the accurate and timely detection of vegetation along the right-of-way that can cause shutdowns.

Keywords: 3D modeling, LiDAR, right-of-way, transmission lines, vegetation

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Authors: T. Angeline Priyanka, R. Ganesan

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Recent trends in microelectronics technology have gradually changed the strategies used in very large scale integration (VLSI) circuits. Complementary Metal Oxide Semiconductor (CMOS) technology has been the industry standard for implementing VLSI device for the past two decades, but due to scale-down issues of ultra-low dimension achievement is not achieved so far. Hence it paved a way for Quantum Cellular Automata (QCA). It is only one of the many alternative technologies proposed as a replacement solution to the fundamental limit problem that CMOS technology will impose in the years to come. In this brief, presented a new adder that possesses high speed of operation occupying less area is proposed. This adder is designed especially for error tolerant application. Hence in the proposed adder, the overall area (cell count) and simulation time are reduced by 88 and 73 percent respectively. Various results of the proposed adder are shown and described.

Keywords: quantum cellular automata, carry look ahead adder, ripple carry adder, lossy application, majority gate, crossover

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Authors: Gaurav Prabhudesai, Shaurya Kaushal, Pulkit Dubey, B. D. Pant

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The current race of miniaturization of circuits, systems, modules and networks has resulted in portable and mobile wireless systems having tremendous capabilities with small volume and weight. The power drivers or the power pack, electrically driving these modules have also reduced in proportion. Normally, the power packs in these mobile or fixed systems are batteries, rechargeable or non-rechargeable, which need regular replacement or recharging. Another approach to power these modules is to utilize the ambient energy available for electrical driving to make the system self-sustained. The current paper presents an overview of the different MEMS (Micro-Electro-Mechanical Systems) based techniques used for the harvesting of vibration energy to electrically drive a WSN (wireless sensor network) or a mobile module. This kind of system would have enormous applications, the most significant one, may be in cell phones.

Keywords: energy harvesting, WSN, MEMS, piezoelectrics

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Authors: N. Massoum, A. Guen. Bouazza, B. Bouazza, A. El Ouchdi

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The progress of industry integrated circuits in recent years has been pushed by continuous miniaturization of transistors. With the reduction of dimensions of components at 0.1 micron and below, new physical effects come into play as the standard simulators of two dimensions (2D) do not consider. In fact the third dimension comes into play because the transverse and longitudinal dimensions of the components are of the same order of magnitude. To describe the operation of such components with greater fidelity, we must refine simulation tools and adapted to take into account these phenomena. After an analytical study of the static characteristics of the component, according to the different operating modes, a numerical simulation is performed of field-effect transistor with submicron gate MESFET GaInP. The influence of the dimensions of the gate length is studied. The results are used to determine the optimal geometric and physical parameters of the component for their specific applications and uses.

Keywords: Monte Carlo simulation, transient electron transport, MESFET device, GaInP

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Authors: Rainer Goetz, Zahra Ahaliabadeh, Princess S. Llanos, Aliaksandr S. Bandarenka, Tanja Kallio

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In order to understand the electrochemistry of all-solid-state batteries (ASSBs), the use of electrochemical equivalent circuits with a physical meaning is essential. A model battery is needed whose characterization is independent of the influence of the complex battery assembly. Lithium-Ion Conducting Glass-Ceramic (LICGC), a model solid electrolyte, is chosen for its stability in the air, but on the other hand, it is also well-known for its instability against metallic lithium upon direct contact. Hence, as a first step towards a model ASSB, the interface between lithium and the solid electrolyte (SE) is stabilized with thin (5 nm and 10 nm) coatings of titanium oxide (TO) and lithium titanium oxide (LTO). Impedance data shows that both materials are able to protect the SE surface from rapid degradation due to reducing lithium and, therefore, can serve as a protective interlayer on the anode side of a model ASSB.

Keywords: all-solid-state battery, lithium anode, solid electrolytes, interlayers

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Authors: Khaled Yahia

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This paper deals with the problem of stator faults diagnosis in induction motors. Using the discrete wavelet transform (DWT) for the current Park’s vector modulus (CPVM) analysis, the inter-turn short-circuit faults diagnosis can be achieved. This method is based on the decomposition of the CPVM signal, where wavelet approximation and detail coefficients of this signal have been extracted. The energy evaluation of a known bandwidth detail permits to define a fault severity factor (FSF). This method has been tested through the simulation of an induction motor using a mathematical model based on the winding-function approach. Simulation, as well as experimental, results show the effectiveness of the used method.

Keywords: induction motors (IMs), inter-turn short-circuits diagnosis, discrete wavelet transform (DWT), current park’s vector modulus (CPVM)

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Authors: Jérôme de Reffye, Marc Antoni

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Following the development of the ERTMS system, we think it is interesting to develop another software-based track circuit system which would fit secondary railway lines with an easy-to-work implementation and a low sensitivity to rail-wheel impedance variations. We called this track circuit 'Track Railway by Automatic Circuits.' To be internationally implemented, this system must not have any mechanical component and must be compatible with existing track circuit systems. For example, the system is independent from the French 'Joints Isolants Collés' that isolate track sections from one another, and it is equally independent from component used in Germany called 'Counting Axles,' in French 'compteur d’essieux.' This track circuit is fully interoperable. Such universality is obtained by replacing the train detection mechanical system with a space-time filtering of train position. The various track sections are defined by the frequency of a continuous signal. The set of frequencies related to the track sections is a set of orthogonal functions in a Hilbert Space. Thus the failure probability of track sections separation is precisely calculated on the basis of signal-to-noise ratio. SNR is a function of the level of traction current conducted by rails. This is the reason why we developed a very powerful algorithm to reject noise and jamming to obtain an SNR compatible with the precision required for the track circuit and SIL 4 level. The SIL 4 level is thus reachable by an adjustment of the set of orthogonal functions. Our major contributions to railway engineering signalling science are i) Train space localization is precisely defined by a calibration system. The operation bypasses the GSM-R radio system of the ERTMS system. Moreover, the track circuit is naturally protected against radio-type jammers. After the calibration operation, the track circuit is autonomous. ii) A mathematical topology adapted to train space localization by following the train through a linear time filtering of the received signal. Track sections are numerically defined and can be modified with a software update. The system was numerically simulated, and results were beyond our expectations. We achieved a precision of one meter. Rail-ground and rail-wheel impedance sensitivity analysis gave excellent results. Results are now complete and ready to be published. This work was initialised as a research project of the French Railways developed by the Pi-Ramses Company under SNCF contract and required five years to obtain the results. This track circuit is already at Level 3 of the ERTMS system, and it will be much cheaper to implement and to work. The traffic regulation is based on variable length track sections. As the traffic growths, the maximum speed is reduced, and the track section lengths are decreasing. It is possible if the elementary track section is correctly defined for the minimum speed and if every track section is able to emit with variable frequencies.

Keywords: track section, track circuits, space-time crossing, adaptive track section, automatic railway signalling

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Authors: Mahdiar Hosseighadiry, Farnaz Fotovatikhah, Razali Ismail, Mohsen Khaledian, Mehdi Saeidemanesh

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In this paper, a new low-power high-performance full adder is presented based on a new design method. The proposed method relies on pass gate design and provides full-swing circuits with minimum number of transistors. The method has been applied on SUM, COUT and XOR-XNOR modules resulting on rail-to-rail intermediate and output signals with no feedback transistors. The presented full adder cell has been simulated in 45 and 32 nm CMOS technologies using HSPICE considering parasitic capacitance and compared to several well-known designs from literature. In addition, the proposed cell has been extensively evaluated with different output loads, supply voltages, temperatures, threshold voltages, and operating frequencies. Results show that it functions properly under all mentioned conditions and exhibits less PDP compared to other design styles.

Keywords: full adders, low-power, high-performance, VLSI design

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Authors: Jacqueline Kunzelman, Val Anderson, Robert Johnson, Nicholas Anderson, Rebecca Bates

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In an effort to protect honeybees from colony collapse disorder, beekeepers are filing for government permits to use natural lands as summer pasture for honeybees under the multiple-use management regime in the United States. Utilizing natural landscapes in high mountain ranges may help strengthen honeybee colonies, as this natural setting is generally void of chemical pollutants and pesticides that are found in agricultural and urban settings. However, the introduction of a competitive species could greatly impact the native species occupying these natural landscapes. While honeybees and butterflies have different life histories, behavior, and foraging strategies, they compete for the same nectar resources. Few, if any, studies have focused on the potential population effects of commercial honeybees on native butterfly abundance and diversity. This study attempts to observe this impact using a paired before-after control-impact (BACI) design. Over the course of two years, malaise trap samples were collected every week during the months of the flowering season in two similar areas separated by 11 kilometers. Each area contained nine malaise trap sites for replication. In the first year, samples were taken to analyze and establish trends within the pollinating communities. In the second year, honeybees were introduced to only one of the two areas, and a change in trends between the two areas was assessed. Contrary to the original hypothesis, the resulting observation was an overall significant increase in the mean butterfly abundance in the impact areas after honeybees were introduced, while control areas remained relatively stable. This overall increase in abundance over the season can be attributed to an increase in butterflies during the first and second periods of the data collection when populations were near their peak. Several potential theories are 1) Honeybees are deterring a natural predator/competitor of butterflies that previously limited population growth. 2) Honeybees are consuming resources regularly used by butterflies, which may extend the foraging time and consequent capture rates of butterflies. 3) Environmental factors such as number of rainy days were inconsistent between control and impact areas, biasing capture rates. This ongoing research will help determine the suitability of high mountain ranges for the summer pasturing of honeybees and the population impacts on many different pollinators.

Keywords: butterfly, competition, honeybee, pollinator

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Authors: Loubna Tani, Nabih Elouzzani

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Crosstalk among interconnects and printed-circuit board (PCB) traces is a major limiting factor of signal quality in high-speed digital and communication equipments especially when fast data buses are involved. Such a bus is considered as a planar multiconductor transmission line. This paper will demonstrate how the finite difference time domain (FDTD) method provides an exact solution of the transmission-line equations to analyze the near end and the far end crosstalk. In addition, this study makes it possible to analyze the rise time effect on the near and far end voltages of the victim conductor. The paper also discusses a statistical analysis, based upon a set of several simulations. Such analysis leads to a better understanding of the phenomenon and yields useful information.

Keywords: multiconductor transmission line, crosstalk, finite difference time domain (FDTD), printed-circuit board (PCB), rise time, statistical analysis

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Authors: Takoua Soltani, Imen Soltani, Taoufik Aguili

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The communications' and radar systems' demands give rise to new developments in the domain of active integrated antennas (AIA) and arrays. The main advantages of AIA arrays are the simplicity of fabrication, low cost of manufacturing, and the combination between free space power and the scanner without a phase shifter. The integrated active antenna modeling is the coupling between the electromagnetic model and the transport model that will be affected in the high frequencies. Global modeling of active circuits is important for simulating EM coupling, interaction between active devices and the EM waves, and the effects of EM radiation on active and passive components. The current review focuses on the modeling of the active element which is a MESFET transistor immersed in a rectangular waveguide. The proposed EM analysis is based on the Method of Moments combined with the Generalised Equivalent Circuit method (MOM-GEC). The Method of Moments which is the most common and powerful software as numerical techniques have been used in resolving the electromagnetic problems. In the class of numerical techniques, MOM is the dominant technique in solving of Maxwell and Transport’s integral equations for an active integrated antenna. In this situation, the equivalent circuit is introduced to the development of an integral method formulation based on the transposition of field problems in a Generalised equivalent circuit that is simpler to treat. The method of Generalised Equivalent Circuit (MGEC) was suggested in order to represent integral equations circuits that describe the unknown electromagnetic boundary conditions. The equivalent circuit presents a true electric image of the studied structures for describing the discontinuity and its environment. The aim of our developed method is to investigate the antenna parameters such as the input impedance and the current density distribution and the electric field distribution. In this work, we propose a global EM modeling of the MESFET AsGa transistor using an integral method. We will begin by describing the modeling structure that allows defining an equivalent EM scheme translating the electromagnetic equations considered. Secondly, the projection of these equations on common-type test functions leads to a linear matrix equation where the unknown variable represents the amplitudes of the current density. Solving this equation resulted in providing the input impedance, the distribution of the current density and the electric field distribution. From electromagnetic calculations, we were able to present the convergence of input impedance for different test function number as a function of the guide mode numbers. This paper presents a pilot study to find the answer to map out the variation of the existing current evaluated by the MOM-GEC. The essential improvement of our method is reducing computing time and memory requirements in order to provide a sufficient global model of the MESFET transistor.

Keywords: active integrated antenna, current density, input impedance, MESFET transistor, MOM-GEC method

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Authors: Muhammad Awais Kiani, Maryam Kiani

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In today's digital age, the field of electronics engineering is experiencing unprecedented growth and innovation. To keep pace with this rapidly evolving industry, effective sales and marketing strategies are crucial, especially when combined with the power of e-commerce. This study explores the significance of integrating sales and marketing techniques with e-commerce platforms in the context of electronics engineering. It highlights the benefits, challenges, and best practices in leveraging e-commerce for sales and marketing in this industry. By embracing e-commerce, electronics engineering companies can reach a wider customer base, enhance brand visibility, and personalize customer experiences. Furthermore, this abstract delves into the importance of utilizing digital marketing tools such as search engine optimization (SEO), social media marketing, and content creation to optimize online sales. Therefore, this research aims to provide insights and recommendations for electronics engineering professionals to effectively navigate the dynamic landscape of sales and marketing in conjunction with e-commerce.

Keywords: electronics engineering, marketing, sales, E-commerce

Procedia PDF Downloads 74

Authors: K. Yahia, A. Titaouine, A. Ghoggal, S. E. Zouzou, F. Benchabane

Abstract:

This paper deals with the problem of stator faults diagnosis in induction motors. Using the discrete wavelet transform (DWT) for the current Park’s vector modulus (CPVM) analysis, the inter-turn short-circuit faults diagnosis can be achieved. This method is based on the decomposition of the CPVM signal, where wavelet approximation and detail coefficients of this signal have been extracted. The energy evaluation of a known bandwidth detail permits to define a fault severity factor (FSF). This method has been tested through the simulation of an induction motor using a mathematical model based on the winding-function approach. Simulation, as well as experimental, results show the effectiveness of the used method.

Keywords: Induction Motors (IMs), inter-turn short-circuits diagnosis, Discrete Wavelet Transform (DWT), Current Park’s Vector Modulus (CPVM)

Procedia PDF Downloads 549

Authors: Mohammad Reza Ebrahimi

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In new restructured power systems, swift fault detection is very important. The parallel transmission-lines are vastly used in this kind of power systems because of high amount of energy transferring. In this paper, a method based on the comparison of two schemes, i.e., i) maximum magnitude of travelling-wave (TW) energy ii) the instants of maximum energy occurrence at the circuits of parallel transmission-line is proposed. Using the travelling-wave of fault in order to faulted line identification this method has noticeable operation time. Moreover, the algorithm can cover for identification of faults as external or internal faults. For an internal fault, the exact location of the fault can be estimated confidently. A lot of simulations have been done with PSCAD/EMTDC to verify the performance of the proposed algorithm.

Keywords: travelling-wave, maximum energy, parallel transmission-line, fault location

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Authors: Emanuela Paranhos Lima, Vitaly Félix Rodríguez Esquerre

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In this work, efficient directional coupler composed of dielectric waveguides and metallic film has been analyzed in details by simulations using finite element method (FEM). The structure consists of a step-index fiber with dielectric core, silica cladding, and a metal nanowire parallel to the core. The results show that an efficient conversion of optical dielectric modes to long range plasmonic is possible. Low insertion losses in conjunction with short coupling length and a broadband operation can be achieved under certain conditions. This kind of couplers has potential applications for the design of photonic integrated circuits for signal routing between dielectric/plasmonic waveguides, sensing, lithography, and optical storage systems. A high efficient focusing of light in a very small region can be obtained.

Keywords: directional coupler, finite element method, metallic nanowire, plasmonic, surface plasmon polariton, superfocusing

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Authors: Taha Ahmed Husain

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The dynamic characteristics such as speed and torque as well as voltages and currents of pwm brushless DC motor inverter are analyzed with a MATLAB model. The contribution of external load torque and friction torque is monitored. The switching function technique is adopted for the current control of the embedded three phase inverter that drives the brushless DC motor.In switching functions the power conversions circuits can be modeled according to their functions rather than circuit topologies. Therefore, it can achieve simplification of the overall power conversion functions. The trapezoidal type (back emf) is used in the model as ithas lower switching loss compared with sinusoidal type (back emf). Results show reliable time analysis for speed, torque, phase and line voltages and currents and the effect of current commutation is clearly observed.

Keywords: BLDC motor, brushless dc motors, pwm inverter, DC motor control, trapezoidal back emf, ripple torque in brushless DC motor

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Authors: A. A. Behroozpoor, M. M. Mazarei

Abstract:

In this paper, a fuzzy recurrent neural network is proposed for solving the classical quadratic control problem subject to linear equality and bound constraints. The convergence of the state variables of the proposed neural network to achieve solution optimality is guaranteed.

Keywords: REFERENCES [1] Xia, Y, A new neural network for solving linear and quadratic programming problems. IEEE Transactions on Neural Networks, 7(6), 1996, pp.1544–1548. [2] Xia, Y., & Wang, J, A recurrent neural network for solving nonlinear convex programs subject to linear constraints. IEEE Transactions on Neural Networks, 16(2), 2005, pp. 379–386. [3] Xia, Y., H, Leung, & J, Wang, A projection neural network and its application to constrained optimization problems. IEEE Transactions Circuits and Systems-I, 49(4), 2002, pp.447–458.B. [4] Q. Liu, Z. Guo, J. Wang, A one-layer recurrent neural network for constrained seudoconvex optimization and its application for dynamic portfolio optimization. Neural Networks, 26, 2012, pp. 99-109.

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Authors: Isao Tomita

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The principle of all-silicon Raman lasers for an output wavelength of 1.3 μm is presented, which employs quasi-phase-matched structures and resonators to enhance the output power. 1.3-μm laser beams for GE-PONs in FTTH systems generated from a silicon device are very important because such a silicon device can be monolithically integrated with the silicon planar lightwave circuits (Si PLCs) used in the GE-PONs. This reduces the device fabrication processes and time and also optical losses at the junctions between optical waveguides of the Si PLCs and Si laser devices when compared with 1.3-μm III-V semiconductor lasers set on the Si PLCs employed at present. We show that the quasi-phase-matched Si Raman laser with resonators can produce about 174 times larger laser power at 1.3 μm (at maximum) than that without resonators for a Si waveguide of Raman gain 20 cm/GW and optical loss 1.2 dB/cm, pumped at power 10 mW, where the length of the waveguide is 3 mm and its cross-section is (1.5 μm)2.

Keywords: All-Silicon Raman Laser, FTTH, GE-PON, Quasi-Phase-Matched Structure, resonator

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Authors: Christian Ihwiwhu, Nnamdi Obioha, Udeme John, Edward Bobade, Oghenerunor Bekibele, Adedeji Awujoola, Ibi-Ada Itotoi

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Understanding the complexity in the distribution of hydrocarbon in a simple structure with flow baffles and connectivity issues is critical in targeting and developing the remaining pay in a mature asset. Subtle facies changes (heterogeneity) can have a drastic impact on reservoir fluids movement, and this can be crucial to identifying sweet spots in mature fields. This study aims to evaluate selected reservoirs in Ovhor Field, Niger Delta, Nigeria, with the objective of optimising production from the field by targeting undeveloped oil reserves, bypassed pay, and gaining an improved understanding of the selected reservoirs to increase the company’s reservoir limits. The task at the Ovhor field is complicated by poor stratigraphic seismic resolution over the field. 3-D geological (sedimentology and stratigraphy) interpretation, use of results from quantitative interpretation, and proper understanding of production data have been used in recognizing flow baffles and undeveloped compartments in the field. The full field 3-D model has been constructed in such a way as to capture heterogeneities and the various compartments in the field to aid the proper simulation of fluid flow in the field for future production prediction, proper history matching and design of good trajectories to adequately target undeveloped oil in the field. Reservoir property models (porosity, permeability, and net-to-gross) have been constructed by biasing log interpreted properties to a defined environment of deposition model whose interpretation captures the heterogeneities expected in the studied reservoirs. At least, two scenarios have been modelled for most of the studied reservoirs to capture the range of uncertainties we are dealing with. The total original oil in-place volume for the four reservoirs studied is 157 MMstb. The cumulative oil and gas production from the selected reservoirs are 67.64 MMstb and 9.76 Bscf respectively, with current production rate of about 7035 bopd and 4.38 MMscf/d (as at 31/08/2019). Dynamic simulation and production forecast on the 4 reservoirs gave an undeveloped reserve of about 3.82 MMstb from two (2) identified oil restoration activities. These activities include side-tracking and re-perforation of existing wells. This integrated approach led to the identification of bypassed oil in some areas of the selected reservoirs and an improved understanding of the studied reservoirs. New wells have/are being drilled now to test the results of our studies, and the results are very confirmatory and satisfying.

Keywords: facies, flow baffle, bypassed pay, heterogeneities, history matching, reservoir limit

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Authors: Po-Hui Yang, Jing-Min Chen, Po-Yu Kuo, Chia-Chun Wu

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This paper proposed a high resolution Vernier Delay Line (VDL) measurement circuit with coarse and fine detection mechanism, which improved the trade-off problem between high resolution and less delay cells in traditional VDL circuits. And the measuring time of proposed measurement circuit is also under the high resolution requests. At first, the testing range of input signal which proposed high resolution delay line is detected by coarse detection VDL. Moreover, the delayed input signal is transmitted to fine detection VDL for measuring value with better accuracy. This paper is implemented at 0.18μm process, operating frequency is 100 MHz, and the resolution achieved 2.0 ps with only 16-stage delay cells. The test range is 170ps wide, and 17% stages saved compare with traditional single delay line circuit.

Keywords: vernier delay line, D-type flip-flop, DFF, metastable phenomenon

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Authors: Miroslav Popelka, Jakub Nožička

Abstract:

In this paper we deal with using Lego Mindstorms in simulation of robotic systems with respect to cost reduction. Lego Mindstorms kit contains broad variety of hardware components which are required to simulate, program and test the robotics systems in practice. Algorithm programming went in development environment supplied together with Lego kit as in programming language C# as well. Algorithm following the line, which we dealt with in this paper, uses theoretical findings from area of controlling circuits. PID controller has been chosen as controlling circuit whose individual components were experimentally adjusted for optimal motion of robot tracking the line. Data which are determined to process by algorithm are collected by sensors which scan the interface between black and white surfaces followed by robot. Based on discovered facts Lego Mindstorms can be considered for low-cost and capable kit to simulate real robotics systems.

Keywords: LEGO Mindstorms, PID controller, low-cost robotics systems, line follower, sensors, programming language C#, EV3 Home Edition Software

Procedia PDF Downloads 373

Authors: Ioan Rusu

Abstract:

In the operation of power transformers of 110 kV/MV from substations, these are traveled by fault current resulting from MV line damage. Defect electrical contacts are heated when they are travelled from fault currents. In the case of high temperatures when 135 °C is reached, the electrical insulating oil in the vicinity of the electrical faults comes into contact with these contacts releases gases, and activates the electrical protection. To avoid auto-flammability of electro-insulating oil, we designed a security system thermal of electrical contact defects by pouring fire-resistant polyurethane foam, mastic or mortar fire inside a cardboard electro-insulating cylinder. From practical experience, in the exploitation of power transformers of 110 kV/MT in oil electro-insulating were recorded some passing disconnecting commanded by the gas protection at internal defects. In normal operation and in the optimal load, nominal currents do not require thermal secure contacts inside electrical transformers, contacts are made at the fabrication according to the projects or to repair by solder. In the case of external short circuits close to the substation, the contacts inside electrical transformers, even if they are well made in sizes of Rcontact = 10^‑6 Ω, are subjected to short-circuit currents of the order of 10 kA-20 kA which lead to the dissipation of some significant second-order electric powers, 100 W-400 W, on contact. At some internal or external factors which action on electrical contacts, including electrodynamic efforts at short-circuits, these factors could be degraded over time to values in the range of 10^-4 Ω to 10^-5 Ω and if the action time of protection is great, on the order of seconds, power dissipation on electrical contacts achieve high values of 1,0 kW to 40,0 kW. This power leads to strong local heating, hundreds of degrees Celsius and can initiate self-ignition and burning oil in the vicinity of electro-insulating contacts with action the gas relay. Degradation of electrical contacts inside power transformers may not be limited for the duration of their operation. In order to avoid oil burn with gas release near electrical contacts, at short-circuit currents 10 kA-20 kA, we have outlined the following solutions: covering electrical contacts in fireproof materials that would avoid direct burn oil at short circuit and transmission of heat from electrical contact along the conductors with heat dissipation gradually over time, in a large volume of cooling. Flame retardant materials are: polyurethane foam, mastic, cement (concrete). In the normal condition of operation of transformer, insulating of conductors coils is with paper and insulating oil. Ignition points of its two components respectively are approximated: 135 °C heat for oil and 200 ⁰C for paper. In the case of a faulty electrical contact, about 10^-3 Ω, at short-circuit; the temperature can reach for a short time, a value of 300 °C-400 °C, which ignite the paper and also the oil. By burning oil, there are local gases that disconnect the power transformer. Securing thermal electrical contacts inside the transformer, in cardboard tube with polyurethane foams, mastik or cement, ensures avoiding gas release and also gas protection working.

Keywords: power transformer, oil insulatation, electric contacts, Bucholtz relay

Procedia PDF Downloads 157

Authors: M. H. Saeed, M. Rasool, M. A. Jawed

Abstract:

Arc Flash Analysis has been a subject of great interest since the electrical fire incidents have been reduced to a great extent after the implementation of arc flash study at different sites. An Arc flash in substations is caused by short circuits over the air or other melted conductors and small shrapnel. Arc flash incidents result in the majority of deaths in substations worldwide. Engro Fertilizers Limited (EFERT) site having a mix of vintage non-internal arc rated and modern arc rated switchgears, carried out an arc flash study of the whole site in accordance with NFPA70E standard. The results not only included optimizing site protection coordination settings but also included marking of Shock and Arc flash protection boundaries in all switchgear rooms. Work permit procedures upgradation is also done in accordance with this study to ensure proper arc rated PPEs and arc flash boundaries protocols are fully observed and followed. With the new safety, protocols working on electrical equipment will be much safer than ever before.

Keywords: Arc flash, non-internal arc rated, protection coordination, shock boundary

Procedia PDF Downloads 176