Search results for: zero voltage switching
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1114

Search results for: zero voltage switching

724 Lower Order Harmonics Minimisation in CHB Inverter Using GA and Decomposition by WT

Authors: V. Joshi Manohar, P. Sujatha, K. S. R. Anjaneyulu

Abstract:

Nowadays Multilevel inverters are widely using in various applications. Modulation strategy at fundamental switching frequency like, SHEPWM is prominent technique to eliminate lower order of harmonics with less switching losses and better harmonic profile. The equations which are formed by SHE are highly nonlinear transcendental in nature, there may exist single, multiple or even no solutions for a particular MI. However, some loads such as electrical drives, it is required to operate in whole range of MI. In order to solve SHE equations for whole range of MI, intelligent techniques are well suited to solve equations so as to produce lest %THDV. Hence, this paper uses Continuous genetic algorithm for minimising harmonics. This paper also presents wavelet based analysis of harmonics. The developed algorithm is simulated and %THD from FFT analysis and Wavelet analysis are compared. MATLAB programming environment and SIMULINK models are used whenever necessary.

Keywords: Cascade H-Bridge Inverter (CHB), Continuous Genetic Algorithm (C-GA), Selective Harmonic Elimination Pulse Width Modulation (SHEPWM), Total Harmonic Distortion (%THDv), Wavelet Transform (WT).

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723 Harmonic Analysis of 240 V AC Power Supply using TMS320C6713 DSK

Authors: Dody Ismoyo, Mohammad Awan, Norashikin Yahya

Abstract:

The presence of harmonic in power system is a major concerned to power engineers for many years. With the increasing usage of nonlinear loads in power systems, the harmonic pollution becomes more serious. One of the widely used computation algorithm for harmonic analysis is fast Fourier transform (FFT). In this paper, a harmonic analyzer using FFT was implemented on TMS320C6713 DSK. The supply voltage of 240 V 59 Hz is stepped down to 5V using a voltage divider in order to match the power rating of the DSK input. The output from the DSK was displayed on oscilloscope and Code Composer Studio™ software. This work has demonstrated the possibility of analyzing the 240V power supply harmonic content using the DSK board.

Keywords: Harmonic Analysis, DSP.

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722 Application of STATCOM-SMES Compensator for Power System Dynamic Performance Improvement

Authors: Reza Sedaghati, Mojtaba Hakimzadeh, Mohammad Hasan Raouf, Mostafa Mirzadeh

Abstract:

Nowadays the growth of distributed generation within the bulk power system is feasible by using the optimal control of the transmission lines power flow. Static Synchronous Compensators (STATCOM) is effective for improving voltage stability but it can only exchange reactive power with the power grid. The integration of Superconducting Magnetic Energy Storage (SMES) with a STATCOM can extend the traditional STATCOM capabilities to four-quadrant bulk power system power flow control and providing exchange both the active and reactive power related to the STATCOM with the ac network. This paper shows how the SMES system can be connected to the ac system via the DC bus of a STATCOM and also analyzes how the integration of STATCOM and SMES allows the bus voltage regulation and power oscillation damping (POD) to be achieved simultaneously. The dynamic performance of the integrated STATCOM-SMES is evaluated through simulation by using PSCAD/EMTDC software and the compensation effectiveness of this integrated compensator is shown.

Keywords: STATCOM-SMES compensator, Power Oscillation Damping (POD), stabilizing, signal, voltage.

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721 Simulation of Voltage Controlled Tunable All Pass Filter Using LM13700 OTA

Authors: Bhaba Priyo Das, Neville Watson, Yonghe Liu

Abstract:

In recent years Operational Transconductance Amplifier based high frequency integrated circuits, filters and systems have been widely investigated. The usefulness of OTAs over conventional OP-Amps in the design of both first order and second order active filters are well documented. This paper discusses some of the tunability issues using the Matlab/Simulink® software which are previously unreported for any commercial OTA. Using the simulation results two first order voltage controlled all pass filters with phase tuning capability are proposed.

Keywords: All pass filter, Operational Transconductance Amplifier, Simulation.

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720 Physical Parameters for Reliability Evaluation

Authors: Tazibt W., Mialhe P.

Abstract:

This paper presents ageing experiments controlled by the evolution of junction parameters. The deterioration of the device is related to high injection effects which modified the transport mechanisms in the space charge region of the junction. Physical phenomena linked to the degradation of junction parameters that affect the devices reliability are reported and discussed. We have used the method based on numerical analysis of experimental current-voltage characteristic of the junction, in order to extract the electrical parameters. The simultaneous follow-up of the evolutions of the series resistance and of the transition voltage allow us to introduce a new parameter for reliability evaluation.

Keywords: High injection, junction, parameters, reliability

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719 Dynamic Variation in Nano-Scale CMOS SRAM Cells Due to LF/RTS Noise and Threshold Voltage

Authors: M. Fadlallah, G. Ghibaudo, C. G. Theodorou

Abstract:

The dynamic variation in memory devices such as the Static Random Access Memory can give errors in read or write operations. In this paper, the effect of low-frequency and random telegraph noise on the dynamic variation of one SRAM cell is detailed. The effect on circuit noise, speed, and length of time of processing is examined, using the Supply Read Retention Voltage and the Read Static Noise Margin. New test run methods are also developed. The obtained results simulation shows the importance of noise caused by dynamic variation, and the impact of Random Telegraph noise on SRAM variability is examined by evaluating the statistical distributions of Random Telegraph noise amplitude in the pull-up, pull-down. The threshold voltage mismatch between neighboring cell transistors due to intrinsic fluctuations typically contributes to larger reductions in static noise margin. Also the contribution of each of the SRAM transistor to total dynamic variation has been identified.

Keywords: Low-frequency noise, Random Telegraph Noise, Dynamic Variation, SRRV.

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718 Novel Intrinsic Conducting Polymer Current Limiting Device (CLD) for Surge Protection

Authors: Noor H Jabarullah

Abstract:

In the past many uneconomic solutions for limitation and interruption of short-circuit currents in low power applications have been introduced, especially polymer switch based on the positive temperature coefficient of resistance (PCTR) concept. However there are many limitations in the active material, which consists of conductive fillers. This paper presents a significantly improved and simplified approach that replaces the existing current limiters with faster switching elements. Its elegance lies in the remarkable simplicity and low-cost processes of producing the device using polyaniline (PANI) doped with methane-sulfonic acid (MSA). Samples characterized as lying in the metallic and critical regimes of metal insulator transition have been studied by means of electrical performance in the voltage range from 1V to 5 V under different environmental conditions. Moisture presence is shown to increase the resistivity and also improved its current limiting performance. Additionally, the device has also been studied for electrical resistivity in the temperature range 77 K-300 K. The temperature dependence of the electrical conductivity gives evidence for a transport mechanism based on variable range hopping in three dimensions.

Keywords: Conducting polymer, current limiter, intrinsic, moisture dependence, polyaniline, resettable, surge protection.

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717 Investigation of Constant Transconductance Circuit for Low Power Low-Noise Amplifier

Authors: Wei Yi Lim, M. Annamalai Arasu, M. Kumarasamy Raja, Minkyu Je

Abstract:

In this paper, the design of wide-swing constant transconductance (gm) bias circuit that generates bias voltage for low-noise amplifier (LNA) circuit design by using an off-chip resistor is demonstrated. The overall transconductance (Gm) generated by the constant gm bias circuit is important to maintain the overall gain and noise figure of the LNA circuit. Therefore, investigation is performed to study the variation in Gm with process, temperature and supply voltage (PVT).  Temperature and supply voltage are swept from -10 °C to 85 °C and 1.425 V to 1.575 V respectively, while the process conditions are also varied to the extreme and the gm variation is eventually concluded at between -3 % to 7 %. With the slight variation in the gm value, through simulation, at worst condition of state SS, we are able to attain a conversion gain (S21) variation of -3.10 % and a noise figure (NF) variation of 18.71 %. The whole constant gm circuit draws approximately 100 µA from a 1.5V supply and is designed based on 0.13 µm CMOS process. 

Keywords: Transconductance, LNA, temperature, process.

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716 Effect of Non Uniformity Factors and Assignment Factors on Errors in Charge Simulation Method with Point Charge Model

Authors: Gururaj S Punekar, N K Kishore Senior, H S Y Shastry

Abstract:

Charge Simulation Method (CSM) is one of the very widely used numerical field computation technique in High Voltage (HV) engineering. The high voltage fields of varying non uniformities are encountered in practice. CSM programs being case specific, the simulation accuracies heavily depend on the user (programmers) experience. Here is an effort to understand CSM errors and evolve some guidelines to setup accurate CSM models, relating non uniformities with assignment factors. The results are for the six-point-charge model of sphere-plane gap geometry. Using genetic algorithm (GA) as tool, optimum assignment factors at different non uniformity factors for this model have been evaluated and analyzed. It is shown that the symmetrically placed six-point-charge models can be good enough to set up CSM programs with potential errors less than 0.1% when the field non uniformity factor is greater than 2.64 (field utilization factor less than 52.76%).

Keywords: Assignment factor, Charge Simulation Method, High Voltage, Numerical field computation, Non uniformity factor, Simulation errors.

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715 Pull-In Instability Determination of Microcapacitive Sensor for Measuring Special Range of Pressure

Authors: Yashar Haghighatfar, Shahrzad Mirhosseini

Abstract:

Pull-in instability is a nonlinear and crucial effect that is important for the design of microelectromechanical system devices. In this paper, the appropriate electrostatic voltage range is determined by measuring fluid flow pressure via micro pressure sensor based microbeam. The microbeam deflection contains two parts, the static and perturbation deflection of static. The second order equation regarding the equivalent stiffness, mass and damping matrices based on Galerkin method is introduced to predict pull-in instability due to the external voltage. Also the reduced order method is used for solving the second order nonlinear equation of motion. Furthermore, in the present study, the micro capacitive pressure sensor is designed for measuring special fluid flow pressure range. The results show that the measurable pressure range can be optimized, regarding damping field and external voltage.

Keywords: MEMS, pull-in instability, electrostatically actuated microbeam, reduced order method.

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714 CMOS Positive and Negative Resistors Based on Complementary Regulated Cascode Topology with Cross-Coupled Regulated Transistors

Authors: Kittipong Tripetch, Nobuhiko Nakano

Abstract:

Two types of floating active resistors based on a complementary regulated cascode topology with cross-coupled regulated transistors are presented in this paper. The first topology is a high swing complementary regulated cascode active resistor. The second topology is a complementary common gate with a regulated cross coupled transistor. The small-signal input resistances of the floating resistors are derived. Three graphs of the input current versus the input voltage for different aspect ratios are designed and plotted using the Cadence Spectre 0.18-µm Rohm Semiconductor process. The total harmonic distortion graphs are plotted for three different aspect ratios with different input-voltage amplitudes and different input frequencies. From the simulation results, it is observed that a resistance of approximately 8.52 MΩ can be obtained from supply voltage at  ±0.9 V.

Keywords: Complementary common gate, complementary regulated cascode, current mirror, floating active resistors.

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713 A Superior Delay Estimation Model for VLSI Interconnect in Current Mode Signaling

Authors: Sunil Jadav, Rajeevan Chandel Munish Vashishath

Abstract:

Today’s VLSI networks demands for high speed. And in this work the compact form mathematical model for current mode signalling in VLSI interconnects is presented.RLC interconnect line is modelled using characteristic impedance of transmission line and inductive effect. The on-chip inductance effect is dominant at lower technology node is emulated into an equivalent resistance. First order transfer function is designed using finite difference equation, Laplace transform and by applying the boundary conditions at the source and load termination. It has been observed that the dominant pole determines system response and delay in the proposed model. The novel proposed current mode model shows superior performance as compared to voltage mode signalling. Analysis shows that current mode signalling in VLSI interconnects provides 2.8 times better delay performance than voltage mode. Secondly the damping factor of a lumped RLC circuit is shown to be a useful figure of merit.

Keywords: Current Mode, Voltage Mode, VLSI Interconnect.

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712 Design and Analysis of an 8T Read Decoupled Dual Port SRAM Cell for Low Power High Speed Applications

Authors: Ankit Mitra

Abstract:

Speed, power consumption and area, are some of the most important factors of concern in modern day memory design. As we move towards Deep Sub-Micron Technologies, the problems of leakage current, noise and cell stability due to physical parameter variation becomes more pronounced. In this paper we have designed an 8T Read Decoupled Dual Port SRAM Cell with Dual Threshold Voltage and characterized it in terms of read and write delay, read and write noise margins, Data Retention Voltage and Leakage Current. Read Decoupling improves the Read Noise Margin and static power dissipation is reduced by using Dual-Vt transistors. The results obtained are compared with existing 6T, 8T, 9T SRAM Cells, which shows the superiority of the proposed design. The Cell is designed and simulated in TSPICE using 90nm CMOS process.

Keywords: CMOS, Dual-Port, Data Retention Voltage, 8T SRAM, Leakage Current, Noise Margin, Loop-cutting, Single-ended.

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711 Designing and Manufacturing High Voltage Pulse Generator with Adjustable Pulse and Monitoring Current and Voltage: Food Processing Application

Authors: H. Mirzaee, A. Pourzaki

Abstract:

Using strength Pulse Electrical Field (PEF) in food industries is a non-thermal process that can deactivate microorganisms and increase penetration in plant and animals tissues without serious impact on food taste and quality. In this paper designing and fabricating of a PEF generator has been presented. Pulse generation methods have been surveyed and the best of them selected. The equipment by controller set can generate square pulse with adjustable parameters such as amplitude 1-5kV, frequency 0.1-10Hz, pulse width 10-100s, and duty cycle 0-100%. Setting the number of pulses, and presenting the output voltage and current waveforms on the oscilloscope screen are another advantages of this equipment. Finally, some food samples were tested that yielded the satisfactory results. PEF applying had considerable effects on potato, banana and purple cabbage. It caused increase Brix factor from 0.05 to 0.15 in potato solution. It is also so effective in extraction color material from purple cabbage. In the last experiment effects of PEF voltages on color extraction of saffron scum were surveyed (about 6% increasing yield).

Keywords: PEF, Capacitor, Switch, IGBT

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710 Investigation of the Effect of Impulse Voltage to Flashover by Using Water Jet

Authors: Harun Gülan, Muhsin Tunay Gencoglu, Mehmet Cebeci

Abstract:

The main function of the insulators used in high voltage (HV) transmission lines is to insulate the energized conductor from the pole and hence from the ground. However, when the insulators fail to perform this insulation function due to various effects, failures occur. The deterioration of the insulation results either from breakdown or surface flashover. The surface flashover is caused by the layer of pollution that forms conductivity on the surface of the insulator, such as salt, carbonaceous compounds, rain, moisture, fog, dew, industrial pollution and desert dust. The source of the majority of failures and interruptions in HV lines is surface flashover. This threatens the continuity of supply and causes significant economic losses. Pollution flashover in HV insulators is still a serious problem that has not been fully resolved. In this study, a water jet test system has been established in order to investigate the behavior of insulators under dirty conditions and to determine their flashover performance. Flashover behavior of the insulators is examined by applying impulse voltages in the test system. This study aims to investigate the insulator behaviour under high impulse voltages. For this purpose, a water jet test system was installed and experimental results were obtained over a real system and analyzed. By using the water jet test system instead of the actual insulator, the damage to the insulator as a result of the flashover that would occur under impulse voltage was prevented. The results of the test system performed an important role in determining the insulator behavior and provided predictability.

Keywords: Insulator, pollution flashover, high impulse voltage, water jet model.

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709 A Maximum Power Point Tracker for PV Panels Using SEPIC Converter

Authors: S. Ganesh, J. Janani, G. Besliya Angel

Abstract:

Photovoltaic (PV) energy is one of the most important renewable energy sources. Maximum Power Point Tracking (MPPT) techniques should be used in photovoltaic systems to maximize the PV panel output power by tracking continuously the maximum power point which depends on panel’s temperature and on irradiance conditions. Incremental conductance control method has been used as MPPT algorithm. The methodology is based on connecting a pulse width modulated dc/dc SEPIC converter, which is controlled by a microprocessor based unit. The SEPIC converter is one of the buck-boost converters which maintain the output voltage as constant irrespective of the solar isolation level. By adjusting the switching frequency of the converter the maximum power point has been achieved. The main difference between the method used in the proposed MPPT systems and other technique used in the past is that PV array output power is used to directly control the dc/dc converter thus reducing the complexity of the system. The resulting system has high efficiency, low cost and can be easily modified. The tracking capability has been verified experimentally with a 10 W solar panel under a controlled experimental setup. The SEPIC converter and their control strategies has been analyzed and simulated using Simulink/Matlab software.

Keywords: Maximum Power Point Tracking, Microprocessor, PV Module, SEPIC Converter.

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708 Replacing MOSFETs with Single Electron Transistors (SET) to Reduce Power Consumption of an Inverter Circuit

Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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707 Star-Hexagon Transformer Supported UPQC

Authors: Yash Pal, A.Swarup, Bhim Singh

Abstract:

A new topology of unified power quality conditioner (UPQC) is proposed for different power quality (PQ) improvement in a three-phase four-wire (3P-4W) distribution system. For neutral current mitigation, a star-hexagon transformer is connected in shunt near the load along with three-leg voltage source inverters (VSIs) based UPQC. For the mitigation of source neutral current, the uses of passive elements are advantageous over the active compensation due to ruggedness and less complexity of control. In addition to this, by connecting a star-hexagon transformer for neutral current mitigation the over all rating of the UPQC is reduced. The performance of the proposed topology of 3P-4W UPQC is evaluated for power-factor correction, load balancing, neutral current mitigation and mitigation of voltage and currents harmonics. A simple control algorithm based on Unit Vector Template (UVT) technique is used as a control strategy of UPQC for mitigation of different PQ problems. In this control scheme, the current/voltage control is applied over the fundamental supply currents/voltages instead of fast changing APFs currents/voltages, thereby reducing the computational delay. Moreover, no extra control is required for neutral source current compensation; hence the numbers of current sensors are reduced. The performance of the proposed topology of UPQC is analyzed through simulations results using MATLAB software with its Simulink and Power System Block set toolboxes.

Keywords: Power-factor correction, Load balancing, UPQC, Voltage and Current harmonics, Neutral current mitigation, Starhexagon transformer.

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706 Evaluation of the Power Generation Effect Obtained by Inserting a Piezoelectric Sheet in the Backlash Clearance of a Circular Arc Helical Gear

Authors: Barenten Suciu, Yuya Nakamoto

Abstract:

Power generation effect, obtained by inserting a piezo- electric sheet in the backlash clearance of a circular arc helical gear, is evaluated. Such type of screw gear is preferred since, in comparison with the involute tooth profile, the circular arc profile leads to reduced stress-concentration effects, and improved life of the piezoelectric film. Firstly, geometry of the circular arc helical gear, and properties of the piezoelectric sheet are presented. Then, description of the test-rig, consisted of a right-hand thread gear meshing with a left-hand thread gear, and the voltage measurement procedure are given. After creating the tridimensional (3D) model of the meshing gears in SolidWorks, they are 3D-printed in acrylonitrile butadiene styrene (ABS) resin. Variation of the generated voltage versus time, during a meshing cycle of the circular arc helical gear, is measured for various values of the center distance. Then, the change of the maximal, minimal, and peak-to-peak voltage versus the center distance is illustrated. Optimal center distance of the gear, to achieve voltage maximization, is found and its significance is discussed. Such results prove that the contact pressure of the meshing gears can be measured, and also, the electrical power can be generated by employing the proposed technique.

Keywords: Power generation, circular arc helical gear, piezo- electric sheet, contact problem, optimal center distance.

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705 Force on a High Voltage Capacitor with Asymmetrical Electrodes

Authors: Jiří Primas, Michal Malík, Darina Jašíková, Václav Kopecký

Abstract:

When a high DC voltage is applied to a capacitor with strongly asymmetrical electrodes, it generates a mechanical force that affects the whole capacitor. This phenomenon is most likely to be caused by the motion of ions generated around the smaller of the two electrodes and their subsequent interaction with the surrounding medium. A method to measure this force has been devised and used. A formula describing the force has also been derived. After comparing the data gained through experiments with those acquired using the theoretical formula, a difference was found above a certain value of current. This paper also gives reasons for this difference.

Keywords: Capacitor with asymmetrical electrodes, Electricalfield, Mechanical force, Motion of ions.

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704 Understanding Charge Dynamics in Elastomers Adopting Pulsed Electro Acoustic (PEA) Technique

Authors: R. Sarathi, M. G. Danikas, Y. Chen, T. Tanaka

Abstract:

In the present work, Pulsed Electro Acoustic (PEA) technique was adopted to understand the space charge dynamics in elastomeric material. It is observed that the polarity of the applied DC voltage voltage and its magnitude alters the space charge dynamics in insulation structure. It is also noticed that any addition of compound to the base material/processing technique have characteristic variation in the space charge injection process. It could be concluded based on the present work that the plasticizer could inject heterocharges into the insulation medium. Also it is realized that space charge magnitude is less with the addition of plasticizer. In the PEA studies, it is observed that local electric field in the insulating material can be much more than applied electric field due to space charge formation. One of the important conclusions arrived at based on PEA technique is that one could understand the safe operating electric field of an insulation material and the charge trap sites.

Keywords: Pulsed electro acoustic technique, space charge, DCvoltage, elastomers, Electric field, high voltage.

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703 A Direct Down-conversion Receiver for Low-power Wireless Sensor Networks

Authors: Gianluca Cornetta, Abdellah Touhafi, David J. Santos, Jose Manuel Vazquez

Abstract:

A direct downconversion receiver implemented in 0.13 μm 1P8M process is presented. The circuit is formed by a single-end LNA, an active balun for conversion into balanced mode, a quadrature double-balanced passive switch mixer and a quadrature voltage-controlled oscillator. The receiver operates in the 2.4 GHz ISM band and complies with IEEE 802.15.4 (ZigBee) specifications. The circuit exhibits a very low noise figure of only 2.27 dB and dissipates only 14.6 mW with a 1.2 V supply voltage and is hence suitable for low-power applications.

Keywords: LNA, Active Balun, Passive Mixer, VCO, IEEE 802.15.4(ZigBee).

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702 Hysteresis Modulation Based Sliding Mode Control for Positive Output Elementary Super Lift Luo Converter

Authors: K. Ramash Kumar, S. Jeevananthan

Abstract:

The Object of this paper is to design and analyze a Hysteresis modulation based sliding mode control (HMSMC) for positive output elementary super lift Luo converter (POESLLC), which is the start-of-the-art DC-DC converter. The positive output elementary super lift Luo converter performs the voltage conversion from positive source voltage to positive load voltage. This paper proposes a HMSMC capable of providing the good steady state and dynamic performance compared to conventional controllers. Dynamic equations describing the positive output elementary super lift luo converter are derived by using state space average method. The simulation model of the positive output elementary super lift Luo converter with its control circuit is implemented in Matlab/Simulink. The HMSMC for positive output elementary super lift Luo converter is tested for line changes, load changes and also for components variations.

Keywords: DC-DC converter, Positive output elementarysuper lift Luo converter (POESLLC), Hysteresis modulation basedsliding mode control (HMSMC).

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701 Analysis and Circuit Modeling of APDs

Authors: A. Ahadpour Shal, A. Ghadimi, A. Azadbar

Abstract:

In this paper a new method for increasing the speed of SAGCM-APD is proposed. Utilizing carrier rate equations in different regions of the structure, a circuit model for the structure is obtained. In this research, in addition to frequency response, the effect of added new charge layer on some transient parameters like slew-rate, rising and falling times have been considered. Finally, by trading-off among some physical parameters such as different layers widths and droppings, a noticeable decrease in breakdown voltage has been achieved. The results of simulation, illustrate some features of proposed structure improvement in comparison with conventional SAGCM-APD structures.

Keywords: Optical communication systems (OCS), Circuit modeling, breakdown voltage, SAGCM APD

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700 Pre-Deflection Routing with Control Packet Signal Scheme in Optical Burst Switch Networks

Authors: Jaipal Bisht, Aditya Goel

Abstract:

Optical Burst Switching (OBS) is a promising technology for the future generation Internet. Control architecture and Contention resolution are the main issues faced by the Optical Burst Switching networks. In this paper we are only taking care of the Contention problem and to overcome this issue we propose Pre-Deflection Routing with Control Packet Signal Scheme for Contention Resolution in Optical Burst Switch Networks. In this paper Pre-deflection routing approach has been proposed in which routing is carried out in two ways, Shortest Path First (SPF) and Least Hop First (LHF) Routing to forward the clusters and canoes respectively. Hereafter Burst Offset Time Control Algorithm has been proposed where a forward control packet (FCP) collects the congestion price and contention price along its paths. Thereafter a reverse-direction control packet (RCP) sent by destination node which delivers the information of FCP to the source node, and source node uses this information to revise its offset time and burst length.

Keywords: Contention Resolution, FCP, OBS, Offset Time, PST, RCP.

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699 Electrical Field Around the Overhead Transmission Lines

Authors: S.S. Razavipour, M. Jahangiri, H. Sadeghipoor

Abstract:

In this paper, the computation of the electrical field distribution around AC high-voltage lines is demonstrated. The advantages and disadvantages of two different methods are described to evaluate the electrical field quantity. The first method is a seminumerical method using the laws of electrostatic techniques to simulate the two-dimensional electric field under the high-voltage overhead line. The second method which will be discussed is the finite element method (FEM) using specific boundary conditions to compute the two- dimensional electric field distributions in an efficient way.

Keywords: Electrical field, unloaded transmission lines, finite element method, electrostatic images technique.

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698 Stochastic Estimation of Wireless Traffic Parameters

Authors: Somenath Mukherjee, Raj Kumar Samanta, Gautam Sanyal

Abstract:

Different services based on different switching techniques in wireless networks leads to drastic changes in the properties of network traffic. Because of these diversities in services, network traffic is expected to undergo qualitative and quantitative variations. Hence, assumption of traffic characteristics and the prediction of network events become more complex for the wireless networks. In this paper, the traffic characteristics have been studied by collecting traces from the mobile switching centre (MSC). The traces include initiation and termination time, originating node, home station id, foreign station id. Traffic parameters namely, call interarrival and holding times were estimated statistically. The results show that call inter-arrival and distribution time in this wireless network is heavy-tailed and follow gamma distributions. They are asymptotically long-range dependent. It is also found that the call holding times are best fitted with lognormal distribution. Based on these observations, an analytical model for performance estimation is also proposed.

Keywords: Wireless networks, traffic analysis, long-range dependence, heavy-tailed distribution.

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697 A Digital Pulse-Width Modulation Controller for High-Temperature DC-DC Power Conversion Application

Authors: Jingjing Lan, Jun Yu, Muthukumaraswamy Annamalai Arasu

Abstract:

This paper presents a digital non-linear pulse-width modulation (PWM) controller in a high-voltage (HV) buck-boost DC-DC converter for the piezoelectric transducer of the down-hole acoustic telemetry system. The proposed design controls the generation of output signal with voltage higher than the supply voltage and is targeted to work under high temperature. To minimize the power consumption and silicon area, a simple and efficient design scheme is employed to develop the PWM controller. The proposed PWM controller consists of serial to parallel (S2P) converter, data assign block, a mode and duty cycle controller (MDC), linearly PWM (LPWM) and noise shaper, pulse generator and clock generator. To improve the reliability of circuit operation at higher temperature, this design is fabricated with the 1.0-μm silicon-on-insulator (SOI) CMOS process. The implementation results validated that the proposed design has the advantages of smaller size, lower power consumption and robust thermal stability.

Keywords: DC-DC power conversion, digital control, high temperatures, pulse-width modulation.

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696 Test of Moisture Sensor Activation Speed

Authors: I. Parkova, A. Vališevskis, A. Viļumsone

Abstract:

Nocturnal enuresis or bed-wetting is intermittent incontinence during sleep of children after age 5 that may precipitate wide range of behavioral and developmental problems. One of the non-pharmacological treatment methods is the use of a bed-wetting alarm system. In order to improve comfort conditions of nocturnal enuresis alarm system, modular moisture sensor should be replaced by a textile sensor. In this study behavior and moisture detection speed of woven and sewn sensors were compared by analyzing change in electrical resistance after solution (salt water) was dripped on sensor samples. Material of samples has different structure and yarn location, which affects solution detection rate. Sensor system circuit was designed and two sensor tests were performed: system activation test and false alarm test to determine the sensitivity of the system and activation threshold. Sewn sensor had better result in system’s activation test – faster reaction, but woven sensor had better result in system’s false alarm test – it was less sensitive to perspiration simulation. After experiments it was found that the optimum switching threshold is 3V in case of 5V input voltage, which provides protection against false alarms, for example – during intensive sweating.

Keywords: Conductive yarns, moisture textile sensor.

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695 Design a Low Voltage- Low Offset Class AB Op-Amp

Authors: B.Gholami, S.Gholami, A.Forouzantabar, Sh.Bazyari

Abstract:

A new design approach for three-stage operational amplifiers (op-amps) is proposed. It allows to actually implement a symmetrical push-pull class-AB amplifier output stage for wellestablished three-stage amplifiers using a feedforward transconductance stage. Compared with the conventional design practice, the proposed approach leads to a significant improvement of the symmetry between the positive and the negative op-amp step response, resulting in similar values of the positive/negative settling time. The new approach proves to be very useful in order to fully exploit the potentiality allowed by the op-amp in terms of speed performances. Design examples in a commercial 0.35-μm CMOS prove the effectiveness of theproposed strategy.

Keywords: Low-voltage op amp, design , optimum design

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