Search results for: multi-level switching amplifier
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 448

Search results for: multi-level switching amplifier

448 Multi-Level Pulse Width Modulation to Boost the Power Efficiency of Switching Amplifiers for Analog Signals with Very High Crest Factor

Authors: Jan Doutreloigne

Abstract:

The main goal of this paper is to develop a switching amplifier with optimized power efficiency for analog signals with a very high crest factor such as audio or DSL signals. Theoretical calculations show that a switching amplifier architecture based on multi-level pulse width modulation outperforms all other types of linear or switching amplifiers in that respect. Simulations on a 2 W multi-level switching audio amplifier, designed in a 50 V 0.35 mm IC technology, confirm its superior performance in terms of power efficiency. A real silicon implementation of this audio amplifier design is currently underway to provide experimental validation.

Keywords: Audio amplifier, multi-level switching amplifier, power efficiency, pulse width modulation, PWM, self-oscillating amplifier.

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447 Minimization of Switching Losses in Cascaded Multilevel Inverters Using Efficient Sequential Switching Hybrid-Modulation Techniques

Authors: P. Satish Kumar, K. Ramakrishna, Ch. Lokeshwar Reddy, G. Sridhar

Abstract:

This paper presents two different sequential switching hybrid-modulation strategies and implemented for cascaded multilevel inverters. Hybrid modulation strategies represent the combinations of Fundamental-frequency pulse width modulation (FFPWM) and Multilevel sinusoidal-modulation (MSPWM) strategies, and are designed for performance of the well-known Alternative Phase opposition disposition (APOD), Phase shifted carrier (PSC). The main characteristics of these modulations are the reduction of switching losses with good harmonic performance, balanced power loss dissipation among the devices with in a cell, and among the series-connected cells. The feasibility of these modulations is verified through spectral analysis, power loss analysis and simulation.

Keywords: Cascaded multilevel inverters, hybrid modulation, power loss analysis, pulse width modulation.

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446 Harmonics Elimination in Multilevel Inverter Using Linear Fuzzy Regression

Authors: A. K. Al-Othman, H. A. Al-Mekhaizim

Abstract:

Multilevel inverters supplied from equal and constant dc sources almost don-t exist in practical applications. The variation of the dc sources affects the values of the switching angles required for each specific harmonic profile, as well as increases the difficulty of the harmonic elimination-s equations. This paper presents an extremely fast optimal solution of harmonic elimination of multilevel inverters with non-equal dc sources using Tanaka's fuzzy linear regression formulation. A set of mathematical equations describing the general output waveform of the multilevel inverter with nonequal dc sources is formulated. Fuzzy linear regression is then employed to compute the optimal solution set of switching angles.

Keywords: Multilevel converters, harmonics, pulse widthmodulation (PWM), optimal control.

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445 Hybrid Pulse Width Modulation Techniques for the Reduction of Switching Losses and Voltage Harmonics in Cascaded Multilevel Inverters

Authors: Venkata Reddy Kota

Abstract:

These days, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements. Also, it is difficult to connect the traditional converters to the high and medium voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Different modulation topologies like Sinusoidal Pulse Width Modulation (SPWM), Selective Harmonic Elimination Pulse Width Modulation (SHE-PWM) are available for multilevel inverters. In this work, different hybrid modulation techniques which are combination of fundamental frequency modulation and multilevel sinusoidal-modulation are compared. The main characteristic of these modulations are reduction of switching losses with good harmonic performance and balanced power loss dissipation among the device. The proposed hybrid modulation schemes are developed and simulated in Matlab/Simulink for cascaded H-bridge inverter. The results validate the applicability of the proposed schemes for cascaded multilevel inverter.

Keywords: Hybrid PWM techniques, Cascaded Multilevel Inverters, Switching loss minimization.

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444 Comparison of Different Discontinuous PWM Technique for Switching Losses Reduction in Modular Multilevel Converters

Authors: Kaumil B. Shah, Hina Chandwani

Abstract:

The modular multilevel converter (MMC) is one of the advanced topologies for medium and high-voltage applications. In high-power, high-voltage MMC, a large number of switching power devices are required. These switching power devices (IGBT) considerable switching losses. This paper analyzes the performance of different discontinuous pulse width modulation (DPWM) techniques and compares the results against a conventional carrier based pulse width modulation method, in order to reduce the switching losses of an MMC. The DPWM reference wave can be generated by adding the zero-sequence component to the original (sine) reference modulation signal. The result of the addition gives the reference signal of DPWM techniques. To minimize the switching losses of the MMC, the clamping period is controlled according to the absolute value of the output load current. No switching is generated in the clamping period so overall switching of the power device is reduced. The simulation result of the different DPWM techniques is compared with conventional carrier-based pulse-width modulation technique.

Keywords: Modular multilevel converter, discontinuous pulse width modulation, switching losses, zero-sequence voltage.

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443 Evaluation of the Energy Consumption per Bit inBENES Optical Packet Switch

Authors: V. Eramo, E. Miucci, A. Cianfrani, A. Germoni, M. Listanti

Abstract:

We evaluate the average energy consumption per bit in Optical Packet Switches equipped with BENES switching fabric realized in Semiconductor Optical Amplifier (SOA) technology. We also study the impact that the Amplifier Spontaneous Emission (ASE) noise generated by a transmission system has on the power consumption of the BENES switches due to the gain saturation of the SOAs used to realize the switching fabric. As a matter of example for 32×32 switches supporting 64 wavelengths and offered traffic equal to 0,8, the average energy consumption per bit is 2, 34 · 10-1 nJ/bit and increases if ASE noise introduced by the transmission systems is increased.

Keywords: Benes, Amplifier Spontaneous Emission Noise, EnergyConsumption, Optical Packet Switch.

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442 Harmonic Elimination of Hybrid Multilevel Inverters Using Particle Swarm Optimization

Authors: N. Janjamraj, A. Oonsivilai

Abstract:

This paper present the harmonic elimination of hybrid multilevel inverters (HMI) which could be increase the number of output voltage level. Total Harmonic Distortion (THD) is one of the most important requirements concerning performance indices. Because of many numbers output levels of HMI, it had numerous unknown variables of eliminate undesired individual harmonic and THD nonlinear equations set. Optimized harmonic stepped waveform (OHSW) is solving switching angles conventional method, but most complicated for solving as added level. The artificial intelligent techniques are deliberation to solve this problem. This paper presents the Particle Swarm Optimization (PSO) technique for solving switching angles to get minimum THD and eliminate undesired individual harmonics of 15-levels hybrid multilevel inverters. Consequently it had many variables and could eliminate numerous harmonics. Both advantages including high level of inverter and Particle Swarm Optimization (PSO) are used as powerful tools for harmonics elimination.

Keywords: Multilevel Inverters, Particle Swarms Optimization, Harmonic Elimination.

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441 Modelling and Simulation of Cascaded H-Bridge Multilevel Single Source Inverter Using PSIM

Authors: Gaddafi S. Shehu, T. Yalcinoz, Abdullahi B. Kunya

Abstract:

Multilevel inverters such as flying capacitor, diodeclamped, and cascaded H-bridge inverters are very popular particularly in medium and high power applications. This paper focuses on a cascaded H-bridge module using a single direct current (DC) source in order to generate an 11-level output voltage. The noble approach reduces the number of switches and gate drivers, in comparison with a conventional method. The anticipated topology produces more accurate result with an isolation transformer at high switching frequency. Different modulation techniques can be used for the multilevel inverter, but this work features modulation techniques known as selective harmonic elimination (SHE).This modulation approach reduces the number of carriers with reduction in Switching Losses, Total Harmonic Distortion (THD), and thereby increasing Power Quality (PQ). Based on the simulation result obtained, it appears SHE has the ability to eliminate selected harmonics by chopping off the fundamental output component. The performance evaluation of the proposed cascaded multilevel inverter is performed using PSIM simulation package and THD of 0.94% is obtained.

Keywords: Cascaded H-bridge Multilevel Inverter, Power Quality, Selective Harmonic Elimination.

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440 CAD Tools Broadband Amplifier Design

Authors: Salwa M. Salah Eldeen, Fathi A. Farag, Abd Allah M. Moselhy

Abstract:

This paper proposed a new CAD tools for microwave amplifier design. The proposed tool is based on survey about the broadband amplifier design methods, such as the Feedback amplifiers, balanced amplifiers and Compensated Matching Network The proposed tool is developed for broadband amplifier using a compensated matching network "unconditional stability amplifier". The developed program is based on analytical procedures with ability of smith chart explanation. The C# software is used for the proposed tools implementation. The program is applied on broadband amplifier as an example for testing. The designed amplifier is considered as a broadband amplifier at the range 300-700 MHz. The results are highly agreement with the expected results. Finally, these methods can be extended for wide band amplifier design.

Keywords: Broadband amplifier (BBA), Compensated Matching Network, Microwave Amplifier.

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439 Design and Layout of a X-Band MMIC Power Amplifier in a Phemt Technology

Authors: Renbin Dai, Rana Arslan Ali Khan

Abstract:

The design of Class A and Class AB 2-stage X band Power Amplifier is described in this report. This power amplifier is part of a transceiver used in radar for monitoring iron characteristics in a blast furnace. The circuit was designed using foundry WIN Semiconductors. The specification requires 15dB gain in the linear region, VSWR nearly 1 at input as well as at the output, an output power of 10 dBm and good stable performance in the band 10.9-12.2 GHz. The design was implemented by using inter-stage configuration, the Class A amplifier was chosen for driver stage i.e. the first amplifier focusing on the gain and the output amplifier conducted at Class AB with more emphasis on output power.

Keywords: Power amplifier, Class AB, Class A, MMIC, 2-stage, X band.

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438 Design of a CMOS Differential Operational Transresistance Amplifier in 90 nm CMOS Technology

Authors: Hafiz Muhammad Obaid, Umais Tayyab, Shabbir Majeed Ch.

Abstract:

In this paper, a CMOS differential operational transresistance amplifier (OTRA) is presented. The amplifier is designed and implemented in a standard umc90-nm CMOS technology. The differential OTRA provides wider bandwidth at high gain. It also shows much better rise and fall time and exhibits a very good input current dynamic range of 50 to 50 μA. The OTRA can be used in many analog VLSI applications. The presented amplifier has high gain bandwidth product of 617.6 THz Ω. The total power dissipation of the presented amplifier is also very low and it is 0.21 mW.

Keywords: CMOS, differential, operational transresistance amplifier, OTRA, 90 nm, VLSI.

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437 Novel Approach to Design of a Class-EJ Power Amplifier Using High Power Technology

Authors: F. Rahmani, F. Razaghian, A. R. Kashaninia

Abstract:

This article proposes a new method for application in communication circuit systems that increase efficiency, PAE, output power and gain in the circuit. The proposed method is based on a combination of switching class-E and class-J and has been termed class-EJ. This method was investigated using both theory and simulation to confirm ∼72% PAE and output power of >39dBm. The combination and design of the proposed power amplifier accrues gain of over 15dB in the 2.9 to 3.5GHz frequency bandwidth. This circuit was designed using MOSFET and high power transistors. The loadand source-pull method achieved the best input and output networks using lumped elements. The proposed technique was investigated for fundamental and second harmonics having desirable amplitudes for the output signal.

Keywords: Power Amplifier (PA), GaN HEMT, Class-J and Class-E, High Efficiency.

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436 FPGA Based Implementation of Simplified Space Vector PWM Algorithm for Multilevel Inverter Fed Induction Motor Drives

Authors: Tapan Trivedi, Pramod Agarwal, Rajendrasinh Jadeja, Pragnesh Bhatt

Abstract:

Space Vector Pulse Width Modulation is popular for variable frequency drives. The method has several advantages over carried based PWM and is computation intensive. The implementation of SVPWM for multilevel inverter requires special attention and at the same time consumes considerable resources. Due to faster processing power and reduced over all computational burden, FPGAs are being investigated as an alternative for other controllers. In this paper, a space vector PWM algorithm is implemented using FPGA which requires less computational area and is modular in structure. The algorithm is verified experimentally for Neutral Point Clamped inverter using FPGA development board xc3s5000-4fg900.

Keywords: Modular structure, Multilevel inverter, Space Vector PWM, Switching States.

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435 Transimpedance Amplifier for Integrated 3D Ultrasound Biomicroscope Applications

Authors: Xiwei Huang, Hyouk-Kyu Cha, Dongning Zhao, Bin Guo, Minkyu Je, Hao Yu

Abstract:

This paper presents the design and implementation of a fully integrated transimpedance amplifier (TIA) as the analog frontend receiver for Capacitive Micromachined Ultrasound Transducers (CMUTs) for ultrasound biomicroscope imaging application. The amplifier is designed to amplify the received signals from 17.5MHz to 52.5MHz with a center frequency of 35MHz. The TIA was fabricated in GF 0.18μm 1P6M 30V high voltage process. The measurement results show that the designed amplifier can reach a transimpedance gain of 61.08dBΩ and operating frequency from 17.5MHz to 100MHz with 1VP-P output voltage under 6V power supply.

Keywords: 3D ultrasound biomicroscope, analog front-end, transimpedance amplifier, CMUT

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434 55 dB High Gain L-Band EDFA Utilizing Single Pump Source

Authors: M. H. Al-Mansoori, W. S. Al-Ghaithi, F. N. Hasoon

Abstract:

In this paper, we experimentally investigate the performance of an efficient high gain triple-pass L-band Erbium-Doped Fiber (EDF) amplifier structure with a single pump source. The amplifier gain and noise figure variation with EDF pump power, input signal power and wavelengths have been investigated. The generated backward Amplified Spontaneous Emission (ASE) noise of the first amplifier stage is suppressed by using a tunable band-pass filter. The amplifier achieves a signal gain of 55 dB with low noise figure of 3.8 dB at -50 dBm input signal power. The amplifier gain shows significant improvement of 12.8 dB compared to amplifier structure without ASE suppression.

Keywords: Optical amplifiers, EDFA, L-band, optical networks.

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433 A Behavior Model of Discrete Sampling and Hold Amplifier based on AC Response

Authors: Wang Xing-hua, Zhong Shun-an, Zhang Zhuo

Abstract:

A kind of behavior model for discrete sampling and hold amplifier with charge transmission is analyzed. The transfer function and behavior features are based on the main AC responses of operation amplifier. The result used in pipelined and sigma-delta ADC shows the exact of model of sampling and hold amplifier, and the non-ideal factors are taken into account.

Keywords: SHA, response, behavior, transfer function.

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432 Characteristic of Discrete Raman Amplifier at Different Pump Configurations

Authors: Parekhan M. Jaff

Abstract:

This paper describes the gain and noise performances of discrete Raman amplifier as a function of fiber lengths and the signal input powers for different pump configurations. Simulation has been done by using optisystem 7.0 software simulation at signal wavelength of 1550 nm and a pump wavelength of 1450nm. The results showed that the gain is higher in bidirectional pumping than in counter pumping, the gain changes with increasing the fiber length while the noise figure remain the same for short fiber lengths and the gain saturates differently for different pumping configuration at different fiber lengths and power levels of the signal.

Keywords: Optical Amplifier, Raman Amplifier DiscreteRaman Amplifier (DRA), Wavelength Division Multiplexing(WDM).

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431 Multilevel Arnoldi-Tikhonov Regularization Methods for Large-Scale Linear Ill-Posed Systems

Authors: Yiqin Lin, Liang Bao

Abstract:

This paper is devoted to the numerical solution of large-scale linear ill-posed systems. A multilevel regularization method is proposed. This method is based on a synthesis of the Arnoldi-Tikhonov regularization technique and the multilevel technique. We show that if the Arnoldi-Tikhonov method is a regularization method, then the multilevel method is also a regularization one. Numerical experiments presented in this paper illustrate the effectiveness of the proposed method.

Keywords: Discrete ill-posed problem, Tikhonov regularization, discrepancy principle, Arnoldi process, multilevel method.

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430 Nature Inspired Metaheuristic Algorithms for Multilevel Thresholding Image Segmentation - A Survey

Authors: C. Deepika, J. Nithya

Abstract:

Segmentation is one of the essential tasks in image processing. Thresholding is one of the simplest techniques for performing image segmentation. Multilevel thresholding is a simple and effective technique. The primary objective of bi-level or multilevel thresholding for image segmentation is to determine a best thresholding value. To achieve multilevel thresholding various techniques has been proposed. A study of some nature inspired metaheuristic algorithms for multilevel thresholding for image segmentation is conducted. Here, we study about Particle swarm optimization (PSO) algorithm, artificial bee colony optimization (ABC), Ant colony optimization (ACO) algorithm and Cuckoo search (CS) algorithm.

Keywords: Ant colony optimization, Artificial bee colony optimization, Cuckoo search algorithm, Image segmentation, Multilevel thresholding, Particle swarm optimization.

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429 Design of Low Noise Amplifiers for 10 GHz Application

Authors: Makesh Iyer, T. Shanmuganantham

Abstract:

This work deals with the designing of an efficient low noise amplifier for 10.00 GHz applications. The amplifier is designed using Gallium Arsenide High Electron Mobility Transistor (GaAs HEMT) ATF – 36077 with inductive source degeneration technique which is one of the techniques to improve the stability of the potentially unstable device and make it unconditionally stable. Also, different substrates are used for designing the LNA to identify the suitable substrate that gives optimum results. It is observed that the noise immunity is more in Low Noise Amplifier (LNA) designed using RT Duroid 5880 substrate. This design resulted in noise figure of 0.859 dB and power gain of 15.530 dB. The comparative analysis of the LNA design is discussed in this paper.

Keywords: Low noise amplifier, substrate, distributed components, gain, noise figure.

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428 Evaluation of Power Consumption of Spanke Optical Packet Switch

Authors: V. Eramo, E. Miucci, A. Cianfrani, A. Germoni, M. Listanti

Abstract:

The power consumption of an Optical Packet Switch equipped with SOA technology based Spanke switching fabric is evaluated. Sophisticated analytical models are introduced to evaluate the power consumption versus the offered traffic, the main switch parameters, and the used device characteristics. The impact of Amplifier Spontaneous Emission (ASE) noise generated by a transmission system on the power consumption is investigated. As a matter of example for 32×32 switches supporting 64 wavelengths and offered traffic equal to 0,8, the average energy consumption per bit is 5, 07 · 10-2 nJ/bit and increases if ASE noise introduced by the transmission systems is increased.

Keywords: Spanke, Amplifier Spontaneous Emission Noise, Power Consumption, Optical Packet Switch.

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427 Multilevel Fuzzy Decision Support Model for China-s Urban Rail Transit Planning Schemes

Authors: Jin-Bao Zhao, Wei Deng

Abstract:

This paper aims at developing a multilevel fuzzy decision support model for urban rail transit planning schemes in China under the background that China is presently experiencing an unprecedented construction of urban rail transit. In this study, an appropriate model using multilevel fuzzy comprehensive evaluation method is developed. In the decision process, the followings are considered as the influential objectives: traveler attraction, environment protection, project feasibility and operation. In addition, consistent matrix analysis method is used to determine the weights between objectives and the weights between the objectives- sub-indictors, which reduces the work caused by repeated establishment of the decision matrix on the basis of ensuring the consistency of decision matrix. The application results show that multilevel fuzzy decision model can perfectly deal with the multivariable and multilevel decision process, which is particularly useful in the resolution of multilevel decision-making problem of urban rail transit planning schemes.

Keywords: Urban rail transit, planning schemes, multilevel fuzzy decision support model, consistent matrix analysis

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426 Design of Non-Blocking and Rearrangeable Modified Banyan Network with Electro-Optic MZI Switching Elements

Authors: Ghanshyam Singh, Tirtha Pratim Bhattacharjee, R. P. Yadav, V. Janyani

Abstract:

Banyan networks are really attractive for serving as the optical switching architectures due to their unique properties of small depth and absolute signal loss uniformity. The fact has been established that the limitations of blocking nature and the nonavailability of proper connections due to non-rearrangeable property can be easily ruled out using electro-optic MZI switches as basic switching elements. Combination of the horizontal expansion and vertical stacking of optical banyan networks is an appropriate scheme for constructing non-blocking banyan-based optical switching networks. The interconnected banyan switching fabrics (IBSF) have been considered and analyzed to best serve the purpose of optical switching with electro-optic MZI basic elements. The cross/bar state interchange for the switches has been facilitated by appropriate voltage switching or the by the switching of operating wavelength. The paper is dedicated to the modification of the basic switching element being used as well as the architecture of the switching network.

Keywords: MZI switch, Banyan network, Reconfigurable switches.

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425 Inverter Based Gain-Boosting Fully Differential CMOS Amplifier

Authors: Alpana Agarwal, Akhil Sharma

Abstract:

This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The self-biasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for gain boosting. The Miller compensation is also applied to enhance the phase margin. The circuit has been designed and simulated in 1.8 V 0.18 µm CMOS technology. The simulation results show a high DC gain of 100.7 dB, Unity-Gain Bandwidth of 107.8 MHz, and Phase Margin of 66.7o with a power dissipation of 286 μW and makes it suitable candidate for the high resolution pipelined ADCs.

Keywords: CMOS amplifier, gain boosting, inverter-based amplifier, self-biased inverter.

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424 Level Shifted Carrier Signal Based Scalar Random Pulse Width Modulation Algorithms for Cascaded Multilevel Inverter Fed Induction Motor Drive

Authors: M. Nayeemuddin, T. Bramhananda Reddy, M. Vijaya Kumar

Abstract:

Acoustic noise becoming ever more obnoxious radiated by voltage source inverter fed induction motor drive in modern and industrial applications. The drive utilized for industrial and modern applications should use “spread spectrum” innovation known as Random pulse width modulation (PWM) algorithms where acoustic noise emanates through the machine should be critically concerned. This paper illustrates three types of random PWM control algorithms with fixed switching frequency namely 1) Random modulating PWM 2) Random carrier PWM and 3) Random modulating-carrier PWM. The spectrum plots of the motor stator current demonstrate the strength and robustness of the proposed PWM algorithms. To affirm the proposed algorithms, experimental tests have been conducted using dSPACE rt1104 control board on a v/f control three phase induction motor drive fed by DC link cascaded multilevel inverter.

Keywords: Multilevel inverter, acoustic noise, CSVPWM, total harmonic distortion, random PWM algorithm.

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423 Noise Analysis of Single-Ended Input Differential Amplifier using Stochastic Differential Equation

Authors: Tarun Kumar Rawat, Abhirup Lahiri, Ashish Gupta

Abstract:

In this paper, we analyze the effect of noise in a single- ended input differential amplifier working at high frequencies. Both extrinsic and intrinsic noise are analyzed using time domain method employing techniques from stochastic calculus. Stochastic differential equations are used to obtain autocorrelation functions of the output noise voltage and other solution statistics like mean and variance. The analysis leads to important design implications and suggests changes in the device parameters for improved noise characteristics of the differential amplifier.

Keywords: Single-ended input differential amplifier, Noise, stochastic differential equation, mean and variance.

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422 Design and Layout of Two Stage High Band Width Operational Amplifier

Authors: Yasir Mahmood Qureshi

Abstract:

This paper presents the design and layout of a two stage, high speed operational amplifiers using standard 0.35um CMOS technology. The design procedure involves designing the bias circuit, the differential input pair, and the gain stage using CAD tools. Both schematic and layout of the operational amplifier along with the comparison in the results of the two has been presented. The operational amplifier designed, has a gain of 93.51db at low frequencies. It has a gain bandwidth product of 55.07MHz, phase margin of 51.9º and a slew rate of 22v/us for a load of capacitor of 10pF.

Keywords: Gain bandwidth product, Operational Amplifier, phase margin, slew rate.

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421 A Novel Logarithmic Current-Controlled Current Amplifier (LCCA)

Authors: Karama M. AL-Tamimi, Munir A. Al-Absi

Abstract:

A new OTA-based logarithmic-control variable gain current amplifier (LCCA) is presented. It consists of two Operational Transconductance Amplifier (OTA) and two PMOS transistors biased in weak inversion region. The circuit operates from 0.6V DC power supply and consumes 0.6 μW. The linear-dB controllable output range is 43 dB with maximum error less than 0.5dB. The functionality of the proposed design was confirmed using HSPICE in 0.35μm CMOS process technology.

Keywords: LCCA, OTA, Logarithmic, VGA, Weak inversion, Current-mode

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420 Novel Linear Autozeroing Floating-gate Amplifier for Ultra Low-voltage Applications

Authors: Yngvar Berg, Mehdi Azadmehr

Abstract:

In this paper we present a linear autozeroing ultra lowvoltage amplifier. The autozeroing performed by all ULV circuits is important to reduce the impact of noise and especially avoid power supply noise in mixed signal low-voltage CMOS circuits. The simulated data presented is relevant for a 90nm TSMC CMOS process.

Keywords: Low-voltage, trans conductance amplifier, linearity, floating-gate.

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419 A Novel Approach of Multilevel Inverter with Reduced Power Electronics Devices

Authors: M. Jagabar Sathik, K. Ramani

Abstract:

In this paper family of multilevel inverter topology with reduced number of power switches is presented. The proposed inverter can generate both even and odd level. The proposed topology is suitable for symmetric structure. The proposed symmetric inverter results in reduction of power switches, power diode and gate driver circuits and also it may further minimize the installation area and cost. To prove the superiority of proposed topology is compared with conventional topologies. The performance of this symmetric multilevel inverter has been tested by computer based simulation and prototype based experimental setup for nine-level inverter is developed and results are verified.

Keywords: Cascaded H- Bridge (CHB), Multilevel Inverter (MLI), Nearest Level Modulation (NLM), Total Harmonic Distortion (THD).

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