Search results for: Very High Speed Integrated Circuits HardwareDescription Language (VHDL)

Authors: Muhibul Haque Bhuyan

Abstract:

Spintronic, also termed spin electronics or spin transport electronics, is a kind of new technology, which exploits the two fundamental degrees of freedom- spin-state and charge-state of electrons to enhance the operational speed for the data storage and transfer efficiency of the device. Thus, it seems an encouraging technology to combat most of the prevailing complications in orthodox electron-based devices. This novel technology possesses the capacity to mix the semiconductor microelectronics and magnetic devices’ functionalities into one integrated circuit. Traditional semiconductor microelectronic devices use only the electronic charge to process the information based on binary numbers, 0 and 1. Due to the incessant shrinking of the transistor size, we are reaching the final limit of 1 nm or so. At this stage, the fabrication and other device operational processes will become challenging as the quantum effect comes into play. In this situation, we should find an alternative future technology, and spintronic may be such technology to transfer and store information. This review article provides a detailed discussion of the spintronic technology: fundamentals, materials, devices, circuits, challenges, and current research trends. At first, the fundamentals of spintronics technology are discussed. Then types, properties, and other issues of the spintronic materials are presented. After that, fabrication and working principles, as well as application areas and advantages/disadvantages of spintronic devices and circuits, are explained. Finally, the current challenges, current research areas, and prospects of spintronic technology are highlighted. This is a new paradigm of electronic cum magnetic devices built on the charge and spin of the electrons. Modern engineering and technological advances in search of new materials for this technology give us hope that this would be a very optimistic technology in the upcoming days.

Keywords: Spintronic technology, spin, charge, magnetic devices, spintronic devices, spintronic materials.

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Authors: Hong Li, Linfeng Li, Jianping Hu

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With rapid technology scaling, the proportion of the static power consumption catches up with dynamic power consumption gradually. To decrease leakage consumption is becoming more and more important in low-power design. This paper presents a power-gating scheme for P-DTGAL (p-type dual transmission gate adiabatic logic) circuits to reduce leakage power dissipations under deep submicron process. The energy dissipations of P-DTGAL circuits with power-gating scheme are investigated in different processes, frequencies and active ratios. BSIM4 model is adopted to reflect the characteristics of the leakage currents. HSPICE simulations show that the leakage loss is greatly reduced by using the P-DTGAL with power-gating techniques.

Keywords: Leakage reduction, low power, deep submicronCMOS circuits, P-type adiabatic circuits.

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Authors: Shiang-Hwua Yu, Po-Hsun Wu

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This study introduces two types of self-oscillating circuits that are frequently found in power electronics applications. Special effort is made to relate the circuits to the analogous mechanical systems of some important scientific inventions: Galileo’s pendulum clock and Coulomb’s friction model. A little touch of related history and philosophy of science will hopefully encourage curiosity, advance the understanding of self-oscillating systems and satisfy the aspiration of some students for scientific literacy. Finally, the two self-oscillating circuits are applied to design a simple class-D audio amplifier.

Keywords: Self-oscillation, sigma-delta modulator, pendulum clock, Coulomb friction, class-D amplifier.

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Authors: Romain Bosquet, Pierre-Olivier Vandanjon, Alex Coiret, Tristan Lorino

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In the hardening energy context, the transport sector which constitutes a large worldwide energy demand has to be improving for decrease energy demand and global warming impacts. In a controversial situation where subsists an increasing demand for long-distance and high-speed travels, high-speed trains offer many advantages, as consuming significantly less energy than road or air transports. At the project phase of new rail infrastructures, it is nowadays important to characterize accurately the energy that will be induced by its operation phase, in addition to other more classical criteria as construction costs and travel time. Current literature consumption models used to estimate railways operation phase are obsolete or not enough accurate for taking into account the newest train or railways technologies. In this paper, an updated model of consumption for high-speed is proposed, based on experimental data obtained from full-scale tests performed on a new high-speed line. The assessment of the model is achieved by identifying train parameters and measured power consumptions for more than one hundred train routes. Perspectives are then discussed to use this updated model for accurately assess the energy impact of future railway infrastructures.

Keywords: High-speed train, energy, model, track profile, infrastructure

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Authors: Muhammad I. Ibrahimy, Mamun B.I. Reaz, Khandaker Asaduzzaman, Sazzad Hussain

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An approach to develop the FPGA of a flexible key RSA encryption engine that can be used as a standard device in the secured communication system is presented. The VHDL modeling of this RSA encryption engine has the unique characteristics of supporting multiple key sizes, thus can easily be fit into the systems that require different levels of security. A simple nested loop addition and subtraction have been used in order to implement the RSA operation. This has made the processing time faster and used comparatively smaller amount of space in the FPGA. The hardware design is targeted on Altera STRATIX II device and determined that the flexible key RSA encryption engine can be best suited in the device named EP2S30F484C3. The RSA encryption implementation has made use of 13,779 units of logic elements and achieved a clock frequency of 17.77MHz. It has been verified that this RSA encryption engine can perform 32-bit, 256-bit and 1024-bit encryption operation in less than 41.585us, 531.515us and 790.61us respectively.

Keywords: RSA, FPGA, Communication, Security, VHDL.

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Authors: Hasan Çiçekli, Ahmet Gökçen, Uğur Çam

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In this paper, a comparative performance analysis of mostly used four nonlinearity cancellation techniques used to realize the passive resistor by MOS transistors, is presented. The comparison is done by using an integrator circuit which is employing sequentially Op-amp, OTRA and ICCII as active element. All of the circuits are implemented by MOS-C realization and simulated by PSPICE program using 0.35μm process TSMC MOSIS model parameters. With MOS-C realization, the circuits became electronically tunable and fully integrable which is very important in IC design. The output waveforms, frequency responses, THD analysis results and features of the nonlinearity cancellation techniques are also given.

Keywords: Integrator circuits, MOS-C realization, nonlinearity cancellation, tunable resistors.

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Authors: Konstantin Movsovic, Emanuele Stomeo, Tatiana Kalganova

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The evolutionary design of electronic circuits, or evolvable hardware, is a discipline that allows the user to automatically obtain the desired circuit design. The circuit configuration is under the control of evolutionary algorithms. Several researchers have used evolvable hardware to design electrical circuits. Every time that one particular algorithm is selected to carry out the evolution, it is necessary that all its parameters, such as mutation rate, population size, selection mechanisms etc. are tuned in order to achieve the best results during the evolution process. This paper investigates the abilities of evolution strategy to evolve digital logic circuits based on programmable logic array structures when different mutation rates are used. Several mutation rates (fixed and variable) are analyzed and compared with each other to outline the most appropriate choice to be used during the evolution of combinational logic circuits. The experimental results outlined in this paper are important as they could be used by every researcher who might need to use the evolutionary algorithm to design digital logic circuits.

Keywords: Evolvable hardware, evolutionary algorithm, digitallogic circuit, mutation rate.

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Authors: Haiyan Wang

Abstract:

Many researchers have been discussing the importance of language input in second language acquisition. The author holds that the bigger problem lies in how to activate language learners' language knowledge and raise their language output consciousness and competence. Analyzing the importance of language output based on theory and reality, this paper mainly explores the essence of language output and its revelation for second language acquisition in order to make second language learners really raise their communicative competence.

Keywords: Language output, second language acquisition, communicative competence.

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Authors: Fujian Wang, Shubin Ruan, Meiwei Dai

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Speed dispersion has tight relation to traffic safety. In this paper, several kinds of indicating parameters (the standard speed deviation, the coefficient of variation, the deviation of V85 and V15, the mean speed deviations, and the difference between adjacent car speeds) are applied to investigate the characteristics of speed dispersion, where V85 and V15 are 85th and 15th percentile speed, respectively. Their relationships are into full investigations and the results show that: there exists a positive relation (linear) between mean speed and the deviation of V85 and V15; while a negative relation (quadratic) between traffic flow and standard speed deviation. The mean speed deviation grows exponentially with mean speed while the absolute speed deviation between adjacent cars grows linearly with the headway. The results provide some basic information for traffic management.

Keywords: Headway, indicating parameters, speed dispersion, urban expressway.

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Authors: Fei Long Wei, Hua Yang, Hai Tao Zhang, Zhou Ping Yin

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In this study, an local invariant generalized Houghtransform (LI-GHT) method is proposed for integrated circuit (IC) visual positioning. The original generalized Hough transform (GHT) is robust to external noise; however, it is not suitable for visual positioning of IC chips due to the four-dimensionality (4D) of parameter space which leads to the substantial storage requirement and high computational complexity. The proposed LI-GHT method can reduce the dimensionality of parameter space to 2D thanks to the rotational invariance of local invariant geometric feature and it can estimate the accuracy position and rotation angle of IC chips in real-time under noise and blur influence. The experiment results show that the proposed LI-GHT can estimate position and rotation angle of IC chips with high accuracy and fast speed. The proposed LI-GHT algorithm was implemented in IC visual positioning system of radio frequency identification (RFID) packaging equipment.

Keywords: Integrated Circuit Visual Positioning, Generalized Hough Transform, Local invariant Generalized Hough Transform, ICpacking equipment.

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Authors: Anil Kumar Pandey

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Power plane noise is the most significant source of signal integrity (SI) issues in a high-speed digital design. In this paper, power integrity (PI) analysis of multiple power planes in a power delivery system of a 12-layer high-speed FPGA board is presented. All 10 power planes of HSD board are analyzed separately by using 3D Electromagnetic based PI solver, then the transient simulation is performed on combined PI data of all planes along with voltage regulator modules (VRMs) and 70 current drawing chips to get the board level power noise coupling on different high-speed signals. De-coupling capacitors are placed between power planes and ground to reduce power noise coupling with signals.

Keywords: Channel simulation, electromagnetic simulation, power-aware signal integrity analysis, power integrity, PIPro.

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Authors: Rozita Borhan, Lam Kien Sieng

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This paper describes I²C Slave implementation using I²C master obtained from the OpenCores website. This website provides free Verilog and VHDL Codes to users. The design implementation for the I²C slave is in Verilog Language and uses EDA tools for ASIC design known as ModelSim from Mentor Graphic. This tool is used for simulation and verification purposes. Common application for this I²C Master-Slave integration is also included. This paper also addresses the advantages and limitations of the said design.

Keywords: I²C, master, opencores, slave, verilog, verification.

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Authors: R .H. Talwekar, S. S Limaye

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The designing of charge pump with high gain Op- Amp is a challenging task for getting faithful response .Design of high performance phase locked loop require ,a design of high performance charge pump .We have designed a operational amplifier for reducing the error caused by high speed glitch in a transistor and mismatch currents . A separate Op-Amp has designed in 180 nm CMOS technology by CADENCE VIRTUOSO tool. This paper describes the design of high performance charge pump for GHz CMOS PLL targeting orthogonal frequency division multiplexing (OFDM) application. A high speed low power consumption Op-Amp with more than 500 MHz bandwidth has designed for increasing the speed of charge pump in Phase locked loop.

Keywords: Charge pump (CP) Orthogonal frequency divisionmultiplexing (OFDM), Phase locked loop (PLL), Phase frequencydetector (PFD), Voltage controlled oscillator (VCO),

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Authors: Yuan L. Lai, Jian H. Chen, Jui P. Hung

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Owning to the high-speed feed rate and ultra spindle speed have been used in modern machine tools, the tool-path generation plays a key role in the successful application of a High-Speed Machining (HSM) system. Because of its importance in both high-speed machining and tool-path generation, approximating a contour by NURBS format is a potential function in CAD/CAM/CNC systems. It is much more convenient to represent an ellipse by parametric form than to connect points laboriously determined in a CNC system. A new approximating method based on optimum processes and NURBS curves of any degree to the ellipses is presented in this study. Such operations can be the foundation of tool-radius compensation interpolator of NURBS curves in CNC system. All operating processes for a CAD tool is presented and demonstrated by practical models.

Keywords: Ellipse, Approximation, NURBS, Optimum.

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Authors: P.K. Sharma, B. Bhargava, S. Akashe

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Power dissipation due to leakage current in the digital circuits is a biggest factor which is considered specially while designing nanoscale circuits. This paper is exploring the ideas of reducing leakage current in static CMOS circuits by stacking the transistors in increasing numbers. Clearly it means that the stacking of OFF transistors in large numbers result a significant reduction in power dissipation. Increase in source voltage of NMOS transistor minimizes the leakage current. Thus stacking technique makes circuit with minimum power dissipation losses due to leakage current. Also some of digital circuits such as full adder, D flip flop and 6T SRAM have been simulated in this paper, with the application of reduction technique on ‘cadence virtuoso tool’ using specter at 45nm technology with supply voltage 0.7V.

Keywords: Stack, 6T SRAM cell, low power, threshold voltage

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Authors: Santanu Santra, Utpal Roy

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The most important mathematical operation for any computing system is addition. An efficient adder can be of greater assistance in designing of any arithmetic circuits. Quantum-dot Cellular Automata (QCA) is a promising nanotechnology to create electronic circuits for computing devices and suitable candidate for next generation of computing systems. The article presents a modest approach to implement a novel XOR gate. The gate is simple in structure and powerful in terms of implementing digital circuits. By applying the XOR gate, the hardware requirement for a QCA circuit can be decrease and circuits can be simpler in level, clock phase and cell count. In order to verify the functionality of the proposed device some implementation of Half Adder (HA) and Full Adder (FA) is checked by means of computer simulations using QCA-Designer tool. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.

Keywords: Clock, Computing system, Majority gate, QCA, QCA Designer.

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Authors: V. M. Levshakov, N. A. Steshenkova, N. A. Nosyrev

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Application of hulls processing technologies, based on high-concentrated energy sources (laser and plasma technologies), allow improve shipbuilding production. It is typical for high-speed vessels construction using steel and aluminum alloys with high precision hulls required. Report describes high-performance technologies for plasma welding (using direct current of reversed polarity), laser, and hybrid laser-arc welding of hulls structures developed by JSC “SSTC”

Keywords: Flat sections, hybrid laser-arc welding, plasma welding, plasmatron.

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Authors: V. Swarnalatha, A. V. Narasimha Rao, P. Pal

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The present research reports the investigation of fast etching of silicon for the fabrication of microelectromechanical systems (MEMS) structures using silicon wet bulk micromachining. Low concentration tetramethyl-ammonium hydroxide (TMAH) and hydroxylamine (NH₂OH) are used as main etchant and additive, respectively. The concentration of NH₂OH is varied to optimize the composition to achieve best etching characteristics such as high etch rate, significantly high undercutting at convex corner for the fast release of the microstructures from the substrate, and improved etched surface morphology. These etching characteristics are studied on Si{100} and Si{110} wafers as they are most widely used in the fabrication of MEMS structures as wells diode, transistors and integrated circuits.

Keywords: KOH, MEMS, micromachining, silicon, TMAH, wet anisotropic etching.

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Authors: Ching-Feng Chen, Ching-Chih Tsai

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With the size of the transistor gradually approaching the physical limit, it challenges the persistence of Moore’s Law due to such issues of the short channel effect and the development of the high numerical aperture (NA) lithography equipment. In the context of the ever-increasing technical requirements of portable devices and high-performance computing (HPC), relying on the law continuation to enhance the chip density will no longer support the prospects of the electronics industry. Weighing the chip’s power consumption-performance-area-cost-cycle time to market (PPACC) is an updated benchmark to drive the evolution of the advanced wafer nanometer (nm). The advent of two and half- and three-dimensional (2.5 and 3D)- Very-Large-Scale Integration (VLSI) packaging based on Through Silicon Via (TSV) technology has updated the traditional die assembly methods and provided the solution. This overview investigates the up-to-date and cutting-edge packaging technologies for 2.5D and 3D integrated circuits (IC) based on the updated transistor structure and technology nodes. We conclude that multi-chip solutions for 2.5D and 3D IC packaging can prolong Moore’s Law.

Keywords: Moore’s Law, High Numerical Aperture, Power Consumption-Performance-Area-Cost-Cycle Time to Market, PPACC, 2.5 and 3D-Very-Large-Scale Integration Packaging, Through Silicon Vi.

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Authors: Jagadish H. Pujar, S. F. Kodad

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Recent developments in Soft computing techniques, power electronic switches and low-cost computational hardware have made it possible to design and implement sophisticated control strategies for sensorless speed control of AC motor drives. Such an attempt has been made in this work, for Sensorless Speed Control of Induction Motor (IM) by means of Direct Torque Fuzzy Control (DTFC), PI-type fuzzy speed regulator and MRAS speed estimator strategy, which is absolutely nonlinear in its nature. Direct torque control is known to produce quick and robust response in AC drive system. However, during steady state, torque, flux and current ripple occurs. So, the performance of conventional DTC with PI speed regulator can be improved by implementing fuzzy logic techniques. Certain important issues in design including the space vector modulated (SVM) 3-Ф voltage source inverter, DTFC design, generation of reference torque using PI-type fuzzy speed regulator and sensor less speed estimator have been resolved. The proposed scheme is validated through extensive numerical simulations on MATLAB. The simulated results indicate the sensor less speed control of IM with DTFC and PI-type fuzzy speed regulator provides satisfactory high dynamic and static performance compare to conventional DTC with PI speed regulator.

Keywords: Sensor-less Speed Estimator, Fuzzy Logic Control(FLC), SVM, DTC, DTFC, IM, fuzzy speed regulator.

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Authors: Juhi Faridi, Mohd. Ajmal Kafeel

Abstract:

The advancements in the field of Artificial Intelligence (AI) and technology has led to an evolution of an intelligent era. Neural networks, having the computational power and learning ability similar to the brain is one of the key AI technologies. Neuromorphic computing system (NCS) consists of the synaptic device, neuronal circuit, and neuromorphic architecture. Memristor are a promising candidate for neuromorphic computing systems, but when it comes to neuromorphic computing, the conductance behavior of the synaptic memristor or neuronal memristor needs to be studied thoroughly in order to fathom the neuroscience or computer science. Furthermore, there is a need of more simulation work for utilizing the existing device properties and providing guidance to the development of future devices for different performance requirements. Hence, development of NCS needs more simulation work to make use of existing device properties. This work aims to provide an insight to build neuronal circuits using memristors to achieve a Memristor based NCS.  Here we throw a light on the research conducted in the field of memristors for building analog and digital circuits in order to motivate the research in the field of NCS by building memristor based neural circuits for advanced AI applications. This literature is a step in the direction where we describe the various Key findings about memristors and its analog and digital circuits implemented over the years which can be further utilized in implementing the neuronal circuits in the NCS. This work aims to help the electronic circuit designers to understand how the research progressed in memristors and how these findings can be used in implementing the neuronal circuits meant for the recent progress in the NCS.

Keywords: Analog circuits, digital circuits, memristors, neuromorphic computing systems.

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Authors: Ararat Khachatryan, Davit Mirzoyan

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In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.

Keywords: Nanoscale, aging, effect, NBTI, HCI.

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Authors: Etsuo Morishita

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In this paper, we show shallow water in a tin box as an analogous simulation tool for high-speed aerodynamics education and research. It is customary that we use a water tank to create shallow water flow. While a flow in a water tank is not necessarily uniform and is sometimes wavy, we can visualize a clear supercritical flow even when we move a body manually in stationary water in a simple shallow tin box. We can visualize a blunt shock wave around a moving circular cylinder together with a shock pattern around a diamond airfoil. Another interesting analogous experiment is a hydrodynamic shock tube with water and tea. We observe the contact surface clearly due to color difference of the two liquids those are invisible in the real gas dynamics experiment. We first revisit the similarities between high-speed aerodynamics and shallow water hydraulics. Several educational and research experiments are then introduced for engineering students. Shallow water experiments in a tin box simulate properly the high-speed flows.

Keywords: Aerodynamics compressible flow, gas dynamics, hydraulics, shock wave.

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Authors: Ashish Dhamaniya, Satish Chandra

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Speed and traffic volume data are collected on different sections of four lane and six lane roads in three metropolitan cities in India. Speed data are analyzed to fit the statistical distribution to individual vehicle speed data and all vehicles speed data. It is noted that speed data of individual vehicle generally follows a normal distribution but speed data of all vehicle combined at a section of urban road may or may not follow the normal distribution depending upon the composition of traffic stream. A new term Speed Spread Ratio (SSR) is introduced in this paper which is the ratio of difference in 85^th and 50^th percentile speed to the difference in 50^th and 15^th percentile speed. If SSR is unity then speed data are truly normally distributed. It is noted that on six lane urban roads, speed data follow a normal distribution only when SSR is in the range of 0.86 – 1.11. The range of SSR is validated on four lane roads also.

Keywords: Normal distribution, percentile speed, speed spread ratio, traffic volume.

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Authors: Murugan Marimuthu, Jeyabharath Rajaih

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This paper describes a simple way to control the speed of PMBLDC motor using Fuzzy logic control method. In the conventional PI controller the performance of the motor system is simulated and the speed is regulated by using PI controller. These methods used to improve the performance of PMSM drives, but in some cases at different operating conditions when the dynamics of the system also vary over time and it can change the reference speed, parameter variations and the load disturbance. The simulation is powered with the MATLAB program to get a reliable and flexible simulation. In order to highlight the effectiveness of the speed control method the FLC method is used. The proposed method targeted in achieving the improved dynamic performance and avoids the variations of the motor drive. This drive has high accuracy, robust operation from near zero to high speed. The effectiveness and flexibility of the individual techniques of the speed control method will be thoroughly discussed for merits and demerits and finally verified through simulation and experimental results for comparative analysis.

Keywords: Hall position sensors, permanent magnet brushless DC motor, PI controller, Fuzzy Controller.

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Authors: Ahmed E. Hodaib, Samar F. Abdel Fattah

Abstract:

High-speed transportation is a growing concern. To develop high-speed rails and to increase high-speed efficiencies, the idea of Hyperloop was introduced. The challenge is to overcome the difficulties of managing friction and air-resistance which become substantial when vehicles approach high speeds. In this paper, we are presenting the methodologies of the capsule design which got a design concept innovation award at SpaceX competition in January, 2016. MATLAB scripts are written for the levitation and propulsion calculations and iterations. Computational Fluid Dynamics (CFD) is used to simulate the air flow around the capsule considering the effect of the axial-flow air compressor and the levitation cushion on the air flow. The design procedures of a single-sided linear induction motor are analyzed in detail and its geometric and magnetic parameters are determined. A structural design is introduced and Finite Element Method (FEM) is used to analyze the stresses in different parts. The configuration and the arrangement of the components are illustrated. Moreover, comments on manufacturing are made.

Keywords: High-speed transportation, Hyperloop, railways transportation, single-sided linear induction motor.

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Authors: S. Di Benedetto, M. P. Di Donato, A. Rispoli, S. Cardone, J. Riehmer, J. Steelant, L. Vecchione

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Thanks to a coordinated funding by the European Space Agency (ESA) and the European Commission (EC) within the 7th framework program, the High-Speed Experimental Fly Vehicles – International (HEXAFLY-INT) project is aimed at the flight validation of hypersonics technologies enabling future trans-atmospheric flights. The project, which is currently involving partners from Europe, Russian Federation and Australia operating under ESA/ESTEC coordination, will achieve the goal of designing, manufacturing, assembling and flight testing an unpowered high speed vehicle in a glider configuration by 2018. The main technical challenges of the project are specifically related to the design of the vehicle gliding configuration and to the complexity of integrating breakthrough technologies with standard aeronautical technologies, e.g. high temperature protection system and airframe cold structures. Also, the sonic boom impact, which is one of the environmental challenges of the high speed flight, will be assessed. This paper provides a comprehensive and detailed update on all the current projects activities carried out to date on both the vehicle and mission design.

Keywords: Design, flight testing, hypersonics, integration.

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Authors: M. Zerikat, S. Chekroun

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This paper proposes an effective adaptation learning algorithm based on artificial neural networks for speed control of an induction motor assumed to operate in a high-performance drives environment. The structure scheme consists of a neural network controller and an algorithm for changing the NN weights in order that the motor speed can accurately track of the reference command. This paper also makes uses a very realistic and practical scheme to estimate and adaptively learn the noise content in the speed load torque characteristic of the motor. The availability of the proposed controller is verified by through a laboratory implementation and under computation simulations with Matlab-software. The process is also tested for the tracking property using different types of reference signals. The performance and robustness of the proposed control scheme have evaluated under a variety of operating conditions of the induction motor drives. The obtained results demonstrate the effectiveness of the proposed control scheme system performances, both in steady state error in speed and dynamic conditions, was found to be excellent and those is not overshoot.

Keywords: Electric drive, Induction motor, speed control, Adaptive control, neural network, High Performance.

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Authors: S. Saraç, F. Kara, C.Vural

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High-frequency (HF) communications have been used by military organizations for more than 90 years. The opportunity of very long range communications without the need for advanced equipment makes HF a convenient and inexpensive alternative of satellite communications. Besides the advantages, voice and data transmission over HF is a challenging task, because the HF channel generally suffers from Doppler shift and spread, multi-path, cochannel interference, and many other sources of noise. In constructing an HF data modem, all these effects must be taken into account. STANAG 4539 is a NATO standard for high-speed data transmission over HF. It allows data rates up to 12800 bps over an HF channel of 3 kHz. In this work, an efficient implementation of STANAG 4539 on a single Texas Instruments- TMS320C6747 DSP chip is described. The state-of-the-art algorithms used in the receiver and the efficiency of the implementation enables real-time high-speed data / digitized voice transmission over poor HF channels.

Keywords: High frequency, modem, STANAG 4539.

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Authors: Jelena Slugan, Ivica Ružić

Abstract:

We are witnessing the rapid development of technologies that change the world around us. However, curriculums and teaching processes are often slow to adapt to the change; it takes time, money and expertise to implement technology in the classroom. Therefore, the University of Split, Croatia, partnered with local school Marko Marulić High School and created the project "Modern competence in modern high schools" as part of which five different curriculums for STEM areas were developed. One of the curriculums involves combining information technology with physics. The main idea was to teach students how to use different circuits and microcomputers to explore nature and physical phenomena. As a result, using electrical circuits, students are able to recreate in the classroom the phenomena that they observe every day in their environment. So far, high school students had very little opportunity to perform experiments independently, and especially, those physics experiment did not involve ICT. Therefore, this project has a great importance, because the students will finally get a chance to develop themselves in accordance to modern technologies. This paper presents some new methods of teaching physics that will help students to develop experimental skills through the study of deterministic nature of physical laws. Students will learn how to formulate hypotheses, model physical problems using the electronic circuits and evaluate their results. While doing that, they will also acquire useful problem solving skills.

Keywords: ICT in physics, curriculum, laboratory activities, STEM.

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