Commenced in January 2007
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Design of High Gain, High Bandwidth Op-Amp for Reduction of Mismatch Currents in Charge Pump PLL in 180 nm CMOS Technology

Authors: R .H. Talwekar, S. S Limaye


The designing of charge pump with high gain Op- Amp is a challenging task for getting faithful response .Design of high performance phase locked loop require ,a design of high performance charge pump .We have designed a operational amplifier for reducing the error caused by high speed glitch in a transistor and mismatch currents . A separate Op-Amp has designed in 180 nm CMOS technology by CADENCE VIRTUOSO tool. This paper describes the design of high performance charge pump for GHz CMOS PLL targeting orthogonal frequency division multiplexing (OFDM) application. A high speed low power consumption Op-Amp with more than 500 MHz bandwidth has designed for increasing the speed of charge pump in Phase locked loop.

Keywords: phase locked loop (PLL), Charge pump (CP) Orthogonal frequency divisionmultiplexing (OFDM), Phase frequencydetector (PFD), Voltage controlled oscillator (VCO)

Digital Object Identifier (DOI):

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