Search results for: Redundancy Switched Capacitor Sample and Hold Circuit

Authors: Phakhapong Thanitakul, Worawat Sa-ngiamvibool, Apinan Aurasopon, Saravuth Pothiya

Abstract:

This paper presents an improved ant colony optimization (IACO) for solving the reliability redundancy allocation problem (RAP) in order to maximize system reliability. To improve the performance of ACO algorithm, two additional techniques, i.e. neighborhood search, and re-initialization process are presented. To show its efficiency and effectiveness, the proposed IACO is applied to solve three RAPs. Additionally, the results of the proposed IACO are compared with those of the conventional heuristic approaches i.e. genetic algorithm (GA), particle swarm optimization (PSO) and ant colony optimization (ACO). The experimental results show that the proposed IACO approach is comparatively capable of obtaining higher quality solution and faster computational time.

Keywords: Ant colony optimization, Heuristic algorithm, Mixed-integer nonlinear programming, Redundancy allocation problem, Reliability optimization.

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: Mohsen Bagheri, Ahmad Afifi

Abstract:

This paper presents a new method for read out of the piezoresistive accelerometer sensors. The circuit works based on Instrumentation amplifier and it is useful for reducing offset In Wheatstone Bridge. The obtained gain is 645 with 1μv/°c Equivalent drift and 1.58mw power consumption. A Schmitt trigger and multiplexer circuit control output node. a high speed counter is designed in this work .the proposed circuit is designed and simulated In 0.18μm CMOS technology with 1.8v power supply.

Keywords: Piezoresistive accelerometer, zero offset, Schmitt trigger, bidirectional reversible counter

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Authors: Marwen Kermani, Anis Sakly, Faouzi M'sahli

Abstract:

In this paper, we aim to investigate a new stability analysis for discrete-time switched linear systems based on the comparison, the overvaluing principle, the application of Borne-Gentina criterion and the Kotelyanski conditions. This stability conditions issued from vector norms correspond to a vector Lyapunov function. In fact, the switched system to be controlled will be represented in the Companion form. A comparison system relative to a regular vector norm is used in order to get the simple arrow form of the state matrix that yields to a suitable use of Borne-Gentina criterion for the establishment of sufficient conditions for global asymptotic stability. This proposed approach could be a constructive solution to the state and static output feedback stabilization problems.

Keywords: Discrete-time switched linear systems, Global asymptotic stability, Vector norms, Borne-Gentina criterion, Arrow form state matrix, Arbitrary switching, State feedback controller, Static output feedback controller.

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Authors: Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert

Abstract:

Evolvable hardware (EHW) refers to a selfreconfiguration hardware design, where the configuration is under the control of an evolutionary algorithm (EA). A lot of research has been done in this area several different EA have been introduced. Every time a specific EA is chosen for solving a particular problem, all its components, such as population size, initialization, selection mechanism, mutation rate, and genetic operators, should be selected in order to achieve the best results. In the last three decade a lot of research has been carried out in order to identify the best parameters for the EA-s components for different “test-problems". However different researchers propose different solutions. In this paper the behaviour of mutation rate on (1+λ) evolution strategy (ES) for designing logic circuits, which has not been done before, has been deeply analyzed. The mutation rate for an EHW system modifies values of the logic cell inputs, the cell type (for example from AND to NOR) and the circuit output. The behaviour of the mutation has been analyzed based on the number of generations, genotype redundancy and number of logic gates used for the evolved circuits. The experimental results found provide the behaviour of the mutation rate to be used during evolution for the design and optimization of logic circuits. The researches on the best mutation rate during the last 40 years are also summarized.

Keywords: Evolvable hardware, mutation rate, evolutionarycomputation, design of logic circuit.

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Authors: Ararat Khachatryan, Davit Mirzoyan

Abstract:

In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.

Keywords: Nanoscale, aging, effect, NBTI, HCI.

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Authors: Wee Leong Son, Hasmayadi Abdul Majid, Rohana Musa

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This paper study the segmented split capacitor Digital-to-Analog Converter (DAC) implemented in a differentialtype 12-bit Successive Approximation Analog-to-Digital Converter (SA-ADC). The series capacitance split array method employed as it reduced the total area of the capacitors required for high resolution DACs. A 12-bit regular binary array structure requires 2049 unit capacitors (Cs) while the split array needs 127 unit Cs. These results in the reduction of the total capacitance and power consumption of the series split array architectures as to regular binary-weighted structures. The paper will show the 12-bit DAC series split capacitor with 4-bit thermometer coded DAC architectures as well as the simulation and measured results.

Keywords: Successive Approximation Register Analog-to- Digital Converter, SAR ADC, Low voltage ADC.

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Authors: Ajibola O. Akinrinde, Andrew Swanson, Remy Tiako

Abstract:

There exist significant losses on transmission lines due to distance, as power generating stations could be located far from some isolated settlements. Standalone wind farms could be a good choice of alternative power generation for such settlements that are far from the grid due to factors of long distance or socio-economic problems. However, uncompensated wind farms consume reactive power since wind turbines are induction generators. Therefore, capacitor banks are used to compensate reactive power, which in turn improves the voltage profile of the network. Although capacitor banks help improving voltage profile, they also undergo switching actions due to its compensating response to the variation of various types of load at the consumer’s end. These switching activities could cause transient overvoltage on the network, jeopardizing the end-life of other equipment on the system. In this paper, the overvoltage caused by these switching activities is investigated using the IEEE bus 14-network to represent a standalone wind farm, and the simulation is done using ATP/EMTP software. Scenarios involving the use of pre-insertion resistor and pre-insertion inductor, as well as controlled switching was also carried out in order to decide the best mitigation option to reduce the overvoltage.

Keywords: Capacitor banks, IEEE bus 14-network, Pre-insertion resistor, Standalone wind farm.

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Authors: Shanmuka Naga Raju

Abstract:

This paper  presents PV system without considering transformer connected to electric grid. This is considered more economic compared to present PV system. The problem that occurs when transformer is not considered appears with a leakage current near capacitor connected to ground. Bipolar Pulse Width Modulation (BPWM) technique along with filter L-C-L configuration in the circuit is modeled to shrink the leakage current in the circuit. The DC/AC inverter is modeled using H-bridge Insulated Gate Bipolar Transistor (IGBT) module which is controlled using proposed Bipolar PWM control technique. To extract maximum power, Maximum Power Point Technique (MPPT) controller is used in this model. Voltage and current regulators are used to determine the reference voltage for the inverter from active and reactive current where reactive current is set to zero. The PLL is modeled to synchronize the measurements. The model is designed with MATLAB Simulation blocks and compared with the methods available in literature survey to show its effectiveness.

Keywords: Photovoltaic, PV, pulse width modulation, PWM, perturb and observe, phase locked loop.

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Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo

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In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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Authors: Adrian T. Plesca

Abstract:

This paper describes a three-dimensional thermal model of the current path included in the low voltage power circuit breakers. The model can be used to analyse the thermal behaviour of the current path during both steady-state and transient conditions. The current path lengthwise temperature distribution and timecurrent characteristic of the terminal connections of the power circuit breaker have been obtained. The influence of the electric current and voltage drop on main electric contact of the circuit breaker has been investigated. To validate the three-dimensional thermal model, some experimental tests have been done. There is a good correlation between experimental and simulation results.

Keywords: Current path, power circuit breakers, temperature distribution, thermal analysis.

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Authors: Yong Wang, Wang Ling Goh, Jung Hyup Lee, Kevin T. C. Chai, Minkyu Je

Abstract:

This paper presents a resonant-based read-out circuit for capacitive pressure sensors. The proposed read-out circuit consists of an LC oscillator and a counter. The circuit detects the capacitance changes of a capacitive pressure sensor by means of frequency shifts from its nominal operation frequency. The proposed circuit is designed in 0.18m CMOS with an estimated power consumption of 43.1mW. Simulation results show that the circuit has a capacitive resolution of 8.06kHz/fF, which enables it for high resolution pressure detection.

Keywords: Capacitance-to-frequency converter, Capacitive pressure sensor, Digital counter, LC oscillator.

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Authors: Wang Xing-hua, Zhong Shun-an, Zhang Zhuo

Abstract:

A kind of behavior model for discrete sampling and hold amplifier with charge transmission is analyzed. The transfer function and behavior features are based on the main AC responses of operation amplifier. The result used in pipelined and sigma-delta ADC shows the exact of model of sampling and hold amplifier, and the non-ideal factors are taken into account.

Keywords: SHA, response, behavior, transfer function.

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Authors: S. Pradittara, M. Uthansakul, P. Uthansakul

Abstract:

A concept of switched beam antennas consisting of 2×2 rectangular array spaced by λ/4 accompanied with a null locating has been proposed in the previous work. In this letter, the performance evaluations of its prototype are presented. The benefits of using proposed system have been clearly measured in term of signal quality, throughput and delays. Also, the impact of position shift which mesh router is not located on the expected beam direction has also been investigated.

Keywords: Antenna array, Beamforming, Null steering, WMNs.

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Authors: Zaharani Ahmad, Nor Hashimah Jalaluddin

Abstract:

The aim of this paper is to examine and identify the issue of linguistic redundancy in two competing grammars of Malay, namely the school grammar and the corpus grammar. The former is a normative grammar which is formally and prescriptively taught in the classroom, whereas the latter is a descriptive grammar that is informally acquired and mastered by the students as native speakers of the language outside the classroom. Corpus grammar is depicted based on its actual used in natural occurring texts, as attested in the corpus. It is observed that the grammar taught in schools is incompatible with the grammar used in the corpus. For instance, a noun phrase containing nominal reduplicated form which denotes plurality (i.e. murid-murid ‘students’ which is derived from murid ‘student’) and a modifier categorized as quantifiers (i.e. semua ‘all’, seluruh ‘entire’, and kebanyakan ‘most’) is not acceptable in the school grammar because the formation (i.e. semua murid-murid ‘all the students’ kebanyakan pelajar-pelajar ‘most of the students’) is claimed to be redundant, and redundancy is prohibited in the grammar. Redundancy is generally construed as the property of speech and language by which more information is provided than is precisely required for the message to be understood, so that, if some information is omitted, the remaining information will still be sufficient for the message to be comprehended. Thus, the correct construction to be used is strictly the reduplicated form (i.e. murid-murid ‘students’) or the quantifier plus the root (i.e. semua murid ‘all the students’) with the intention that the grammatical meaning of plural is not repeated. Nevertheless, the so-called redundant form (i.e. kebanyakan pelajar-pelajar ‘most of the students’) is frequently used in the corpus grammar. This study shows that there are a number of redundant forms occur in the morphology of the language, particularly in affixation, reduplication and combination of both. Apparently, the so-called redundancy has grammatical and socio-cultural functions in communication that is to give emphasis and to stress the importance of the information delivered by the speakers or writers.

Keywords: Corpus grammar, morphology, redundancy, school grammar.

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Authors: T. Thosdeekoraphat, S. Summart, C. Saetiaw, S. Santalunai, C. Thongsopa

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This article presents a current-mode universal biquadratic filter. The proposed circuit can apparently provide standard functions of the biquad filter: low-pass, high-pass, bandpass, band-reject and all-pass functions. The circuit uses 4 current controlled transconductance amplifiers (CCTAs) and 2 grounded capacitors. In addition, the pole frequency and quality factor can be adjusted by electronic method by adjusting the bias currents of the CCTA. The proposed circuit uses only grounded capacitors without additional external resistors, the proposed circuit is considerably appropriate to further developing into an integrated circuit. The results of PSPICE simulation program are corresponding to the theoretical analysis.

Keywords: Resistor-less, Current-mode, Biquad filter, CCTA.

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Authors: Kimberly Jane S. Uy, Patricia Angela Reyes-Abu, Wen Yaw Chung

Abstract:

A high precision temperature insensitive current and voltage reference generator is presented. It is specifically developed for temperature compensated oscillator. The circuit, designed using MXIC 0.5um CMOS technology, has an operating voltage that ranges from 2.6V to 5V and generates a voltage of 1.21V and a current of 6.38 ӴA. It exhibits a variation of ±0.3nA for the current reference and a stable output for voltage reference as the temperature is varied from 0°C to 70°C. The power supply rejection ratio obtained without any filtering capacitor at 100Hz and 10MHz is -30dB and -12dB respectively.

Keywords: Current reference, voltage reference, threshold voltage, temperature compensation, mobility.

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Authors: R. Srinivasa Rao

Abstract:

This paper presents a new method which applies an artificial bee colony algorithm (ABC) for capacitor placement in distribution systems with an objective of improving the voltage profile and reduction of power loss. The ABC algorithm is a new population based meta heuristic approach inspired by intelligent foraging behavior of honeybee swarm. The advantage of ABC algorithm is that it does not require external parameters such as cross over rate and mutation rate as in case of genetic algorithm and differential evolution and it is hard to determine these parameters in prior. The other advantage is that the global search ability in the algorithm is implemented by introducing neighborhood source production mechanism which is a similar to mutation process. To demonstrate the validity of the proposed algorithm, computer simulations are carried out on 69-bus system and compared the results with the other approach available in the literature. The proposed method has outperformed the other methods in terms of the quality of solution and computational efficiency.

Keywords: Distribution system, Capacitor Placement, Loss reduction, Artificial Bee Colony Algorithm.

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Authors: A. Peniak, J. Makarovič, P. Rafajdus, P. Dúbravka

Abstract:

The purpose of this work is to optimize a Switched Reluctance Motor (SRM) for an automotive application, specifically for a fully electric car. A new optimization approach is proposed. This unique approach transforms automotive customer requirements into an optimization problem, based on sound knowledge of a SRM theory. The approach combines an analytical and a finite element analysis of the motor to quantify static nonlinear and dynamic performance parameters, as phase currents and motor torque maps, an output power and power losses in order to find the optimal motor as close to the reality as possible, within reasonable time. The new approach yields the optimal motor which is competitive with other types of already proposed motors for automotive applications. This distinctive approach can also be used to optimize other types of electrical motors, when parts specifically related to the SRM are adjusted accordingly.

Keywords: Automotive, drive system, electric car, finite element method, hybrid car, optimization, switched reluctance motor.

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Authors: Surapong Siripongdee, Witthaya Mekhum

Abstract:

This article presents a voltage-mode universal biquadratic filter performing simultaneous 3 standard functions: lowpass, high-pass and band-pass functions, employing differential different current conveyor (DDCC) and current controlled current conveyor (CCCII) as active element. The features of the circuit are that: the quality factor and pole frequency can be tuned independently via the input bias currents: the circuit description is very simple, consisting of 1 DDCC, 2 CCCIIs, 2 electronic resistors and 2 grounded capacitors. Without requiring component matching conditions, the proposed circuit is very appropriate to further develop into an integrated circuit. The PSPICE simulation results are depicted. The given results agree well with the theoretical anticipation.

Keywords: Filter, DDCC, CCCII, Analog circuit, Voltagemode, PSPICE

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Authors: Atefeh Pourshafie, Mohsen. Saniei, S. S. Mortazavi, A. Saeedian

Abstract:

In this paper optimal capacitor placement problem has been formulated in a restructured distribution network. In this scenario the distribution network operator can consider reactive energy also as a service that can be sold to transmission system. Thus search for optimal location, size and number of capacitor banks with the objective of loss reduction, maximum income from selling reactive energy to transmission system and return on investment for capacitors, has been performed. Results is influenced with economic value of reactive energy, therefore problem has been solved for various amounts of it. The implemented optimization technique is genetic algorithm. For any value of reactive power economic value, when reverse of investment index increase and change from zero or negative values to positive values, the threshold value of selling reactive power has been obtained. This increasing price of economic parameter is reasonable until the network losses is less than loss before compensation.

Keywords: capacitor placement, deregulated electric market, distribution network optimization.

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Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

Abstract:

The resistive-inductive-capacitive behavior of long interconnects which are driven by CMOS gates are presented in this paper. The analysis is based on the ¤Ç-model of a RLC load and is developed for submicron devices. Accurate and analytical expressions for the output load voltage, the propagation delay and the short circuit power dissipation have been proposed after solving a system of differential equations which accurately describe the behavior of the circuit. The effect of coupling capacitance between input and output and the short circuit current on these performance parameters are also incorporated in the proposed model. The estimated proposed delay and short circuit power dissipation are in very good agreement with the SPICE simulation with average relative error less than 6%.

Keywords: Delay, Inverter, Short Circuit Power, ¤Ç-Model, RLCInterconnect, VLSI

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Authors: Chi-Fang Huang, Xi-Zhang Lin, Yi-Ru Yang

Abstract:

Aiming the application of localized hyperthermia, a magnetic induction system with new approaches is proposed. The techniques in this system for improving the effectiveness of localized hyperthermia are that using magnetic circuit and the multiple-coil array instead of a giant coil for generating magnetic field. Specially, amorphous metal is adopted as the material of magnetic circuit. Detail design parameters of hardware are well described. Simulation tool is employed for this work and experiment result is reported as well.

Keywords: cancer therapy, hyperthermia, Helmholtz coil, induction heating, magnetic circuit.

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Authors: Georgios C. Dogiamis, Bedrich J. Hosticka, Anton Grabmaier

Abstract:

In this work the effects of uniaxial mechanical stress on a pixel readout circuit are theoretically analyzed. It is the effects of mechanical stress on the in-pixel transistors do not arise at the output, when a correlated double sampling circuit is used. However, mechanical stress effects on the photodiode will directly appear at the readout chain output. Therefore, compensation techniques are needed to overcome this situation. Moreover simulation technique of mechanical stress is proposed and diverse layout as well as design recommendations are put forward, in order to minimize stress related effects on the output of a circuit. he shown, that wever, Moreover, a out

Keywords: mechanical uniaxial stress, pixel readout circuit

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Authors: Peng Lu, Branimir Radisavljevic, Martin Seeger, Daniel Over, Torsten Votteler, Bernardo Galletti

Abstract:

CO₂-based gas mixtures exhibit huge potential as the interruption medium for replacing SF₆ in high voltage switchgears. In this paper, the recovery characteristics of dielectric strength of CO₂-O₂ mixture in the post arc phase after the current zero are presented. As representative examples, the dielectric recovery curves under conditions of different gas filling pressures and short-circuit current amplitudes are presented. A series of dielectric recovery measurements suggests that the dielectric recovery rate is proportional to the mass flux of the blowing gas, and the dielectric strength recovers faster in the case of lower short circuit currents.

Keywords: CO2 mixture, high voltage circuit breakers, dielectric recovery rate, short-circuit current, mass flux.

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Authors: Sun-Ki Hong, Nam-HeeByeon, Jung-Seop Lee, Tae-Sam Kang

Abstract:

For Common R or R-L load to apply arbitrary voltage, the bridge traditional inverters don’t have any difficulties by PWM method. However for driving some piezoelectric actuator, arbitrary voltage not a pulse but a steady voltage should be applied. Piezoelectric load is considered as R-C load and its voltage does not decrease even though the applied voltage decreases. Therefore it needs some special inverter with circuit that can discharge the capacitive energy. Especially for unidirectional arbitrary voltage driving like as sine wave, it becomes more difficult problem. In this paper, a charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator is proposed. The circuit has charging and discharging switches for increasing and decreasing output voltage. With the proposed simple circuit, the load voltage can have any unidirectional level with tens of bandwidth because the load voltage can be adjusted by switching the charging and discharging switch appropriately. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: DC-DC converter, analog output voltage, sinusoidal drive, piezoelectric load, discharging circuit.

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Authors: A. Faruk Bakan, İsmail Aksoy, Nihan Altintaş

Abstract:

In this paper, half bridge DC-DC converters with transformer isolation presented in the literature are analyzed for highcurrent and low-voltage applications under the same operation conditions, and compared in terms of losses and efficiency. The conventional and improved half-bridge DC-DC converters are simulated, and current and voltage waveforms are obtained for input voltage Vdc=500V, output current IO=450A, output voltage VO=38V and switching frequency fS=20kHz. IGBTs are used as power semiconductor switches. The power losses of the semiconductor devices are calculated from current and voltage waveforms. From simulation results, it is seen that the capacitor switched half bridge converter has the best efficiency value, and can be preferred at high power and high frequency applications.

Keywords: Isolated half bridge DC-DC converter, high-current low-voltage applications, soft switching, high efficiency.

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Authors: Sheroz Khan, Mustafa Zeki, Shihab Abdel Hameed, AHM Zahirul Alam, Aisha Hassan Abdalla, A. F. Salami, W. A. Lawal

Abstract:

A novel circuit for generating a signal embedded with features about data from three sensors is presented. This suggested circuit is making use of a resistance-to-time converter employing a bridge amplifier, an integrator and a comparator. The second resistive sensor (Rz) is transformed into duty cycle. Another bridge with varying resistor, (Ry) in the feedback of an OP AMP is added in series to change the amplitude of the resulting signal in a proportional relationship while keeping the same frequency and duty cycle representing proportional changes in resistors Rx and Rz already mentioned. The resultant output signal carries three types of information embedded as variations of its frequency, duty cycle and amplitude.

Keywords: Integrator, Comparator, Bridge Circuit, Resistanceto-Time Converter, Conditioning Circuit.

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Authors: C. Ketviriyakit, W. Kongnun, C. Chanapromma, P. Silapan

Abstract:

This article proposes a voltage-mode multifunction filter using differential voltage current controllable current conveyor transconductance amplifier (DV-CCCCTA). The features of the circuit are that: the quality factor and pole frequency can be tuned independently via the values of capacitors: the circuit description is very simple, consisting of merely 1 DV-CCCCTA, and 2 capacitors. Without any component matching conditions, the proposed circuit is very appropriate to further develop into an integrated circuit. Additionally, each function response can be selected by suitably selecting input signals with digital method. The PSpice simulation results are depicted. The given results agree well with the theoretical anticipation.

Keywords: DV-CCCCTA, Voltage-mode, Multifunction filter

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Authors: Rajesh Kumar, Roopali Dogra, Puneet Aggarwal

Abstract:

In the era of technological advancement, use of computer technology has become inevitable. Hence it has become the need of the hour to integrate software methods in engineering curriculum as a part to boost pedagogy techniques. Simulations software is a great help to graduates of disciplines such as electrical engineering. Since electrical engineering deals with high voltages and heavy instruments, extra care must be taken while operating with them. The viable solution would be to have appropriate control. The appropriate control could be well designed if engineers have knowledge of kind of waveforms associated with the system. Though these waveforms can be plotted manually, but it consumes a lot of time. Hence aid of simulation helps to understand steady state of system and resulting in better performance. In this paper computer, aided teaching of transformer is carried out using MATLAB/Simulink. The test carried out on a transformer includes open circuit test and short circuit respectively. The respective parameters of transformer are then calculated using the values obtained from open circuit and short circuit test respectively using Simulink.

Keywords: Computer aided teaching, transformer, open circuit test, short circuit test, Simulink.

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