Search results for: Printed Circuit Boards
677 Pre-Analysis of Printed Circuit Boards Based On Multispectral Imaging for Vision Based Recognition of Electronics Waste
Authors: Florian Kleber, Martin Kampel
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The increasing demand of gallium, indium and rare-earth elements for the production of electronics, e.g. solid state-lighting, photovoltaics, integrated circuits, and liquid crystal displays, will exceed the world-wide supply according to current forecasts. Recycling systems to reclaim these materials are not yet in place, which challenges the sustainability of these technologies. This paper proposes a multispectral imaging system as a basis for a vision based recognition system for valuable components of electronics waste. Multispectral images intend to enhance the contrast of images of printed circuit boards (single components, as well as labels) for further analysis, such as optical character recognition and entire printed circuit board recognition. The results show, that a higher contrast is achieved in the near infrared compared to ultraviolett and visible light.
Keywords: Electronic Waste, Recycling, Multispectral Imaging, Printed Circuit Boards, Rare-Earth Elements.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2685676 Genetic Algorithm Application in a Dynamic PCB Assembly with Carryover Sequence- Dependent Setups
Authors: M. T. Yazdani Sabouni, Rasaratnam Logendran
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We consider a typical problem in the assembly of printed circuit boards (PCBs) in a two-machine flow shop system to simultaneously minimize the weighted sum of weighted tardiness and weighted flow time. The investigated problem is a group scheduling problem in which PCBs are assembled in groups and the interest is to find the best sequence of groups as well as the boards within each group to minimize the objective function value. The type of setup operation between any two board groups is characterized as carryover sequence-dependent setup time, which exactly matches with the real application of this problem. As a technical constraint, all of the boards must be kitted before the assembly operation starts (kitting operation) and by kitting staff. The main idea developed in this paper is to completely eliminate the role of kitting staff by assigning the task of kitting to the machine operator during the time he is idle which is referred to as integration of internal (machine) and external (kitting) setup times. Performing the kitting operation, which is a preparation process of the next set of boards while the other boards are currently being assembled, results in the boards to continuously enter the system or have dynamic arrival times. Consequently, a dynamic PCB assembly system is introduced for the first time in the assembly of PCBs, which also has characteristics similar to that of just-in-time manufacturing. The problem investigated is computationally very complex, meaning that finding the optimal solutions especially when the problem size gets larger is impossible. Thus, a heuristic based on Genetic Algorithm (GA) is employed. An example problem on the application of the GA developed is demonstrated and also numerical results of applying the GA on solving several instances are provided.Keywords: Genetic algorithm, Dynamic PCB assembly, Carryover sequence-dependent setup times, Multi-objective.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1569675 Effects of Modified Bottom Boards on the Performance of Honeybee Colonies
Authors: M. Keshlaf, R. Spooner-Hart
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Australia does not have varroa mite. However, we investigated whether modified hive bottom boards used for varroa mite management in honey bee colonies had other benefits, for honey production. We compared a number of colony parameters between hives fitted with tube, mesh and conventional (solid) bottom boards in two locations in eastern Australian, Richmond NSW and Castlemaine Victoria. Colonies housed in hives with mesh and tube bottom boards were not significantly superior to those in hives with conventional bottom boards with regard to bee flight activity, nor did they produce more honey, brood or stored pollen, in either experimental site. Although the trial was conducted over only one season, it is suggested that there may be no benefit in Australian bee keepers changing from using conventional bottom boards in the absence of varroamite.
Keywords: Apis mellifera, honey production, mesh bottom boards, tube bottom boards.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2092674 Evaluation of Anti-Varroa Bottom Boards to Control Small Hive Beetle (Aethina tumida)
Authors: M. Keshlaf, R. Spooner-Hart
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Australia does not have varroa mite. However, we investigated the efficacy of modified hive bottom boards used for varroa mite management in honeybee colonies to control small hive beetle, Aethina tumida. We assessed infestation levels between hives fitted with tube, mesh and conventional (solid) bottom boards in Richmond, NSW eastern Australian. Colonies housed in hives with tube bottom boards were significantly superior to those in hives with conventional and mesh bottom boards. Even though in-hive beetle populations were generally low during the trial period, hives fitted with tube bottom boards however, had fewer small hive beetles than other hives. Although the trial was conducted over only one season, it suggests that there may be benefit in Australian beekeepers changing from using conventional bottom boards even with the absence of varroa mite, when small hive beetle is present.
Keywords: Aethina tumida, Apis mellifera, mesh bottom boards, tube bottom boards.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2618673 Coreless Printed Circuit Board (PCB) Stepdown Transformers for DC-DC Converter Applications
Authors: Radhika Ambatipudi, Hari Babu Kotte, Dr. Kent Bertilsson
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In this paper, multilayered coreless printed circuit board (PCB) step-down power transformers for DC-DC converter applications have been designed, manufactured and evaluated. A set of two different circular spiral step-down transformers were fabricated in the four layered PCB. These transformers have been modelled with the assistance of high frequency equivalent circuit and characterized with both sinusoidal and square wave excitation. This paper provides the comparative results of these two different transformers in terms of their resistances, self, leakage, mutual inductances, coupling coefficient and also their energy efficiencies. The operating regions for optimal performance of these transformers for power transfer applications are determined. These transformers were tested for the output power levels of about 30 Watts within the input voltage range of 12-50 Vrms. The energy efficiency for these step down transformers is observed to be in the range of 90%-97% in MHz frequency region.Keywords: Coreless Step down Transformer, DC-DC Converterapplications, High frequency transformer, MHz operating frequency, Multilayered PCB transformers, Power Transfer Applications.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4839672 Improved Pattern Matching Applied to Surface Mounting Devices Components Localization on Automated Optical Inspection
Authors: Pedro M. A. Vitoriano, Tito. G. Amaral
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Automated Optical Inspection (AOI) Systems are commonly used on Printed Circuit Boards (PCB) manufacturing. The use of this technology has been proven as highly efficient for process improvements and quality achievements. The correct extraction of the component for posterior analysis is a critical step of the AOI process. Nowadays, the Pattern Matching Algorithm is commonly used, although this algorithm requires extensive calculations and is time consuming. This paper will present an improved algorithm for the component localization process, with the capability of implementation in a parallel execution system.
Keywords: AOI, automated optical inspection, SMD, surface mounting devices, pattern matching, parallel execution.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1082671 Time-Domain Analysis of Pulse Parameters Effects on Crosstalk (In High Speed Circuits)
Authors: L. Tani, N. El Ouzzani
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Crosstalk among interconnects and printed-circuit board (PCB) traces is a major limiting factor of signal quality in highspeed digital and communication equipments especially when fast data buses are involved. Such a bus is considered as a planar multiconductor transmission line. This paper will demonstrate how the finite difference time domain (FDTD) method provides an exact solution of the transmission-line equations to analyze the near end and the far end crosstalk. In addition, this study makes it possible to analyze the rise time effect on the near and far end voltages of the victim conductor. The paper also discusses a statistical analysis, based upon a set of several simulations. Such analysis leads to a better understanding of the phenomenon and yields useful information.Keywords: Multiconductor transmission line, Crosstalk, Finite difference time domain (FDTD), printed-circuit board (PCB), Rise time, Statistical analysis.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1773670 Design of 900 MHz High Gain SiGe Power Amplifier with Linearity Improved Bias Circuit
Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang
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A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.
Keywords: High gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra Series.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 992669 Hybrid Energy Harvesting System with Energy Storage Management
Authors: Lucian Pîslaru-Dănescu, George-Claudiu Zărnescu, Laurențiu Constantin Lipan, Rareș-Andrei Chihaia
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In recent years, the utilization of supercapacitors for energy storage (ES) devices that are designed for energy harvesting (EH) applications has increased substantially. The use of supercapacitors as energy storage devices in hybrid energy harvesting systems allows the miniaturization of electronic structures for energy storage. This study is concerned with the concept of energy management capacitors – supercapacitors and the new electronic structures for energy storage used for energy harvesting devices. Supercapacitors are low-voltage devices, and electronic overvoltage protection is needed for powering the source. The power management device that uses these proposed new electronic structures for energy storage is better than conventional electronic structures used for this purpose, like rechargeable batteries, supercapacitors, and hybrid systems. A hybrid energy harvesting system with energy storage management is able to simultaneously use several energy sources with recovery from the environment. The power management device uses a summing electronic block to combine the electric power obtained from piezoelectric composite plates and from a photovoltaic conversion system. Also, an overvoltage protection circuit used as a voltage detector and an improved concept of charging supercapacitors is presented. The piezoelectric composite plates are realized only by pressing two printed circuit boards together without damaging or prestressing the piezoceramic elements. The photovoltaic conversion system has the advantage that the modules are covered with glass plates with nanostructured film of ZnO with the role of anti-reflective coating and to improve the overall efficiency of the solar panels.
Keywords: Supercapacitors, energy storage, electronic overvoltage protection, energy harvesting.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 9668 Adapting the Chemical Reaction Optimization Algorithm to the Printed Circuit Board Drilling Problem
Authors: Taisir Eldos, Aws Kanan, Waleed Nazih, Ahmad Khatatbih
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Chemical Reaction Optimization (CRO) is an optimization metaheuristic inspired by the nature of chemical reactions as a natural process of transforming the substances from unstable to stable states. Starting with some unstable molecules with excessive energy, a sequence of interactions takes the set to a state of minimum energy. Researchers reported successful application of the algorithm in solving some engineering problems, like the quadratic assignment problem, with superior performance when compared with other optimization algorithms. We adapted this optimization algorithm to the Printed Circuit Board Drilling Problem (PCBDP) towards reducing the drilling time and hence improving the PCB manufacturing throughput. Although the PCBDP can be viewed as instance of the popular Traveling Salesman Problem (TSP), it has some characteristics that would require special attention to the transactions that explore the solution landscape. Experimental test results using the standard CROToolBox are not promising for practically sized problems, while it could find optimal solutions for artificial problems and small benchmarks as a proof of concept.
Keywords: Evolutionary Algorithms, Chemical Reaction Optimization, Traveling Salesman, Board Drilling.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3230667 Natural-Direction-Consistent 3D-Design and Printing Methods
Authors: Yasusi Kanada
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Objects are usually horizontally sliced when printed by 3D printers. Therefore, if an object to be printed, such as a collection of fibers, originally has natural direction in shape, the printed direction contradicts with the natural direction. By using proper tools, such as field-oriented 3D paint software, field-oriented solid modelers, field-based tool-path generation software, and non-horizontal FDM 3D printers, the natural direction can be modeled and objects can be printed in a direction that is consistent with the natural direction. This consistence results in embodiment of momentum or force in expressions of the printed object. To achieve this goal, several design and manufacturing problems, but not all, have been solved. An application of this method is (Japanese) 3D calligraphy.Keywords: 3D printing, Three-dimensional printing, Solid free-form fabrication, SFF, Fused deposition modeling, FDM, Additive manufacturing.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2279666 A Dynamically Reconfigurable Arithmetic Circuit for Complex Number and Double Precision Number
Authors: Haruo Shimada, Akinori Kanasugi
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This paper proposes an architecture of dynamically reconfigurable arithmetic circuit. Dynamic reconfiguration is a technique to realize required functions by changing hardware construction during operations. The proposed circuit is based on a complex number multiply-accumulation circuit which is used frequently in the field of digital signal processing. In addition, the proposed circuit performs real number double precision arithmetic operations. The data formats are single and double precision floating point number based on IEEE754. The proposed circuit is designed using VHDL, and verified the correct operation by simulations and experiments.Keywords: arithmetic circuit, complex number, double precision, dynamic reconfiguration
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1561665 Analysis of SCR-Based ESD Protection Circuit on Holding Voltage Characteristics
Authors: Yong Seo Koo, Jong Ho Nam, Yong Nam Choi, Dae Yeol Yoo, Jung Woo Han
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This paper presents a silicon controller rectifier (SCR) based ESD protection circuit for IC. The proposed ESD protection circuit has low trigger voltage and high holding voltage compared with conventional SCR ESD protection circuit. Electrical characteristics of the proposed ESD protection circuit are simulated and analyzed using TCAD simulator. The proposed ESD protection circuit verified effective low voltage ESD characteristics with low trigger voltage and high holding voltage.
Keywords: ESD (Electro-Static Discharge), SCR (Silicon Controlled Rectifier), holding Voltage.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3734664 A New True RMS-to-DC Converter in CMOS Technology
Authors: H. Asiaban, E. Farshidi
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This paper presents a new true RMS-to-DC converter circuit based on a square-root-domain squarer/divider. The circuit is designed by employing up-down translinear loop and using of MOSFET transistors that operate in strong inversion saturation region. The converter offer advantages of two-quadrant input current, low circuit complexity, low supply voltage (1.2V) and immunity from the body effect. The circuit has been simulated by HSPICE. The simulation results are seen to conform to the theoretical analysis and shows benefits of the proposed circuit.Keywords: Current-mode, squarer/divider, low-pass filter, converter, translinear loop, RMS-to-DC.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3292663 Experience-based Learning Program for Electronic Circuit Design
Authors: Koyu Chinen, Haruka Mikamori
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A new multi-step comprehensive experience-based learning program was developed and carried out so that the students understood about what was the principle of the circuit function and how the designed circuit was used in actual advanced applications.Keywords: Electronic circuit education, Experience based learning, Comprehensive education,
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1358662 Recovery of Metals from Electronic Waste by Physical and Chemical Recycling Processes
Authors: Muammer Kaya
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The main purpose of this article is to provide a comprehensive review of various physical and chemical processes for electronic waste (e-waste) recycling, their advantages and shortfalls towards achieving a cleaner process of waste utilization, with especial attention towards extraction of metallic values. Current status and future perspectives of waste printed circuit boards (PCBs) recycling are described. E-waste characterization, dismantling/ disassembly methods, liberation and classification processes, composition determination techniques are covered. Manual selective dismantling and metal-nonmetal liberation at – 150 µm at two step crushing are found to be the best. After size reduction, mainly physical separation/concentration processes employing gravity, electrostatic, magnetic separators, froth floatation etc., which are commonly used in mineral processing, have been critically reviewed here for separation of metals and non-metals, along with useful utilizations of the non-metallic materials. The recovery of metals from e-waste material after physical separation through pyrometallurgical, hydrometallurgical or biohydrometallurgical routes is also discussed along with purification and refining and some suitable flowsheets are also given. It seems that hydrometallurgical route will be a key player in the base and precious metals recoveries from e-waste. E-waste recycling will be a very important sector in the near future from economic and environmental perspectives.
Keywords: E-waste, WEEE, PCB, recycling, metal recovery, hydrometallurgy, pyrometallurgy, biohydrometallurgy.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 8341661 Non-Isolated Direct AC-DC Converter Design with BCM-PFC Circuit
Authors: Y. Kobori, L. Xing, H. Gao, N.Onozawa, S. Wu, S. N. Mohyar, Z. Nosker, H. Kobayashi, N. Takai, K. Niitsu
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This paper proposes two types of non-isolated direct AC-DC converters. First, it shows a buck-boost converter with an H-bridge, which requires few components (three switches, two diodes, one inductor and one capacitor) to convert AC input to DC output directly. This circuit can handle a wide range of output voltage. Second, a direct AC-DC buck converter is proposed for lower output voltage applications. This circuit is analyzed with output voltage of 12V. We describe circuit topologies, operation principles and simulation results for both circuits.Keywords: AC-DC converter, Buck-boost converter, Buck converter, PFC, BCM PFC circuit.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4791660 Simulation of Surge Protection for a Direct Current Circuit
Authors: Pedro Luis Ferrer Penalver, Edmundo da Silva Braga
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In this paper, the performance of a simple surge protection for a direct current circuit was simulated. The protection circuit was developed from modified electric macro models of a gas discharge tube and a transient voltage suppressor diode. Moreover, a combination wave generator circuit was used as source of energy surges. The simulations showed that the circuit presented ensures immunity corresponding with test level IV of the IEC 61000-4-5:2014 international standard. The developed circuit can be modified to meet the requirements of any other equipment to be protected. Similarly, the parameters of the combination wave generator can be changed to provide different surge amplitudes.Keywords: Combination wave generator, IEC 61000-4-5, Pspice simulation, surge protection.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3319659 Study of Features for Hand-printed Recognition
Authors: Satish Kumar
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The feature extraction method(s) used to recognize hand-printed characters play an important role in ICR applications. In order to achieve high recognition rate for a recognition system, the choice of a feature that suits for the given script is certainly an important task. Even if a new feature required to be designed for a given script, it is essential to know the recognition ability of the existing features for that script. Devanagari script is being used in various Indian languages besides Hindi the mother tongue of majority of Indians. This research examines a variety of feature extraction approaches, which have been used in various ICR/OCR applications, in context to Devanagari hand-printed script. The study is conducted theoretically and experimentally on more that 10 feature extraction methods. The various feature extraction methods have been evaluated on Devanagari hand-printed database comprising more than 25000 characters belonging to 43 alphabets. The recognition ability of the features have been evaluated using three classifiers i.e. k-NN, MLP and SVM.Keywords: Features, Hand-printed, Devanagari, Classifier, Database
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1728658 Realization of a Temperature Based Automatic Controlled Domestic Electric Boiling System
Authors: Shengqi Yu, Jinwei Zhao
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This paper presents a kind of analog circuit based temperature control system, which is mainly composed by threshold control signal circuit, synchronization signal circuit and trigger pulse circuit. Firstly, the temperature feedback signal function is realized by temperature sensor TS503F3950E. Secondly, the main control circuit forms the cycle controlled pulse signal to control the thyristor switching model. Finally two reverse paralleled thyristors regulate the output power by their switching state. In the consequence, this is a modernized and energy-saving domestic electric heating system.Keywords: Time base circuit, automatic control, zero-crossing trigger, temperature control.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1002657 Suitability of Newsprint and Kraft Papers as Materials for Cement Bonded Ceiling Board
Authors: J. M. Owoyemi, O. S. Ogunrinde
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The suitability of Newsprint and Kraft papers for the production of cement bonded ceiling board was investigated. Sample boards were produced from newsprint paper (100%), mixture of newsprint and Kraft paper (50:50) and Kraft paper (100%) at 1:1, 2:1 and 3:1 cement/paper mixing ratio respectively with 3% additive concentration of calcium chloride (CaCl2). Density, flexural and thickness swelling properties of the boards were investigated. The effects of paper type and mixing ratio on the physical and mechanical properties were also examined. The bending properties of the board which include Modulus of Elasticity (MOE) and Modulus of Rupture (MOR) increased linearly with increase in density. Modulus of rupture of boards increased as the density and mixing ratio increased. The thickness swelling property for the two paper types decreased as the board density and mixing ratio increased. Boards made from Kraft paper recorded higher strength values than the ones made from recycled newsprint paper while the mixture of kraft and newsprint papers had the best surface finish. The result of the study will help in managing the large quality of waste from paper converting/carton industry and that the ceiling boards produced could be installed with clout nails or used with suspended ceiling fittings.
Keywords: Cement, Kraft paper, Mixing ratio, Newsprint.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3767656 Mechanical Properties of Particle Boards from Maize Cob and Urea-Formaldehyde Resin
Authors: A. Danladi, I. O. Patrick
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Particle boards were prepared from Maize cob (MC) and urea-formaldehyde resin (UFR) on compression moulding machine. The amount of MC was varied from 50-120g while 30g of UFR was kept constant. Some mechanical properties of the particle boards were tested using the standard ASM methods. The results show that as the MC content increased from 50- 120g in 30g UFR, the hardness increased from about 6.89 x 102 to7.51 x 102MPa. Impact strength decreased from 3.3x 10-2 to 0.45 x 10-2J/M2, while tensile strength initially increased from 2.63 x 102 to 3.14 x 102 MPa as the MC increased from 50 to 60g in 30g UFR, thereafter, it decreased to about 1.35 x 102MPa at 120g in 30g content.
Keywords: Hardness, Impact strength, Maize cob, Tensile strength and Urea-formaldehyde resin.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 4496655 A 1.5V,100MS/s,12-bit Current-Mode CMOSS ample-and-Hold Circuit
Authors: O. Hashemipour, S. G. Nabavi
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A high-linearity and high-speed current-mode sampleand- hold circuit is designed and simulated using a 0.25μm CMOS technology. This circuit design is based on low voltage and it utilizes a fully differential circuit. Due to the use of only two switches the switch related noise has been reduced. Signal - dependent -error is completely eliminated by a new zero voltage switching technique. The circuit has a linearity error equal to ±0.05μa, i.e. 12-bit accuracy with a ±160 μa differential output - input signal frequency of 5MHZ, and sampling frequency of 100 MHZ. Third harmonic is equal to –78dB.Keywords: Zero-voltage-technique, MOS-resistor, OTA, Feedback-resistor.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1405654 Metal-Oxide-Semiconductor-Only Process Corner Monitoring Circuit
Authors: Davit Mirzoyan, Ararat Khachatryan
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A process corner monitoring circuit (PCMC) is presented in this work. The circuit generates a signal, the logical value of which depends on the process corner only. The signal can be used in both digital and analog circuits for testing and compensation of process variations (PV). The presented circuit uses only metal-oxide-semiconductor (MOS) transistors, which allow increasing its detection accuracy, decrease power consumption and area. Due to its simplicity the presented circuit can be easily modified to monitor parametrical variations of only n-type and p-type MOS (NMOS and PMOS, respectively) transistors, resistors, as well as their combinations. Post-layout simulation results prove correct functionality of the proposed circuit, i.e. ability to monitor the process corner (equivalently die-to-die variations) even in the presence of within-die variations.Keywords: Detection, monitoring, process corner, process variation.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1325653 Charge-Pump with a Regulated Cascode Circuit for Reducing Current Mismatch in PLLs
Authors: Jae Hyung Noh, Hang Geun Jeong
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The charge-pump circuit is an important component in a phase-locked loop (PLL). The charge-pump converts Up and Down signals from the phase/frequency detector (PFD) into current. A conventional CMOS charge-pump circuit consists of two switched current sources that pump charge into or out of the loop filter according to two logical inputs. The mismatch between the charging current and the discharging current causes phase offset and reference spurs in a PLL. We propose a new charge-pump circuit to reduce the current mismatch by using a regulated cascode circuit. The proposed charge-pump circuit is designed and simulated by spectre with TSMC 0.18-μm 1.8-V CMOS technology.
Keywords: Phase-locked loop (PLL), charge-pump, phase/frequency detector (PFD), regulated cascode.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3942652 Realization of Electronically Controllable Current-mode Square-rooting Circuit Based on MO-CFTA
Authors: P. Silapan, C. Chanapromma, T. Worachak
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This article proposes a current-mode square-rooting circuit using current follower transconductance amplifier (CTFA). The amplitude of the output current can be electronically controlled via input bias current with wide input dynamic range. The proposed circuit consists of only single CFTA. Without any matching conditions and external passive elements, the circuit is then appropriate for an IC architecture. The magnitude of the output signal is temperature-insensitive. The PSpice simulation results are depicted, and the given results agree well with the theoretical anticipation. The power consumption is approximately 1.96mW at ±1.5V supply voltages.Keywords: CFTA, Current-mode, Square-rooting Circuit
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1407651 A Low-Voltage Current-Mode Wheatstone Bridge using CMOS Transistors
Authors: Ebrahim Farshidi
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This paper presents a new circuit arrangement for a current-mode Wheatstone bridge that is suitable for low-voltage integrated circuits implementation. Compared to the other proposed circuits, this circuit features severe reduction of the elements number, low supply voltage (1V) and low power consumption (<350uW). In addition, the circuit has favorable nonlinearity error (<0.35%), operate with multiple sensors and works by single supply voltage. The circuit employs MOSFET transistors, so it can be used for standard CMOS fabrication. Simulation results by HSPICE show high performance of the circuit and confirm the validity of the proposed design technique.Keywords: Wheatstone bridge, current-mode, low-voltage, MOS.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3022650 Fully Printed Strain Gauges: A Comparison of Aerosoljet-Printing and Micropipette-Dispensing
Authors: Benjamin Panreck, Manfred Hild
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Strain sensors based on a change in resistance are well established for the measurement of forces, stresses, or material fatigue. Within the scope of this paper, fully additive manufactured strain sensors were produced using an ink of silver nanoparticles. Their behavior was evaluated by periodic tensile tests. Printed strain sensors exhibit two advantages: Their measuring grid is adaptable to the use case and they do not need a carrier-foil, as the measuring structure can be printed directly onto a thin sprayed varnish layer on the aluminum specimen. In order to compare quality characteristics, the sensors have been manufactured using two different technologies, namely aerosoljet-printing and micropipette-dispensing. Both processes produce structures which exhibit continuous features (in contrast to what can be achieved with droplets during inkjet printing). Briefly summarized the results show that aerosoljet-printing is the preferable technology for specimen with non-planar surfaces whereas both technologies are suitable for flat specimen.Keywords: Aerosoljet-printing, micropipette-dispensing, printed electronics, printed sensors, strain gauge.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1009649 Investigating the Fiber Content, Fiber Length, and Curing Characteristics of 3D Printed Recycled Carbon Fiber
Authors: Peng Hao Wang, Ronald Sterkenburg, Garam Kim, Yuwei He
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As composite materials continue to gain popularity in the aerospace industry; large airframe sections made out of composite materials are becoming the standard for aerospace manufacturers. However, the heavy utilization of these composite materials also increases the importance of the recycling of these composite materials. A team of Purdue University School of Aviation and Transportation Technology (SATT) faculty and students have partnered to investigate the characteristics of 3D printed recycled carbon fiber. A prototype of a 3D printed recycled carbon fiber part was provided by an industry partner and different sections of the prototype were used to create specimens. A furnace was utilized in order to remove the polymer from the specimens and the specimen’s fiber content and fiber length was calculated from the remaining fibers. A differential scanning calorimetry (DSC) and dynamic mechanical analysis (DMA) test was also conducted on the 3D printed recycled carbon fiber prototype in order to determine the prototype’s degree of cure at different locations. The data collected from this study provided valuable information in the process improvement and understanding of 3D printed recycled carbon fiber.
Keywords: 3D printed, carbon fiber, fiber content, recycling.
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 767648 Complementary Energy Path Adiabatic Logic based Full Adder Circuit
Authors: Shipra Upadhyay , R. K. Nagaria, R. A. Mishra
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In this paper, we present the design and experimental evaluation of complementary energy path adiabatic logic (CEPAL) based 1 bit full adder circuit. A simulative investigation on the proposed full adder has been done using VIRTUOSO SPECTRE simulator of cadence in 0.18μm UMC technology and its performance has been compared with the conventional CMOS full adder circuit. The CEPAL based full adder circuit exhibits the energy saving of 70% to the conventional CMOS full adder circuit, at 100 MHz frequency and 1.8V operating voltage.Keywords: Adiabatic, CEPAL, full adder, power clock
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2445