Charge-Pump with a Regulated Cascode Circuit for Reducing Current Mismatch in PLLs
Authors: Jae Hyung Noh, Hang Geun Jeong
Abstract:
The charge-pump circuit is an important component in a phase-locked loop (PLL). The charge-pump converts Up and Down signals from the phase/frequency detector (PFD) into current. A conventional CMOS charge-pump circuit consists of two switched current sources that pump charge into or out of the loop filter according to two logical inputs. The mismatch between the charging current and the discharging current causes phase offset and reference spurs in a PLL. We propose a new charge-pump circuit to reduce the current mismatch by using a regulated cascode circuit. The proposed charge-pump circuit is designed and simulated by spectre with TSMC 0.18-μm 1.8-V CMOS technology.
Keywords: Phase-locked loop (PLL), charge-pump, phase/frequency detector (PFD), regulated cascode.
Digital Object Identifier (DOI): doi.org/10.5281/zenodo.1331257
Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3952References:
[1] M. Mansuri, D. Liu, and C. K. Yang, "Fast Frequency Acquisition Phase-Frequency Detectors for Gsamples/s Phase-Locked Loops", IEEE Journal of Solid-State Circuits, vol. 37, pp. 1331-4, Oct. 2002.
[2] S. Cheng, H. Tong, J. Silva-Martinez, and A. I. Karsilayan, "Design and Analysis of an Ultrahigh-Speed Glitch-Free Fully Differential Charge Pump With Minimum Output Current Variation and Accurate Matching",
[3] J. Maneatis, "Low-Jitter and Process-Independent DLL and PLL Based on Self-Biased Techniques," ISSCC Digest of Technical Papers, 1996.
[4] David A. Johns, Ken Martin, Analog Integrated Circuit Design, New York: John Willey & Sons, 1997.